NXP Semiconductors NTM88 Series Manuals

Manuals and User Guides for NXP Semiconductors NTM88 Series. We have 1 NXP Semiconductors NTM88 Series manual available for free PDF download: User Manual

NXP Semiconductors NTM88 Series User Manual (205 pages)

NTM88 family of tire pressure monitor sensors

Brand: NXP Semiconductors | Category: Accessories | Size: 2 MB

Introduction
1
Purpose
1
Audience
1
General Description
1
Features and Benefits
1
Configuration Options
2
Electronic Encoding - "Codef
2
Electronic Encoding - "Codeh
3
Device Identification
3
Definition of Signal Ranges
4
Memory Resource Usage
5
Marking
5
Exterior Markings
5
Block Diagram
6
Pinning Information
7
Pinout
7
Pin Description
7
Orientation
10
Central Processing Unit
10
Introduction
10
Features
10
Programmer's Model and CPU Registers
11
Accumulator (A)
11
Index Register (H:X)
12
Stack Pointer (SP)
12
Program Counter (PC)
12
Condition Code Register (CCR)
13
Addressing Modes
14
Inherent Addressing Mode (INH)
14
Relative Addressing Mode (REL)
14
Immediate Addressing Mode (IMM)
14
Direct Addressing Mode (DIR)
15
Extended Addressing Mode (EXT)
15
Indexed Addressing Mode
15
Indexed, no Offset (IX)
15
Indexed, no Offset with Post Increment (IX+)
15
Indexed, 8-Bit Offset (IX1)
15
Indexed, 8-Bit Offset with Post Increment (IX1+)
15
Indexed, 16-Bit Offset (IX2)
15
SP-Relative, 8-Bit Offset (SP1)
16
SP-Relative, 16-Bit Offset (SP2)
16
Special Operations
16
Reset Sequence
16
Interrupt Sequence
16
WAIT Mode Operation
17
STOP Mode Operation
17
BGND Instruction
18
HCS08 Instruction Set Summary
18
Instruction Set Summary Nomenclature
18
Operators
18
CPU Registers
18
Memory and Addressing
18
Condition Code Register (CCR) Bits
19
CCR Activity Notation
19
Machine Coding Notation
19
Source Form
19
Address Modes
20
Development Support
31
Introduction
31
Features
31
Background Debug Controller (BDC)
32
BKGD/PTA4 Pin Description
32
Communication Details
33
BDC Commands
35
Coding Structure Nomenclature
35
BDC Hardware Breakpoint
37
Register Definition
38
BDC Registers and Control Bits
38
BDC Status and Control Register (BDCSCR)
38
BDC Breakpoint Match Register (BDCBKPT)
39
System Background Debug Force Reset Register (SBDFR)
40
Functional Description
40
Register Information
40
Register Map
40
Register Description Format
47
Interrupts
48
Interrupt Stack Frame
49
Vector Summary
50
Interrupt Service Routines
50
Low-Voltage Detect (LVD) System
51
Power-On Reset Operation
51
LVD Reset Operation
51
LVD Interrupt Operation
52
Low-Voltage Warning (LVW)
52
System Clock Control
52
Keyboard Interrupts
52
Real-Time Interrupt
52
Modes of Operation
53
Features
53
RUN Mode
53
WAIT Mode
53
ACTIVE BACKGROUND Mode
53
STOP Modes
54
STOP1 Mode
54
STOP4 LVD Enabled in STOP Mode
54
Active BDM Enabled in STOP Mode
56
MCU On-Chip Peripheral Modules in STOP Modes
56
RFM Module in STOP Modes
57
P-Cell in STOP Modes
58
Optional G-Cell in STOP Modes
58
Memory
58
Memory Map - Parts Delivered Without Firmware in Flash
58
Clock Distribution
59
Reset, Interrupts and System Configuration
60
Features
60
MCU Reset
61
Computer Operating Properly (COP) Watchdog
61
NXP B.V. 2020. All Rights Reserved
61
General Purpose I/O Port Pins
62
GPIO Register Descriptions
62
General Purpose I/O
64
Port a Data Register (PTAD)
65
Port a Pin Pull Enable Register (PTAPE)
66
Port a Data Direction Register (PTADD)
66
Port B Data Register (PTBD)
67
Port B Pin Pull Enable Register (PTBE)
67
Port B Data Direction Register (PTBDD)
67
External Wake-Up Functions
68
KBI Status and Control Register (KBISC)
68
Keyboard Interrupt Pin Enable Register (KBIPE)
69
Keyboard Interrupt Edge Select Register (KBIES)
69
Ext. Interrupt Status and Control Register (IRQSC)
70
Timer Pulse-Width Module
71
TPM1 Configuration Information
72
Block Diagram
72
External Signal Description
73
TPM Register Descriptions
73
Timer Status and Control Register (TPMSC)
73
Timer Counter High and Low Registers (TPMCNTH/L)
74
Timer Modulo High and Low Registers (TPMMODH/L)
75
Timer Channel 0/1 Status and Control Registers (Tpmcysc)
75
Timer Channel 0/1 Value Registers (Tpmcyvh/L)
77
Periodic Wake-Up Timer Module
78
PWU Timer Register Descriptions
79
Periodic Wake-Up Status and Control Register (PWUSR)
79
Periodic Wake-Up Divider Register (PWUDIV)
80
Periodic Wake-Up Interrupt Register (PWUCS0)
80
Periodic Wake-Up Reset Register (PWUCS1)
81
Periodic Wake-Up Counter Register (PWUS)
81
Low Frequency (LF) Receiver Module
82
Features
83
Modes of Operation
83
Power Management
83
Input Amplifier
84
LFR Data Mode States
84
Carrier Detect
84
Auto-Zero Sequence
87
Data Recovery
87
Data Clock Recovery and Synchronization
87
Manchester Decode
87
Duty Cycle for Data Mode
88
Input Signal Envelope
89
Telegram Verification
89
Error Detection and Handling
91
Continuous on Mode
91
Initialization Information
91
LF Receiver Module Register Descriptions
92
1LF Control 1 Register (LFCTL1)
92
2LF Control 2 Register (LFCTL2)
93
3LF Control 3 Register (LFCTL3)
94
4LF Control 4 Register (LFCTL4)
96
Tab. 83. LF Receiver Status Register (LFS) (Address $0024)
97
5LF Receiver Status Register (LFS)
97
Tab. 84. LFS Register Field Descriptions
98
Tab. 85. LF Received Data Register (LFDATA) (Address $0025)
99
Tab. 86. LFDATA Register Field Descriptions
99
Tab. 87. LF Receiver ID Register (LFID) (Address $0026)
99
6LF Received Data Register (LFDATA)
99
7LF Receiver ID Registers (LFID)
99
Tab. 88. LF Receiver ID Register (LFID) (Address $0027)
100
Tab. 89. LFID Register Field Descriptions
100
Tab. 90. LF Receiver Control E Register (LFCTRLE) (Address $0028)
100
Tab. 91. LFCTRLE Register Field Descriptions
100
8LF Receiver Control E Register (LFCTRLE)
100
Tab. 92. LF Receiver Control D Register (LFCTRLD) (Address $0029)
101
Tab. 93. LFCTRLD Register Field Descriptions
101
9LF Receiver Control D Register (LFCTRLD)
101
Tab. 94. LF Receiver Control C Register (LFCTRLC) (Address $002A)
102
Tab. 95. LFCTRLC Register Field Descriptions
102
LF Receiver Control C Register (LFCTRLC)
102
Tab. 96. LF Receiver Control B Register (LFCTRLB) (Address $002B)
103
Tab. 97. LFCTRLB Register Field Descriptions
103
LF Receiver Control B Register (LFCTRLB)
103
Tab. 98. LF Receiver Control a Register (LFCTRLA) (Address $002C)
104
Tab. 99. LFCTRLA Register Field Descriptions
104
LF Receiver Control a Register (LFCTRLA)
104
Radio Frequency (RF) Transmitter Module
104
RF Data Modes
105
RF Data Buffer Mode
105
MCU Direct Mode
106
RF Output Buffer Data Frame
107
Data Buffer Length
107
End of Message (EOM)
107
RF Transmission Randomization
107
Initial Time Interval
108
Interframe Time Intervals
108
Base Time Interval
109
Pseudo-Random Time Interval
109
Tab. 100. Randomization Interval Times
110
Frame Number Time
110
Tab. 101. Frame Number Interval Times
111
RFM in STOP1 Mode
111
Data Encoding
111
Manchester Encoding
111
Bi-Phase Encoding
112
NRZ Encoding
112
RF Output Stage
114
Modulation Method
114
Carrier Frequency
114
RF Power Output
114
Transmission Error
115
Supply Voltage Check During RF Transmission
115
RF Reset (RFMRST)
115
RF Interrupt
115
Datagram Transmission Times
115
Pre-Charge Function
116
VCO Calibration Machine
116
Tab. 102. RFM Control 0 Register (RFCR0) (Address $1830)
117
RFM Register Descriptions
117
1RFM Control 0 Register (RFCR0)
117
Tab. 103. RFCR0 Register Field Descriptions
118
Tab. 104. Data Rate Option Examples
118
Tab. 105. RFM Control 1 Register (RFCR1) (Address $1831)
118
Tab. 106. RFCR1 Register Field Descriptions
118
2RFM Control 1 Register (RFCR1)
118
Tab. 107. RFM Control 2 Register (RFCR2) (Address $1832)
119
Tab. 108. RFCR2 Register Field Descriptions
119
3RFM Control 2 Register (RFCR2)
119
Tab. 109. RFM Control 3 Register (RFCR3) (Address $1833)
120
Tab. 110. RFCR3 Register Field Descriptions
120
Tab. 111. RFM Control 4 Register (RFCR4) (Address $1834)
120
4RFM Control 3 Register (RFCR3)
120
5RFM Control 4 Register (RFCR4)
120
Tab. 112. RFCR4 Register Field Descriptions
121
Tab. 113. RFM Control 5 Register (RFCR5) (Address $1835)
121
Tab. 114. RFCR5 Register Field Descriptions
121
Tab. 115. RFM Control 6 Register (RFCR6) (Address $1836)
121
Tab. 116. RFCR6 Register Field Descriptions
121
6RFM Control 5 Register (RFCR5)
121
7RFM Control 6 Register (RFCR6)
121
Tab. 117. RFM Control 7 Register (RFCR7) (Address $1837)
122
Tab. 118. RFCR7 Register Field Descriptions
122
8RFM Control 7 Register (RFCR7)
122
Tab. 119. RFM Phase Lock Loop Control Register 0 (PLLCR0) (Address $1838)
123
Tab. 120. RFM Phase Lock Loop Control Register 1 (PLCCR1) (Address $1839)
123
Tab. 121. RFM Phase Lock Loop Control Register 2 (PLCCR2) (Address $183A)
123
Tab. 122. RFM Phase Lock Loop Control Register 3 (PLCCR3) (Address $183B)
123
Pllcr3)
123
Tab. 123. PLLCR0 / PLLCR1 / PLLCR2 / PLLCR3 Register Field Descriptions
124
Tab. 124. RFM Transmit Data 0 through 31 Registers (RFTX0 : RFTX31) (Addresses $183C : $185B)
125
RFM Transmit Data 0 through 31 Registers (RFTX0 : RFTX31)
125
Tab. 125. RFTX0 : RFTX31 Register Field Descriptions
129
Tab. 126. RFM EOM, PLL and PA Control Register (EPR) (Address $1860)
129
Tab. 127. EPR Register Field Descriptions
129
RFM EOM, PLL and PA Control Register (EPR)
129
Tab. 128. RFM Pre-Charge Control Register (RFPRECHARGE) (Address $1861)
130
Tab. 129. RFPRECHARGE Register Field Descriptions
130
RFM Pre-Charge Control Register (RFPRECHARGE)
130
Analog-To-Digital Converter (ADC) Module
130
Tab. 130. ADC Status and Control 1 Register (ADSC1) (Address $0030)
132
Tab. 131. ADSC1 Register Field Descriptions
132
Tab. 132. ADCH Valid Channel Values
132
ADC Register Descriptions
132
ADC Status and Control 1 Register (ADSC1)
132
Tab. 133. ADC Status and Control 2 Register (ADSC2) (Address $0031)
133
Tab. 134. ADSC2 Register Field Descriptions
133
ADC Status and Control 2 Register (ADSC2)
133
Tab. 135. ADC Result High Register (ADRH) (Address $0032)
134
Tab. 136. ADC Result Low Register (ADRL) (Address $0033)
134
ADC Result High and Low Registers (ADRH/L)
134
Tab. 137. ADRH/L Register Field Descriptions
135
Tab. 138. ADCV Compare Value High Register (ADCVH) (Address $0034)
135
Tab. 139. ADCV Compare Value Low Register (ADCVL) (Address $0035)
135
Tab. 140. ADCVH/L Register Field Descriptions
135
Tab. 141. ADC Configuration Register (Address $0036)
135
ADC Compare Value High and Low Registers (ADCVH/L)
135
ADC Configuration Register
135
Tab. 142. ADC Register Field Descriptions
136
Tab. 143. Port Pin Control Register (Address $0037)
136
Tab. 144. Port Pint Control Register Field Descriptions
136
Port Pin Control Register
136
Serial Peripheral Interface (SPI) Module
137
SPI Protocol Definition
138
SPI Signal Timing Definition
139
Sensor Measurement Interface (SMI) Module
140
SMI Signal Measurement Modes
141
Tab. 145. Signal Measurement Sub-Modes
142
SMI Automatic Signal Measurement Mode
142
SMI Direct Sensor Signal Measurement Mode
143
SMI Low Power Direct Sensor Signal Measurement Mode
144
Tab. 146. SMI Status and Control Register (SMICS) (Address $0040)
146
Tab. 147. SMICS Register Field Descriptions
146
SMI Register Descriptions
146
SMI Status and Control Register (SMICS)
146
Tab. 148. SMI Control Register (SMIC) (Address $0041) . 147 Tab. 149. SMIC Register Field Descriptions
147
SMI Control Register (SMIC)
147
Tab. 150. SMI Configuration Register (SMICFG) (Address $0042)
148
Tab. 151. SMICFG Register Field Descriptions
148
SMI Configuration Register (SMICFG)
148
Tab. 152. SMI Settling Time Register (SMIST) (Address $0043)
149
Tab. 153. SMIST Register Field Descriptions
149
Tab. 154. SP[3:0]
149
SMI Settling Time Register (SMIST)
149
Tab. 155. ISD[3:0]
150
Parameter Registers (PARAM0 to PARAM63)
150
Tab. 156. Parameter Registers (PARAM0 to PARAM31) (Addresses $0050 - $006F)
151
Tab. 157. Parameter Registers (PARAM32 to PARAM63) (Addresses $0070 - $008F)
151
Tab. 158. Random Access Memory Registers (RAM0 to RAM255) (Addresses $0090 - $00FF)
151
Tab. 159. Parameter Registers (RAM256 to RAM511) (Addresses $0100 - $028F)
151
Random Access Memory (RAM0 to RAM511)
151
System Integration Module (SIM)
152
SIM Reset Exit
154
SIM MCU Mode Control
155
Tab. 160. SIM Reset Status Register (SIMRS) (Address $1800)
156
Tab. 161. SIMRS Register Field Descriptions
156
SIM Register Descriptions
156
SIM Reset Status Register (SIMRS)
156
Tab. 162. SIM Control Register (SIMC) (Address $1801) . 157 Tab. 163. SIMC Register Field Descriptions
157
SIM Control Register (SIMC)
157
SIM Option 1 Register (SIMOPT1)
157
Tab. 164. SIM Option 1 Register (SIMOPT1) (Address $1802)
158
Tab. 165. SIMOPT1 Register Field Descriptions
158
Tab. 166. SIM Option 2 Register (SIMOPT2) (Address $1803)
159
Tab. 167. SIMOPT2 Field Descriptions
159
SIM Option 2 Register (SIMOPT2)
159
Tab. 168. SIM Part ID High Register (SIMPID1) (Address $1806)
160
Tab. 169. SIM Part ID Low Register (SIMPID2) (Address $1807)
160
Tab. 170. SIMPID1/SIMPID2 Register Field Descriptions
160
Tab. 171. SIM Stop Exit Status Register (SIMSES) (Address $180D)
160
SIM Part ID High and Low Byte Registers (SIMPID1/SIMPID2)
160
SIM Stop Exit Status Register (SIMSES)
160
Tab. 172. SIMSES Register Field Descriptions
161
Tab. 173. SIM Oscillator Trim Register (SIMOTRM) (Address $180E)
161
SIM Oscillator Trim Register (SIMOTRM)
161
Tab. 174. SIMOTRM Register Field Descriptions
162
Power Management Controller (PMC) Module
162
PMC State Transitions
164
PMC Low Voltage Detection Transitions
165
PMC Register Descriptions
165
PMC Real-Time-Interrupt Status and Control Register (SRTISC)
165
Tab. 176. SRTISC Register Field Descriptions
166
PMC Status and Control 1 Register (SPMSC1)
166
Tab. 177. PMC Status and Control 1 Register (SPMSC1) (Address $1809)
167
Tab. 178. SPMSC1 Register Field Descriptions
167
Tab. 179. PMC Status and Control 2 Register (SPMSC2) (Address $180A)
168
Tab. 180. SPMSC2 Register Field Descriptions
168
Tab. 181. PMC Status and Control 3 Register (PMCSC3) (Address $180C)
168
PMC Status and Control 2 Register (SPMSC2)
168
PMC Status and Control 3 Register (PMCSC3)
168
Tab. 182. PMCSC3 Register Field Descriptions
169
Flash Memory Controller (FMC) Module
169
Flash Controller General Items
169
Tab. 183. Program and Erase Times
170
FMC Program and Erase Times
170
FMC Program and Erase Command Execution
170
FMC Burst Program Execution
171
FMC Memory Access Errors
173
FMC Block Protection
174
FMC Vector Redirection
175
FMC Security
175
Tab. 184. FMC Clock Divider Register (FCDIV) (Address $1820)
177
Tab. 185. FCDIV Register Field Descriptions
177
Tab. 186. FMC Clock Divider Register Settings
177
FMC Register Descriptions
177
FMC Clock Divider Register (FCDIV)
177
Tab. 187. FMC Option Registers (FOPT) (Address $1821)
178
Tab. 188. FMC Option Registers (NVOPT) (Address $FFBF)
178
FMC Option Registers (FOPT and NVOPT)
178
Tab. 189. FOPT and NVOPT Register Field Descriptions . 178 Tab. 190. FMC Configuration Registers (FCNFG) (Address $1823)
179
Tab. 191. FCNFG Register Field Descriptions
179
Tab. 192. Flash Protection Register (FPROT) (Address $1824)
179
Tab. 193. Flash Protection Register (NVPROT) (Address $FFBD)
179
FMC Configuration Registers (FCNFG)
179
Flash Protection Registers (FPROT and NVPROT)
179
Tab. 194. FPROT and NVPROT Register Field Descriptions
180
Tab. 195. FMC Status Register (FSTAT) (Address $1825)
180
Tab. 196. FMC Status Register (FSTAT) (Address $1825)
180
Tab. 197. FSTAT Register Field Descriptions
180
FMC Status Register (FSTAT)
180
Tab. 198. FMC Command Register (FCMD) (Address $1826)
181
Tab. 199. FCMD Register Field Descriptions
181
Tab. 200. FCMD Available Flash Commands
181
FMC Command Register (FCMD)
181
Free Running Counter (FRC) Module
182
Clearing or Halting the FRC
182
Tab. 201. FRC Status and Control Register (FRCCR) (Address $1880)
183
Tab. 202. FRCCR Register Field Descriptions
183
Free Running Counter Register Descriptions
183
FRC Status and Control Register (FRCCR)
183
Tab. 203. FRC Timer High Register (FRCTIMERH) (Address $1881)
184
Tab. 204. FRC Timer Low Register (FRCTIMERL) (Address $1882)
184
Tab. 205. FRCTIMERH/L Register Field Descriptions
184
Tab. 206. FRC Compare High Register (FRCCOMP2) (Address $1883)
184
FRC Timer High and Low Registers (FRCTIMERH/L)
184
FRC Compare High and Low Registers (FRCCOMP2/1)
184
Tab. 207. FRC Compare Low Register (FRCCOMP1) (Address $1884)
185
Tab. 208. FRCCOMP2/1 Register Field Descriptions
185
Other MCU Resources
185
Tab. 209. ADC10 Channel Assignments
186
Pressure Measurement
186
Temperature Measurements
187
Voltage Measurements
187
Internal Band Gap
187
External Voltages
187
Optional Acceleration Measurements
187
Optional Battery Condition Check
188
Measurement Firmware
189
Battery Charge Consumption Modeling
190
Standby Current
190
Measurement Events
190
Transmission Events
191
Total Consumption
191
Application Information
192
Tab. 210. Revision History
195
Revision History
195
Legal Information
198
Table of Contents
200
Tab. 175. PMC Real-Time-Interrupt Status and Control
205

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NXP Semiconductors NTM88 Series User Manual (205 pages)

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