Geehy SEMICONDUCTOR APM32F030x6x8 Manuals

Manuals and User Guides for Geehy SEMICONDUCTOR APM32F030x6x8. We have 1 Geehy SEMICONDUCTOR APM32F030x6x8 manual available for free PDF download: User Manual

Geehy SEMICONDUCTOR APM32F030x6x8 User Manual

Geehy SEMICONDUCTOR APM32F030x6x8 User Manual (331 pages)

Arm Cortex -M0+ based 32-bit MCU

Brand: Geehy SEMICONDUCTOR | Category: Microcontrollers | Size: 6 MB

Table of Contents

Table of Contents

2
- Introduction and Document Description Rules
  7
- Introduction
  7
- Document Description Rules
  7
- System Architecture
  10
- Full Name and Abbreviation Description of Terms
  10
- System Architecture Block Diagram
  10
- Memory Mapping
  12
- Startup Configuration
  12
- Flash Memory Structure
  13
- Full Name and Abbreviation Description of Terms
  13
- Main Characteristics
  13
- FLASH Memory
  13
- Functional Description
  14
- Register Address Mapping
  18
- Register Functional Description
  19
- System Configuration Controller (SYSCFG)
  23
- Full Name and Abbreviation Description of Terms
  23
- Register Address Mapping
  23
- Register Functional Description
  23
- Reset Functional Description
  29
- Full Name and Abbreviation Description of Terms
  29
- Reset and Clock Management (RCM)
  29
- Functional Description of Clock Management
  31
- Register Address Mapping
  37
- Register Functional Description
  38
- Power Management Unit (PMU)
  54
- Full Name and Abbreviation Description of Terms
  54
- Introduction
  54
- Structure Block Diagram
  54
- Functional Description
  55
- Register Functional Description
  58
- Register Address Mapping
  58
- Nested Vector Interrupt Controller (NVIC)
  60
- Full Name and Abbreviation Description of Terms
  60
- Introduction
  60
- Main Characteristics
  60
- Interrupt and Exception Vector Table
  60
- External Interrupt and Event Controller (EINT)
  62
- Introduction
  62
- Functional Description
  62
- Register Address Mapping
  64
- Register Functional Description
  64
- Functional Description
  67
- Main Characteristics
  67
- Introduction
  67
- Direct Memory Access (DMA)
  67
- Register Address Mapping
  73
- Register Functional Description
  74
- Debug MCU (DBGMCU)
  78
- Full Name and Abbreviation Description of Terms
  78
- Introduction
  78
- Main Characteristics
  78
- Functional Description
  79
- Register Address Mapping
  79
- Register Functional Description
  79
- Full Name and Abbreviation Description of Terms
  83
- Main Characteristics
  83
- Structure Block Diagram
  84
- Functional Description
  84
- Register Address Mapping
  89
- Register Functional Description
  89
- Timer Overview
  94
- Full Name and Abbreviation Description of Terms
  94
- Timer Category and Main Difference
  94
- Advanced Timer (TMR1)
  97
- Introduction
  97
- Main Characteristics
  97
- Structure Block Diagram
  98
- Functional Description
  98
- Register Address Mapping
  114
- Register Functional Description
  115
- General-Purpose Timer (TMR3)
  132
- Introduction
  132
- Main Characteristics
  132
- Structure Block Diagram
  133
- Functional Description
  133
- Register Address Mapping
  146
- Register Functional Description
  147
Field

152
Channel 1 Capture/Compare Register (Tmrx_Cc1)

159
- General-Purpose Timer (TMR14)
  161
- Introduction
  161
- Main Characteristics
  161
- Structure Block Diagram
  161
- Functional Description
  162
- Register Address Mapping
  169
- Register Functional Description
  169
- Update Event When the Counter Is Initialized by Trigger Event
  170
- 0: Input Capture DID Not Occur
  171
- 0: Repeat Capture Does Not Occur
  171
- 1: Input Capture Occurred
  171
- 1: Repeat Capture Occurs
  171
- Capture/Compare Channel1 Interrupt Flag When the Capture/Compare Channel 1 Is Configured as Output: 0: no Matching Occurred 1: the Value of Tmrx_Cnt Matches the Value of Tmrx_Cc1
  171
- Cc1Iflg Rc_W0
  171
- Cc1Rcflg Rc_W0
  171
- Reserved
  171
- When a Capture Event Occurs, the Bit Is Set to 1 by Hardware, and It Can be Cleared by Software or Cleared When Reading Tmrx_Cc1
  171
- When the Capture/Compare Channel 1 Is Configured as Input
  171
- General-Purpose Timer (TMR15/16/17)
  176
- Introduction
  176
- Main Characteristics
  176
- Channel 1 Capture/Compare Register (Tmrx_Cc1)
  177
- Structure Block Diagram
  177
- Functional Description
  178
- Reset Value: 0X0000
  189
- TMR15 Register Address Mapping
  189
- TMR15 Register Functional Description
  189
- Field Name R/W Description
  190
- Capture/Compare Channel 1 Value
  199
- CC1 Contains the Current Load Capture/Compare Register Value
  199
- Field Name R/W Description
  199
- Offset Address: 0X38 Reset Value: 0X0000
  199
- Refer to Tmrx_Cc1
  199
- When the Capture/Compare Channel 1 Is Configured as Input Mode
  199
- When the Capture/Compare Channel 1 Is Configured as Output Mode
  199
- TMR16 and TMR17 Register Address Mapping
  202
- TMR16 and TMR17 Register Functional Description
  202
- DMA Control Software (Tmrx_Dctrl)
  211
- Field Name R/W Description
  211
- Offset Address: 0X48 Reset Value: 0X0000
  211
- Basic Timer (TMR6/TMR7)
  213
- Functional Description
  213
- Introduction
  213
- Main Characteristics
  213
- Structure Block Diagram
  213
- Register Address Mapping
  215
- Register Functional Description
  215
- Functional Description
  218
- Infrared Timer (IRTMR)
  218
- Introduction
  218
- Independent Watchdog
  219
- Introduction
  219
- Watchdog Timer (WDT)
  219
- Window Watchdog
  221
- IWDT Register Address Mapping
  222
- IWDT Register Functional Description
  223
- WWDT Register Address Mapping
  225
- WWDT Register Functional Description
  225
- Full Name and Abbreviation Description of Terms
  227
- Introduction
  227
- Main Characteristics
  227
- Real-Time Clock (RTC)
  227
- Structure Block Diagram
  228
- Functional Description
  229
- Register Address Mapping
  234
- Register Functional Description
  235
- Full Name and Abbreviation Description of Terms
  247
- Introduction
  247
- Main Characteristics
  247
- Universal Synchronous/Asynchronous Transceiver (USART)
  247
- Functional Description
  248
- Register Address Mapping
  260
- Register Functional Description
  261
- Full Name and Abbreviation Description of Terms
  271
- Internal Integrated Circuit Interface (I2C)
  271
- Introduction
  271
- Main Characteristics
  271
- Structure Block Diagram
  272
- Functional Description
  273
- Register Address Mapping
  283
- Register Functional Description
  283
- Full Name and Abbreviation Description of Terms
  293
- Introduction
  293
- Main Characteristics
  293
- Serial Peripheral Interface (SPI)
  293
- Functional Description
  294
- Register Address Mapping
  305
- Register Functional Description
  305
- Analog/Digital Converter (ADC)
  312
- Introduction
  312
- Main Characteristics
  312
- Functional Description
  313
- Register Address Mapping
  317
- Register Functional Description
  318
- Cyclic Redundancy Check Computing Unit (CRC)
  324
- Functional Description
  324
- Introduction
  324
- Register Address Mapping
  324
- Register Functional Description
  325
- Chip Electronic Signature
  327
- Functional Description
  327
- Register Functional Description
  327
- Version History
  328

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