Freescale Semiconductor i.MX51 EVK Manuals

Manuals and User Guides for Freescale Semiconductor i.MX51 EVK. We have 1 Freescale Semiconductor i.MX51 EVK manual available for free PDF download: Reference Manual

Freescale Semiconductor i.MX51 EVK Reference Manual

Freescale Semiconductor i.MX51 EVK Reference Manual (198 pages)

Brand: Freescale Semiconductor | Category: Microcontrollers | Size: 2.44 MB

Table of Contents

Section 1

3
- Table of Contents
  3
Section 2

15
- About this Book
  19
- Audience
  19
- Conventions
  19
- Definitions, Acronyms, and Abbreviations
  19
- Suggested Reading
  22
- Introduction
  25
- Software Base
  25
- Features
  26
- Linux BSP Supported Features
  26
- Interrupt Hardware Operation
  31
- Interrupts
  31
- Machine Specific Layer (MSL)
  31
- Interrupt Features
  32
- Interrupt Files
  32
- Interrupt Software Operation
  32
- Interrupt Source Code Structure
  32
- Interrupt Programming Interface
  33
- Timer
  33
- Timer Features
  33
- Timer Hardware Operation
  33
- Timer Software Operation
  33
- Memory Map
  34
- Memory Map Features
  34
- Memory Map Files
  34
- Memory Map Hardware Operation
  34
- Memory Map Software Operation
  34
- Memory Map Source Code Structure
  34
- Timer Source Code Structure
  34
- Iomux
  35
- IOMUX Hardware Operation
  35
- IOMUX Software Operation
  35
- Memory Map Programming Interface
  35
- API for GPIO
  36
- General Purpose Input/Output(GPIO)
  36
- GPIO Software Operation
  36
- IOMUX Features
  36
- IOMUX Files
  36
- IOMUX Programming Interface
  36
- IOMUX Source Code Structure
  36
- GPIO Features
  37
- GPIO Files
  37
- GPIO Programming Interface
  37
- GPIO Source Code Structure
  37
- Hardware Operation
  39
- Overview
  39
- Smart Direct Memory Access (SDMA) API
  39
- Software Operation
  39
- SDMA Block Diagram
  40
- Menu Configuration Options
  41
- SDMA API Source Files
  41
- SDMA Channel Usage
  41
- SDMA Script Files
  41
- Source Code Structure
  41
- Programming Interface
  42
- Usage Example
  42
- Driver Features
  43
- Hardware Operation
  43
- MC13892 Regulator Driver
  43
- Software Operation
  43
- Regulator Apis
  44
- Driver Architecture
  45
- Driver Interface Details
  45
- MC13892 Regulator Driver Architecture
  45
- MC13892 Power Management Driver Files
  46
- Menu Configuration Options
  46
- Source Code Structure
  46
- Driver Access and Control
  47
- Driver Features
  47
- Driver Implementation Details
  47
- MC13892 RTC Driver
  47
- Software Operation
  47
- MC9S08DZ60 RTC Driver Files
  48
- Menu Configuration Options
  48
- Source Code Structure
  48
- Driver Features
  49
- MC13892 Digitizer Driver
  49
- Software Operation
  50
- MC13892 Digitizer Driver Files
  51
- Menu Configuration Options
  51
- Source Code Structure
  51
- CPU Frequency Scaling (CPUFREQ) Driver
  53
- Software Operation
  53
- Source Code Structure
  53
- Board Configuration Options
  54
- CPUFREQ Driver Files
  54
- Menu Configuration Options
  54
- Hardware Operation
  55
- Low Power Modes
  55
- Low-Level Power Management (PM) Driver
  55
- Software Operation
  55
- Menu Configuration Options
  56
- PM Driver Files
  56
- Programming Interface
  56
- Source Code Structure
  56
- Dynamic Voltage Frequency Scaling (DVFS) Driver
  57
- Hardware Operation
  57
- Software Operation
  57
- Board Configuration Options
  58
- DVFS Driver Files
  58
- Menu Configuration Options
  58
- Source Code Structure
  58
- Low Power Audio Playback Mode (LPAPM)
  59
- Software Based Bus Frequency Scaling
  59
- Software Based Peripheral Domain Frequency Scaling
  59
- Board Configuration Options
  60
- Bus Frequency Scaling Driver Files
  60
- High Frequency Setpoint
  60
- Medium Frequency Setpoint
  60
- Menu Configuration Options
  60
- Source Code Structure
  60
- Driver Features
  61
- TV Encoder (TVE) Driver
  61
- TVE Driver Overview
  61
- Hardware Operation
  62
- Software Operation
  62
- Frame Buffer Driver Files
  63
- Menu Configuration Options
  63
- Source Code Structure
  63
- TV-Out Driver Files
  63
- Image Processing Unit (IPU) Drivers
  65
- Hardware Operation
  66
- IPU Module Overview
  66
- Software Operation
  66
- Graphics/Video Drivers Software Interaction
  67
- IPU Frame Buffer Drivers Overview
  68
- IPU Frame Buffer Hardware Operation
  68
- IPU Frame Buffer Software Operation
  68
- Synchronous Frame Buffer Driver
  69
- IPU Driver Files
  70
- IPU Global Header Files
  70
- Menu Configuration Options
  70
- Source Code Structure
  70
- Programming Interface
  73
- Video for Linux Two (V4L2) Driver
  75
- V4L2 Capture Device
  76
- V4L2 Capture Ioctls
  76
- Use of the V4L2 Capture Apis
  78
- Video4Linux2 Capture API Interaction
  78
- V4L2 Output Device
  79
- V4L2 Output Ioctls
  79
- Source Code Structure
  80
- Use of the V4L2 Output Apis
  80
- V2L2 Driver Files
  80
- Menu Configuration Options
  81
- V4L2 Programming Interface
  81
- Hardware Operation
  83
- I.mx5 Dual Display
  83
- Software Operation
  83
- Examples
  85
- Video Processing Unit (VPU) Driver
  87
- Hardware Operation
  88
- VPU Hardware Data Flow
  89
- Source Code Structure
  90
- VPU Driver Files
  90
- Menu Configuration Options
  91
- Programming Interface
  91
- VPU Firmware Files
  91
- VPU Library Files
  91
- Defining an Application
  92
- Driver Features
  93
- Graphics Processing Unit (GPU)
  93
- Hardware Operation
  93
- Software Operation
  93
- API References
  94
- GPU Driver Files
  94
- Menu Configuration Options
  94
- Source Code Structure
  94
- Hardware Operation
  95
- Software Operation
  95
- Windows Acceleration
  95
- Windows Acceleration Architecture
  95
- I.MX X Driver Details
  97
- EGL-X Details
  98
- Setup X Windows Acceleration
  98
- Advanced Linux Sound Architecture (ALSA)
  101
- ALSA Soc Software Architecture
  101
- Soc Sound Card
  101
- System on a Chip (Asoc) Sound Driver
  101
- Asoc Driver Source Architecture
  102
- Sound Card Information
  102
- Stereo Codec Features
  102
- ALSA Soc Source File Relationship
  103
- Hardware Operation
  104
- Menu Configuration Options
  104
- Stereo Audio Codec
  104
- Device Open
  105
- Software Operation
  105
- Sound Card Registration
  105
- S/PDIF Overview
  107
- S/PDIF Transceiver Data Interface Block Diagram
  107
- The Sony/Philips Digital Interface (S/PDIF) Tx Driver
  107
- Hardware Overview
  108
- S/PDIF Tx Driver
  108
- Software Overview
  108
- S/PDIF Driver Files
  110
- Components of a Flash-Based File System
  111
- Hardware Operation
  111
- Software Operation
  111
- SPI nor Flash Memory Technology Device (MTD) Driver
  111
- Driver Features
  112
- Menu Configuration Options
  112
- Source Code Structure
  112
- SPI nor MTD Driver Files
  112
- Hardware Operation
  113
- Low-Level Keypad Driver
  113
- Software Operation
  113
- Keypad Driver State Machine
  114
- Driver Features
  115
- Keypad Driver Files
  115
- Reassigning Keycodes
  115
- Source Code Structure
  115
- Device-Specific Information
  116
- Interrupt Requirements
  116
- Key Connections for Keypad
  116
- Keypad Interrupt Timer Requirements
  116
- Menu Configuration Options
  116
- Programming Interface
  116
- Fast Ethernet Controller (FEC) Driver
  119
- Pin Usage in MII and SNI Modes
  119
- FEC Driver Files
  121
- Software Operation
  121
- Source Code Structure
  121
- Device-Specific Defines
  122
- Menu Configuration Options
  122
- Programming Interface
  122
- Getting a MAC Address
  123
- Boot Security
  125
- Hardware Overview
  125
- Security Drivers
  125
- Kem
  126
- Secure RAM
  126
- Secure RAM Block Diagram
  126
- Zeroizable Memory
  126
- Secure Memory Controller
  127
- Security Key Interface Module
  127
- Security Monitor
  127
- Secure State Controller
  128
- Secure State Controller State Diagram
  128
- Security Monitor Block Diagram
  128
- 22.1.11 Secure Timer
  129
- 22.1.12 Debug Detector
  129
- Algorithm Integrity Checker (AIC)
  129
- Security Controller(SCCV2)
  129
- Security Policy
  129
- Driver Features
  130
- SCC Common Software Operations
  130
- Software Operation
  130
- Menu Configuration Options
  131
- Sccdriver Files
  131
- Source Code Structure
  131
- Board Configuration Option
  132
- Source Code Configuration Options
  132
- API Notes
  135
- Architecture
  135
- Overview
  135
- Software Operation
  135
- Symmetric/Asymmetric Hashing and Random Accelerator (Sahara) Drivers
  135
- Command Queue
  136
- Registration List
  136
- Sahara Architecture Overview
  136
- Initialize and Cleanup
  137
- Result Pools
  137
- Sahara Hardware
  137
- Access Grant
  138
- Sahara Public Interface
  138
- UM Extension
  138
- Blocking/Non-Blocking Definitions
  139
- Command
  139
- 23.2.2.10 Translator
  140
- 23.2.2.11 Polling and Interrupts
  140
- 23.2.2.12 Completion Notification
  140
- 23.2.2.13 Get Results
  141
- Driver Features
  141
- Sahara Header Files
  142
- Sahara Source Files
  142
- Source Code Structure
  142
- Menu Configuration Options
  143
- Programming Interface
  143
- Interrupt Requirements
  144
- I2C Bus Driver Overview
  145
- I2C Device Driver Overview
  145
- Inter-IC (I2C) Driver
  145
- Hardware Operation
  146
- I2C Bus Driver Software Operation
  146
- I2C Device Driver Software Operation
  146
- Software Operation
  146
- Driver Features
  147
- Interrupt Requirements
  147
- Menu Configuration Options
  147
- Programming Interface
  147
- Source Code Structure
  147
- 1-Wire Driver
  149
- Driver Features
  149
- Hardware Operation
  149
- Software Operation
  149
- Source Code Structure
  149
- Menu Configuration Options
  150
- Configurable Serial Peripheral Interface (CSPI) Driver
  151
- Hardware Operation
  151
- Software Operation
  151
- SPI Sub-System in Linux
  151
- Layering of SPI Drivers in SPI Subsystem
  152
- SPI Subsystem
  152
- Software Limitations
  153
- Standard Operations
  153
- CSPI Driver Files
  154
- CSPI Synchronous Operation
  154
- Menu Configuration Options
  154
- Source Code Structure
  154
- CSPI Interrupt Requirements
  155
- Interrupt Requirements
  155
- Programming Interface
  155
- Hardware Operation
  157
- MMC/SD/SDIO Host Driver
  157
- Software Operation
  158
- Driver Features
  159
- MMC Drivers Layering
  159
- Esdhc Driver Filesmmc/Sd Driver Files
  160
- Menu Configuration Options
  160
- Programming Interface
  160
- Source Code Structure
  160
- Hardware Operation
  161
- Universal Asynchronous Receiver/Transmitter (UART) Driver
  161
- Software Operation
  162
- UART Driver Files
  163
- UART Global Header Files
  163
- UART Active/Inactive Configuration
  165
- UART General Configuration
  165
- UART Interrupt Requirements
  165
- UART IRDA Configuration
  165
- UART Mode Configuration
  165
- UART DMA Configuration
  166
- UART DMA RX Buffer Size Configuration
  166
- UART Hardware Flow Control Configuration
  166
- UART Interrupt 1 Configuration
  166
- UART Interrupt Mux Configuration
  166
- UART Shared Peripheral Configuration
  166
- UART UCR4_CTSTL Configuration
  166
- UART UFCR_RXTL Configuration
  166
- UART UFCR_TXTL Configuration
  166
- UART Interrupt 2 Configuration
  167
- UART Interrupt 3 Configuration
  167
- USB Block Diagram
  170
- USB Driver Files
  172
- USB Platform Header Files
  172
- USB Platform Source Files
  172
- USB Common Platform Files
  173
- Default USB Settings
  175
- RTC Driver Files
  180
- WDOG Driver Files
  184
- PWM Block Diagram
  185
- PWM Driver Summary
  186
- PWM Driver Files
  187
- Oprofile Source Files
  191

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