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Fastwel DIC324 manual available for free PDF download: User Manual
Fastwel DIC324 User Manual (44 pages)
PC104 Plus Digital I/O Module with Galvanic Isolation
Brand:
Fastwel
| Category:
I/O Systems
| Size: 1 MB
Table of Contents
Table of Contents
3
Trademarks
5
Ownership Rights
5
Notation Conventions
6
Safety Requirements
7
High Voltage Safe Handling Rules
7
Board Handling Regulations
7
General Board Operation Rules
8
Manufacturer's Warranties
9
1 Introduction
10
Module Technical Features
10
Versions
11
Table 1-1: Ordering Information
11
Module Delivery Checklist
12
Table 1-2: Delivery Checklist
12
Table 1-3: Additional Accessories
12
External View and Location of Components
13
Module External View
13
Fig. 1-1: External View of DIC324
13
Overall and Mounting Dimensions, Location of Main Components
14
Fig. 1-2: Overall Dimensions and Location of Main Components of DIC324
14
2 Functional Description
15
Module Block Diagram
15
Fig. 2-1: Block Diagram of DIC324
15
Location of Main Components
16
Fig. 2-2: Location of the SA1 Base Address Switch
16
Module's Functional Nodes and Interfaces
17
Base FPGA (BASE)
17
System ISA Bus
17
Table 2-1: Identification of ISA Bus Contacts, Row a
17
Table 2-2: Identification of ISA Bus Contacts, Row B
18
Fig. 2-3: Numbering of XS4 Connector Contacts
18
Digital Input Ports (Digital_Inputs)
19
Table 2.3: XP10 Connector Contacts
19
Fig. 2-4: Digital Input Connector
19
Input Channel Diagram
20
Fig. 2-5: Diagram of DIC324 Input Channel
20
Fig. 2-6: Connection Type Jumpers
20
Resistive Assemblies
21
Digital Output Port (Digital_Outputs)
21
Fig. 2-7: XP12 Jumper
21
Fig. 2-8: Digital Output Connector
21
Fig. 2-9: Diagram of the Connector's Ports' Outputs
22
Solid State Relay
23
Table 2-4: Table of XP11 Connector Contacts
23
Base Address Switch
24
Leds
24
Module Power Supply
24
Fig. 2-10: Input Channel 1 Diagram
24
Fig. 2-11: SA1 Base Address Setting Switch
24
3 Module Use
25
Module Preparation for Use
25
General Requirements
25
Electrostatic Safety Requirements
25
External Inspection
25
Readiness Check
26
Installation of DIC324
26
Module's Default Configuration
26
Connection to the Module
27
Module Configuration
27
Main Control Capabilities
27
Setting Base Address
27
Fig. 3-1: SA1 Base Address Setting Switch
28
Jumpers for the Installation of Input Signal Connection Type
29
Table 3-1: SA1 Switch Setting
29
Fig. 3-2: Connection to the Module
30
Table 3-2: Type of Inputs
31
3.2.4 Jumpers for the Installation of Switching Load Type
32
Setting the Range of Input Voltages
32
Table 3-3: Trigger Threshold Per each Group of Eight Input Channels
32
Table 3-4: Setting the Load Type Connection
33
Description of Registers and D11 User Configuration
34
FPGA D11 Configuration - Digital_Inputs
34
Integrated Parts of the Diagram
35
Table 3-5: Control Register
35
Fig. 3-3: Matrix Diagram
35
Table 3-6: Event Front Edge Codes for Groups of Inputs
36
Table 3-7: De-Bouncing Time Codes for Groups of Inputs
36
Table 3-8: Control Register
36
Table 3-9: Register of Interrupts
36
Table 3-10: Register of Inputs
37
Table 3-11: Register of Events
37
Table 3-12: Control Register
38
Table 3-13: Register of Data
38
3.3.2 Configuration FPGA D11 - Digital_Outputs
39
Integrated Parts of the Diagram
39
Purpose of Output Ports
39
Fig. 3-4: Integrated Parts of the Block-Diagram
39
Module Identification
40
Table 3-14: Register of Outputs
40
Table 3-15: Port (Ba+Eh) through Reading
40
Table 3-16: Port (Ba+Fh) through Reading
40
Reprogramming of User FPGA Configuration
41
4 Transportation, Unpacking and Storage
43
Storage
43
Transportation
43
Unpacking
43
Annex a Disclaimer
44
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