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Epson X1B000381A00100 Applications Manual (53 pages)

Real Time Clock Module

Brand: Epson | Category: Control Unit | Size: 1 MB

Notice：please Read Carefully below before the Use of this Document
2
ETM60E Revision History
3
Figure 1 32.768 Khz DTCXO Connection
3
Table of Contents
4
Index
4
Overview
6
Block Diagram
6
Figure 2 Block Diagram
6
Terminal Description
7
Terminal Connections
7
Pin Functions
7
Figure 3 Pin Layout
7
Table 1 Pin Functions
7
Absolute Maximum Ratings
8
Recommended Operating Conditions
8
Frequency Characteristics
8
Table 2 Absolute Maximum Rating
8
Table 3 Recommended Operating Conditions
8
Table 4 Frequency Characteristics
8
Electrical Characteristics
9
DC Characteristics
9
Table 5 DC Characteristics
9
AC Characteristics
10
Figure 4 I 2 C-Bus Timing Chart
10
Table 6 AC Characteristics
10
Reference Characteristics
11
Temperature Compensation and Consumption Current
11
IDD Vs TC Characteristics for Reference
11
Reference Characteristic of I C-Bus Active Current
11
Figure 5 Temperature Compensation Current
11
Figure 6 I 2 C-Bus Current Consumption
11
Table 7 Average Current Consumption IDD1, IDD2
11
Use Methods
12
Description of Registers
12
Write / Read and Bank Select
12
Register Table (Basic Time and Calendar Register)
12
Table 8 Register Division (00H ~ 0Fh)
12
Table 9 Register Table (00H ~ 0Fh)
12
Register Table (Time Stamp, EVIN, SOUT, Timer)
13
Quick Reference
13
Initial Value of Registers
13
Table 10 Register Table (10H ~ 1Fh)
13
Table 11 Quick Reference
13
Table 12 Registers Initial Value
13
Details of Registers
14
Clock Counter (SEC - YEAR)
14
Table 13 Clock, Calendar Register
14
Table 14 WEEK Register
14
Table 15 DAY Register
14
Alarm Registers
15
Figure 7 Internal Clock Distribution Diagram
15
Table 16 Alarm Registers
15
Wakeup Timer Control Registers
16
Control Registers, Flag Registers
16
Table 17 Wakeup Timer Control Registers
16
Table 18 Control Register, Flag Register
16
Table 19 Test Bit
16
Table 20 VLF Bit
16
Table 21 VDET Bit
17
Table 22 RESET Bit
17
SOUT Control Register
18
Table 23 FSEL Bit
18
Table 24 AIE, TIE, UIE Bit
18
Table 25 SOUT Control Register
18
Time Stamp Data Event Controller Register
19
Table 26 DCE, DC Bit
19
Table 27 SRV Bit
19
Table 28 FS Bit
19
Table 29 Time Stamp Data Event Control
19
Table 30 ECP Bit
20
Table 31 EHL Bit
20
Table 32 EPU Bit
20
Table 33 RCE Bit
20
Table 34 EF Bit
20
Figure 8 EVIN Debounce Function
21
Table 35 et Bit
21
Table 36 EIE Bit
21
Table 37 EVMON Bit
21
SOUT Function
22
Various Function of SOUT
22
SOUT Function Program Ex.1
22
Figure 9 SOUT Function Program Ex.1
22
Figure 10 SOUT Function Program Ex.2
23
EVIN Interrupt and Time Stamp Function
24
Time Stamp Program Ex
24
Figure 11 Time Stamp Program Ex
24
Timing Chart of EVIN Time Stamping
25
INT Pin Operation When an Interrupt Occurs
25
Figure 12 EVIN Timing Chart
25
Alarm Interrupt Function
26
Alarm Interrupt Function Register
26
Figure 13 Alarm Interrupt Block Diagram
26
Figure 14 Alarm Function
26
Table 38 Alarm Interrupt Function Register
26
Table 39 WADA Bit
27
Table 40 AF Bit AF Bit
27
Examples of Alarm Settings
28
Table 41 AIE Bit
28
Table 42 Alarm Setting Ex.1
28
Table 43 Alarm Setting Ex.2
28
Alarm Interrupt Timing Chart
29
INT Pin Operation When an Interrupt Occurs
29
Figure 15 Alarm Timing Chart
29
Wakeup Timer Interrupt Function
30
Wakeup Timer Interruption Registers
30
Figure 16 Wakeup Timer Function
30
Table 44 Wakeup Timer Register
30
Figure 16 Wakeup Timer Count down Timing Chart
31
Table 45 TESL Bit
31
Table 46 TSTP Bit
31
Table 47 TRES Bit
31
Wakeup Timer Start Timing
32
Table 48 te Bit
32
Table 49 TF Bit
32
Table 50 TIE Bit
32
Wakeup Timer Interrupt Interval (Example)
33
Figure 18 Wakeup Timer Start Sequence
33
Table 51 Wakeup Timer Interrupt Interval
33
Wakeup Timer Interrupt Timing Chart
34
Figure 19 Wakeup Timer Timing Chart
34
Time Update Interrupt Function
35
Related Registers for Time Update Interrupt Functions
35
Table 52 Update Interrupt Function Register
35
Table 53 USEL Bit
35
Table 54 UF Bit
35
Time Update Interrupt Function Timing Chart
36
Figure 20 Update Interrupt Timing Chart
36
Table 55 UIE Bit
36
Temperature Compensation Function
37
Related Registers for Temperature Compensation Function
37
Table 56 Temperature Compensation Register
37
Table 57 CSEL Bit
37
Reading / Writing Data Via the I
38
Overview of I C-Bus
38
Ra8804Ce Etm60E-03
38
Bus Interface
38
System Configuration
38
Figure 21 I 2 C-Bus Connection
38
Starting and Stopping I
39
Bus Communications
39
Figure 22 I 2 C-Bus Start Stop Timing Cart
39
Figure 22 I 2 C-Bus Restarting Timing
39
Data Transfers and Acknowledge Responses During I C-Bus Communications
40
Figure 24 I 2 C-Bus SDA, SCL
40
Figure 25 I 2 C-Bus Acknowledge Signal
40
Slave Address
41
Table 58 I C-Bus Slave Address
41
I 2 C-Bus Protocol
42
Backup and Recovery
43
Figure 26 VDD Sequence
43
Table 59 VDD Sequence Characteristics
43
About Access at the Time of Backup Return and Initial Power Supply
44
Figure 27 Power on and Restore from Backup Sequence
44
Flow Chart
45
Figure 28 Flow Ex. 1
45
Figure 29 Flow Ex. 2
46
Figure 30 Flow Ex. 3
47
Figure 31 Flow Ex. 4
47
Connection with Typical Microcontroller
48
When Used as a Clock Source (32.768 Khz DTCXO)
48
Figure 32 Circuit Diagram
48
Figure 33 32.768 Khz DTCXO Connection
48
External Dimensions / Marking Layout
49
External Dimensions
49
Marking Layout
49
Figure 34 Package Dimension
49
Figure 35 Marking
49
Application Notes
50
Figure 36 Soldering Profile
50
Figures
51
Tables
51
Contacts
53
Application Manual
53

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