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Computer Automation NAKED MINI LSI Series Programming Reference Manual

Computer Automation NAKED MINI LSI Series Programming Reference Manual (156 pages)

Brand: Computer Automation | Category: Desktop | Size: 8 MB

Table of Contents

Table of Contents
2
General Features
11
Introduction
11
Section 1. GENERAL DESCRIPTION
11
The Naked Mini 16 Lsi Concept
11
Upward Compatibility
11
Characteristics
12
Processor
12
The Alpha 16 Lsi
12
Instruction Set
13
Memory Addressing
14
I/O Structure
15
Processor Options
15
Data Handling Characteristics
17
Data Word Format
17
- Bit Identification
  17
Peripheral Equipment
17
Bit Values
18
Signed Numbers
18
- Positive Numbers
  18
- Negative Numbers
  18
Data Byte Format
19
- Byte Mode Processing
  20
- Register Load
  20
Arithmetic Operations
20
- Data Packing
  20
Data in Memory, One Byte Per Word
21
- Word Addressing
  22
Memory Address Formats
21
Byte Addressing
22
- Indirect Addressing
  23
Indirect Address Pointer Format
23
- Section 2. CONSOLE
  24
Console Switches and Indicators
24
Introduction
24
Switches and Indicators
24
Machine Modes
29
- Stop Mode
  29
- Step Mode
  29
- Run Enable Mode
  29
- Run Mode
  29
- Console Operation
  30
- Console Preparation
  30
- Console Data Entry Procedure
  31
- Console Display Procedure
  32
- Program Execution
  33
Unattended Operation
33
- Instructions and Directives
  34
Introduction
34
- Instruction and Directive Classes
  34
- Symbolic Notation
  34
- Assembler Source Statement Fields
  35
  - Label Field
    35
  - Op Code Field
    35
  - Operand Field
    36
  - Comments Field
    37
- Arithmetic Operations and Overflow
  37
Arithmetic Overflow
37
- Relocatability
  38
Memory Reference Instructions
39
- Word Mode Operations and Instruction Format
  39
  - Word Mode Direct Addressing
    39
Word Mode Memory Reference Instruction Format
39
Byte Mode Operations and Instruction Format
41
Word Mode Addressing Summary
41
Byte Mode Direct Addressing
42
Byte Mode Indirect Addressing
42
- Byte Mode Direct Indexed Addressing
  43
Arithmetic Memory Reference Instructions
43
Byte Mode Indirect Post-Indexed Addressing
43
Byte Mode Summary
43
Byte Mode Addressing Summary
44
Logical Memory Reference Instructions
44
Data Transfer Memory Reference Instructions
45
Program Transfer Memory Reference Instructions
45
Divide
47
Double Word Memory Reference Format
47
Double-Word Memory Reference Instructions
47
Format
47
Instructions
47
NRM Shift Path
49
Format
50
Immediate Instruction Format
50
Immediate Instructions
50
Instructions
50
Conditional Jump Instructions
51
Format
51
Microcoding
51
Conditional Jump Format
52
JOC Microcode Bit Functions
52
Arithmetic Conditional Jump Instructions
53
Control Conditional Jump Instructions
53
Arithmetic Shift Instructions
54
Operand Restrictions and Instruction Format
54
Shift Instructions
54
Single Register Shift Format
54
Logical Left Shift
55
Logical Right Shift
55
Logical Shift Instructions
55
Rotate S Hilt Instructions
56
Double Register (Long) Rotate Shift Instructions
57
Double Register (Long) Shift Instructions
57
A Register Change Instructions
58
Format
58
Register Change Format
58
Register Change Instructions
58
Control Instructions
61
- Format
  61
- Processor Control Instructions
  62
- Mode Control Instructions
  62
- Status Control Instructions
  62
- Interrupt Control Instruction
  63
- Input/Output Instructions
  64
Single Word Input/Output Instruction Format
64
Automatic Input/Output Instruction Format
71
Interrupt Location Auto I/O Instruction Sequence
73
Assembler Control Directives
74
- Conditional Assembly Controls
  74
End Conditional Assembly Directive Format
74
- Program Location Controls
  75
Location Control Directive Format
75
- Formats
  76
- Directives
  76
Data and Symbol Definition Directive Format
76
Program Linkage Directives
77
- Formats
  77
- Directives
  78
Subroutine Definition Directive Formats
78
Subroutine Definition Directives
78
Listing Format and Assembler Input Controls
79
User-Defined Operation Code Directive
80
Control
81
Discussion of Input/Output Operations
81
Introduction
81
Data Transmission
82
Sense
82
Interrupt Operations
85
Non-Input/Output
85
Initialization and Unconditional Output to Line Printer
86
Input/Output
86
Non-Interrupt Input/Output Examples
86
Word and Block Interrupts
86
Initialization and Conditional Control of Line Printer
87
Unconditional Character Read from Teletype Paper Tape Reader
87
Control Instructions
89
Unconditional Instructions
89
Block Transfer Instructions
90
Conditional Instructions
90
Automatic Transfer Instructions
91
General Interrupt Handling
91
Interrupt Structure Examples
91
Examples of Initialization and Enabling Sequences
92
Line Printer Interrupt Initialization Sequence
92
Examples of Interrupt Instructions
93
Line Printer Interrupt Instructions
93
Interrupt Latency
95
Interrupt Service
95
Priority Resolution
95
General Discussion
97
Half-Duplex Usage
97
Section 5. PROCESSOR OPTIONS
97
Teletype
97
Table of Half-Duplex Teletype Instructions
99
Full-Duplex
102
- Automatic Interrupt Data Input from Full-Duplex Teletype
  103
Table of Full-Duplex Teletype Instructions
104
Discussion of Usage
107
Real-Time Clock
107
Autoload
109
Summary Table
109
General
110
Power Fail
110
Power Fail/Restart
110
Restart
110
Interrupt Control Option
111
Programming Examples
111
Appendix A. HEXADECIMAL TABLES
114
Hexadecimal-Decimal Conversions
115
ASCII Teletype Codes
116
Recommended Device Addresses
118
Scratchpad/Page 0 Recommended Interrupt Address Map
119
- Single-Word Memory Reference Instruction Machine Code Format
  128
Byte Immediate Instruction Machine Code Format
129
Conditional Jump Instruction Machine Code Format
129
Control Instruction Machine Code Format
130
Double-Register Shift Instruction Machine Code Format
130
Single-Register Shift Instruction Machine Code Format
130
Automatic Input/Output Instruction Machine Code Format
131
Standard Core Memory Algorithm
140
Assembler Directives
147

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