Sharp LC-22DV510E Service Manual page 95

RAM & SPI FLASH Diagram
1 2
DDR18V
C718
2
100n
1 10V
A
A_MADR0 B_MADR0
C10 E23
A_MADR[0] B_MADR[0]
A_MADR1 A22 U24 B_MADR1
A_MADR[1] B_MADR[1]
A_MADR2 B_MADR2
A9 D24
A_MADR[2] B_MADR[2]
A_MADR3 B_MADR3
B23 V25
A_MADR[3] B_MADR[3]
A_MADR4 B9 D25 B_MADR4
A_MADR[4] B_MADR[4]
A_MADR5 B_MADR5
A23 V24
A_MADR[5] B_MADR[5]
A_MADR6 B_MADR6
C9 D23
A_MADR[6] B_MADR[6]
A_MADR7 C23 W25 B_MADR7 B_BADR_BA2
A_MADR[7] B_MADR[7]
A_MADR8 B8 C25 B_MADR8
A_MADR[8] B_MADR[8]
A_MADR9 B_MADR9
A24 W24
A_MADR[9] B_MADR[9]
A_MADR10 B_MADR10
B22 V23
A_MADR[10] B_MADR[10]
A_MADR11 C8 C24 B_MADR11
A_MADR[11] B_MADR[11]
A_MADR12 B_MADR12
B24 W23
A_MADR[12] B_MADR[12]
A_MADR13 B_MADR13
B7 B25
A_MADR[13] B_MADR[13]
A_MDATA0
C13
B
A_MDATA[0]
A_MDATA1 B_MDATA0
A19 H23
A_MDATA[1] B_MDATA[0]
A_MDATA2 A12 P24 B_MDATA1
A_MDATA[2] B_MDATA[1]
A_MDATA3 B_MDATA2
B19 G24
A_MDATA[3] B_MDATA[2]
A_MDATA4 B_MDATA3
C20 R23
A_MDATA[4] B_MDATA[3]
A_MDATA5 B12 B_MDATA4
R24
A_MDATA[5] B_MDATA[4]
A_MDATA6 C19 G25 B_MDATA5
A_MDAT[6] B_MDATA[5]
A_MDATA7 B_MDATA6
A13 P23
A_MDATA[7] B_MDATA[6]
A_MDATA8 B_MDATA7
B14 H24
A_MDATA[8] B_MDATA[7]
A_MDATA9 C18 J25 B_MDATA8
A_MDATA[9] B_MDATA[8]
A_MDATA10 B_MDATA9
C14 N23
A_MDATA[10] B_MDATA[9]
A_MDATA11 B_MDATA10
A18 J24
A_MDATA[11] B_MDATA[10]
A_MDATA12 B18 N24 B_MDATA11
A_MDATA[12] B_MDATA[11]
A_MDATA13 B_MDATA12
B13 N25
A_MDATA[13] B_MDATA[12]
A_MDATA14 B_MDATA13
B17 J23
A_MDATA[14] B_MDATA[13]
A_MDATA15 C15 M25 B_MDATA14
A_MDATA[15] B_MDATA[14]
B_MDATA15
K23
B_MDATA[15]
A_DDR2_DQS0
A16
A_DQS[0]
A_DDR2_DQSB0 B_DDR2_DQS0
C16 L24
A_DQSB[0] B_DQS[0]
A_DDR2_DQS1 A15 L23 B_DDR2_DQSB0
C
A_DQS[1] B_DQSB[0]
A_DDR2_DQSB1 B_DDR2_DQS1
B15 K24
A_DQSB[1] B_DQS[1]
B_DDR2_DQSB1
K25
B_DQSB[1]
A_DDR2_DQM0 B16
A_DQM[0]
A_DDR2_DQM1 B_DDR2_DQM0
C17 M23
A_DQM[1] B_DQM[0]
B_DDR2_DQM1
M24
B_DQM[1]
A_MCLK C12
A_MCLK
A_MCLKZ B11 G23 B_MCLK
A_MCLKZ B_MCLK
A_MCLKE
C21 F25 B_MCLKZ
A_MCLKE 1 B_MCLKZ
B_MCLKE
T23
B_CKE
A_WEZ B20 U157
A_WEZ
A_RASZ B_WEZ
B10 R25
A_RASZ B_WEZ
A_CASZ B_RASZ
A10 F23
A_CASZ B_RASZ
A_BADR_BA0 A21 E24 B_CASZ
A_BADR[0] B_CASZ
A_BADR_BA1 B_BADR_BA0
B21 T24
A_BADR[1] B_BADR[0]
A_BADR_BA2 B_BADR_BA1
C22 T25
A_BADR[2] B_BADR[1]
A_ODT C11 U23 B_BADR_BA2
A_ODT B_BADR[2]
B_ODT
F24
B_ODT
MSD9WB7PX-2
D
MVREF
D22
MVREF
A_MDATA11 AA_MDATA11
22R
R4
4 5
A_MDATA12 AA_MDATA12
R3 R1602
3 6
A_MDATA9 AA_MDATA9 A_MADR13 22R AA_MADR13
R2 56R
A_MDATA14 2 7 AA_MDATA14
R1
1 8
A_MADR5 AA_MADR5
22R
56R R4
4 5
A_MADR10 AA_MADR10
R1367
R3
3 6
A_MDATA7 22R AA_MDATA7 A_MADR1 AA_MADR1
R4 R2
4 5 2 7
A_MDATA0 AA_MDATA0 A_BADR_BA2 AA_BADR_BA2
R3 R1
3 6 1 8
A_MDATA2 AA_MDATA2
R2 56R
2 7
A_MDATA5 AA_MDATA5
R1380
R1
1 8
56R
A_MADR12 AA_MADR12
E R1369 22R
R4
4 5
A_MADR7 AA_MADR7
R3
R1610
A_MADR9 3 6 AA_MADR9
56R R2
2 7
A_MDATA6 AA_MDATA6 A_MADR3 AA_MADR3
1 8
R1 R1
1 8
A_MDATA1 2 7 AA_MDATA1
R2 56R
A_MDATA3 AA_MDATA3
3 6
R1370
R3
A_MDATA4 AA_MDATA4
4 5
R4
R1368
56R
A_MDATA15 AA_MDATA15 A_MADR2 AA_MADR2
22R 22R 1 8
R4 R1
4 5
A_MDATA8 AA_MDATA8 A_MADR0 AA_MADR0
2 7
R3 R2
3 6
A_MDATA10 AA_MDATA10 A_CASZ 3 6 AA_CASZ
R2 R3
2 7
A_MDATA13 AA_MDATA13 A_RASZ AA_RASZ
4 5
R1 R4
1 8
56R
R1366
A_MADR4 AA_MADR4
22R
R4
4 5
A_MADR6 AA_MADR6
R3 R1314
3 6
A_MADR8 AA_MADR8 A_MCLK 22R AA_MCLK
R2 56R
A_MADR11 2 7 AA_MADR11
R1
1 8
22R
F 56R 56R
AA_MCLKZ A_MCLKZ
R1609
R1350
1 2
3 4
DDR18V
C715 C714 C716 C711 C713
2 2 2 2 2
100n 100n 100n 100n 100n
1 10V 1 10V 1 10V 1 10V 1 10V
AA_MDATA0
DQ0
G8
AA_MDATA1
R1328 DQ1
B_MADR13 BB_MADR13 G2
22R
56R
AA_MDATA2
DQ2
H7
B_MADR5 22R BB_MADR5
R4
B_MADR10 4 5 BB_MADR10 AA_MDATA3
R3 DQ3
3 6 H3
B_MADR1 BB_MADR1
R2
2 7
BB_BADR_BA2 AA_MDATA4
R1 DQ4
1 8 H1
56R
AA_MDATA5
R1373 DQ5
H9
B_MADR12 BB_MADR12
22R
R4
4 5
B_MADR7 BB_MADR7 AA_MDATA6
R3 DQ6
3 6 F1
B_MADR9 BB_MADR9
R2
2 7
B_MADR3 BB_MADR3 AA_DDR2_DQS0
R1 LQDS
1 8 F7
56R
AA_DDR2_DQSB0
R1611
LQDS_P
E8
R1608
AA_DDR2_DQM0
56R LDM
B_MADR2 BB_MADR2 F3
22R 1 8
R1
B_MADR0 BB_MADR0 AA_MDATA7
2 7
R2 DQ7
F9
B_CASZ 3 6 BB_CASZ
R3
B_RASZ 4 5 BB_RASZ AA_MDATA8
R4 DQ8
C8
AA_MDATA9
DQ9
C2
R1349
B_MCLK BB_MCLK AA_MDATA10
22R
56R DQ10
D7
R1315
B_MCLKZ 22R BB_MCLKZ AA_MDATA11
56R DQ11
D3
AA_MDATA12
DQ12
D1
B_MDATA11 BB_MDATA11
22R AA_MDATA13
R4 DQ13
4 5 D9
B_MDATA12 BB_MDATA12
R3
3 6
B_MDATA9 BB_MDATA9 AA_MDATA14
R2 DQ14
2 7 B1
B_MDATA14 BB_MDATA14
R1
1 8
AA_MDATA15
56R DQ15
B9
R1375
AA_DDR2_DQS1
UDQS
B7
AA_DDR2_DQSB1
UDQS_P
A8
AA_DDR2_DQM1
UDM
B3
AVDD_DDR 1k NC1
A2
R1365
MVREF
NC2
E2
AA_BADR_BA2
NC3
C683 L1
2
100n
1 10V NC4
R3
NC5
R7
AA_MADR13
NC6
R8
DDR18V 1k
R1364
C687
2
100n
1 10V
R1371
56R
B_MDATA6
22R 1
R1
B_MDATA1 2
R2
B_MDATA3
3
R3
B_MDATA4
4
R4
R1603
A_ODT AA_ODT
22R
56R
B_MDATA15
22R
R4
R1613
4
B_MDATA8
56R R3
3
A_WEZ 22R 1 8 AA_WEZ B_MDATA10
R1 R2
2
A_MCLKE AA_MCLKE B_MDATA13
2 7
R2 R1
1
A_BADR_BA1 AA_BADR_BA1
3 6
R3 56R
A_BADR_BA0 4 5 AA_BADR_BA0
R1377
R4
B_MDATA7
22R
R4
4
B_MDATA0
R1332 R3
A_DDR2_DQM1 AA_DDR2_DQM1 B_MDATA2 3
22R
56R R2
2
B_MDATA5
R1313 R1
1
A_DDR2_DQM0 22R AA_DDR2_DQM0
56R 56R
R1378
22R
56R
AA_DDR2_DQS0 A_DDR2_DQS0
B_MADR4 22R
R1333 R4
4
B_MADR6
R1331 R3
3
A_DDR2_DQSB0 AA_DDR2_DQSB0 B_MADR8
22R
56R R2
2
B_MADR11
R1335 R1
1
A_DDR2_DQS1 22R AA_DDR2_DQS1
56R 56R
R1330 R1374
A_DDR2_DQSB1 AA_DDR2_DQSB1
22R
56R
3 4
5 6
DDR18V
C723 C721 C722 C719
2 2 2 2 2
100n 100n 100n 100n
1 1 1 1 1
10V 10V 10V 10V
AA_MADR0 BB_MDATA0
A0
M8
AA_MADR1 BB_MDATA1
A1
M3
AA_MADR2 BB_MDATA2
A2
M7
AA_MADR3 BB_MDATA3
A3
N2
AA_MADR4 BB_MDATA4
A4
N8
AA_MADR5 BB_MDATA5
A5
N3
AA_MADR6 BB_MDATA6
A6
N7
AA_MADR7 BB_DDR2_DQS0
A7
P2
AA_MADR8 BB_DDR2_DQSB0
A8
P8
AA_MADR9 BB_DDR2_DQM0
A9
P3
AA_MADR10 BB_MDATA7
A10
M2
AA_MADR11 BB_MDATA8
A11
P7
AA_MADR12 BB_MDATA9
A12
R2
AA_BADR_BA0 BB_MDATA10
BA0
L2
AA_BADR_BA1 BB_MDATA11
BA1
L3
AA_RASZ BB_MDATA12
RAS_P
K7
AA_CASZ
BB_MDATA13
CAS_P
L7
AA_WEZ BB_MDATA14
WE_P
K3
BB_MDATA15
CS_P
L8
AA_MCLKE BB_DDR2_DQS1
CKE
K2
AA_MCLK BB_DDR2_DQSB1
CK
J8
AA_MCLKZ BB_DDR2_DQM1
CK_P
K8
AA_ODT
ODT 150R
K9
R1943
VSS1
A3
BB_BADR_BA2
VSS2
E3
VSS3
J3
VSS4
N1
BB_MADR13
VSS5
P9
DDR18V
1k
R1363
COMMON
C689
2
100n
1 10V
BB_MDATA6
8
7 BB_MDATA1
BB_MDATA3
6
R1346
BB_MDATA4 B_ODT BB_ODT
5 22R
56R
R1612
56R
BB_MDATA15 B_WEZ BB_WEZ
22R 1 8
R1
5
BB_MDATA8 B_MCLKE 2 7 BB_MCLKE
R2
6
BB_MDATA10 B_BADR_BA1 3 6 BB_BADR_BA1
R3
7
BB_MDATA13 B_BADR_BA0 BB_BADR_BA0
4 5
R4
8
SPI_CSN_1
R1327
BB_MDATA7 B_DDR2_DQM1 BB_DDR2_DQM1
22R
56R SPI_SDO
5
BB_MDATA0
R1319 FLASH_WPN
6 BB_MDATA2 B_DDR2_DQM0 BB_DDR2_DQM0
22R
56R SPI_SDI_1
7
BB_MDATA5
R1323
8
B_DDR2_DQS0 22R BB_DDR2_DQS0
56R
R1321
B_DDR2_DQSB0 BB_DDR2_DQSB0
22R
56R
BB_MADR4
R1325
5
BB_MADR6 B_DDR2_DQS1 22R BB_DDR2_DQS1
56R
6
BB_MADR8
R1317
7
BB_MADR11 B_DDR2_DQSB1 BB_DDR2_DQSB1
22R
56R
8
5 6
95
7 8
C720 C717
2
100n 100n
1
10V 10V
DQ0 A0
G8
DQ1 A1
G2
DQ2 A2
H7
DQ3 A3
H3
DQ4 A4
H1
DQ5 A5
H9
DQ6 A6
F1
LQDS A7
F7
LQDS_P A8
E8
LDM A9
F3
DQ7 A10
F9
DQ8 A11
C8
DQ9 A12
C2
DQ10 BA0
D7
DQ11 BA1
D3
DQ12 RAS_P
D1
DQ13 CAS_P
D9
DQ14 WE_P
B1
DQ15 CS_P
B9
UDQS CKE
B7
UDQS_P CK
A8
UDM CK_P
B3
NC1 ODT
A2
NC2 VSS1
E2
NC3 VSS2
L1
NC4 VSS3
R3
NC5 VSS4
R7
NC6 VSS5
R8
OPTIONAL
F181
1V8_VCC
60R
C712 C709 C710 C782
2 2 2
100n 100n 100n 22u
1 10V 1 10V 1 10V 16V
1N4148
SERIAL FLASH
NC
2
3V3_STBY D165
F172
1
330R
C658
2
100n
U158
1 10V
MX25L512
1 CS# 8
R4 VCC
4 5
2 7
R3 SO HOLD#
R1248
3 6
3 6
R2 WP# SCLK 1 100R 2 SPI_SCK
2 7
4 5
R1 SPI_SDI GND SI
1 8
56R SPI_SDI
R1379
100R
VESTEL
17mb60-4
PROJECT NAME :
RAM&SPI_FLASH
SCH NAME :
DRAWN BY : MB60_HW_TEAM
7 8
LC-22DV510
LC-24DV510
DDR18V
A
BB_MADR0
M8
BB_MADR1
M3
BB_MADR2
M7
BB_MADR3
N2
BB_MADR4
N8
BB_MADR5
N3
BB_MADR6
N7
BB_MADR7
P2
BB_MADR8
B
P8
BB_MADR9
P3
BB_MADR10
M2
BB_MADR11
P7
BB_MADR12
R2
BB_BADR_BA0
L2
BB_BADR_BA1
L3
BB_RASZ
K7
BB_CASZ
L7
BB_WEZ
K3
C
L8
BB_MCLKE
K2
BB_MCLK
J8
BB_MCLKZ
K8
BB_ODT
K9
A3
E3
J3
N1
D
P9
DDR18V
E
1
2
3V3_STBY
F
A3
9
TOTAL SHEET:
24-05-2011_13:45
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