Trenton Systems BXT7059 Technical Reference
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Trenton Systems BXT7059 Technical Reference

Intel xeon e5-2400 series 8, 6 and 4-core processor-based shb
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BXT7059 / BXTS7059
7059-xxx
No. 87-0067062-000
Revision A
BIOS SETUP
TECHNICAL REFERENCE
Aptio® 4.x Test Setup Environment (TSE)
For use with BXT7059 or BXTS7059
Intel® Xeon® E5-2400 Series
8, 6 and 4-Core
PROCESSOR-BASED
SHB

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  • Page 1 BXT7059 / BXTS7059 7059-xxx No. 87-0067062-000 Revision A BIOS SETUP TECHNICAL REFERENCE Aptio® 4.x Test Setup Environment (TSE) For use with BXT7059 or BXTS7059 Intel® Xeon® E5-2400 Series 8, 6 and 4-Core PROCESSOR-BASED...
  • Page 2 In no event shall Trenton Systems, Inc. be liable for any defect in hardware or software or loss or inadequacy of data of any kind, or for any direct, indirect, incidental or consequential damages arising out of or in connection with the performance or use of the product or information provided.
  • Page 3 This manual is as complete and factual as possible at the time of printing; however, the information in this manual may have been updated since that time. Trenton Systems Inc. reserves the right to change the functions, features or specifications of their products at any time, without notice.
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  • Page 5: Table Of Contents

    Restore Defaults ............................... 6-2 Save as User Defaults ............................6-2 Restore User Defaults ............................6-2 Boot Overide ..............................6-2 CHAPTER 7 SMBIOS EVENT LOG .....................A-1 Change SMBIOS Event Log Settings......................A-1 View SMBIOS Event Log ..........................A-1 View SYSTEM Event Log ..........................A-1 Trenton Systems Inc.
  • Page 6 BXT7059 / BXTS7059 Technical Reference APPENDIX A BIOS MESSAGES ......................A-1 Introduction...............................A-1 Aptio Boot Flow ..............................A-1 BIOS Beep Codes .............................A-1 PEI Beep Codes ..............................A-1 DXE Beep Codes...............................A-2 BIOS Status Codes ............................A-3 BIOS Status POST Code LEDs ........................A-3 Status Code Ranges............................A-4 SEC Status Codes ............................A-4 SEC Beep Codes...............................A-4...
  • Page 7 BXT7059 / BXTS7059 Technical Reference SHB H ANDLING RECAUTIONS WARNING: This product has components that may be damaged by electrostatic discharge. To protect your system host board (SHB) from electrostatic damage, be sure to observe the following precautions when handling or storing the board: Keep the SHB in its static-shielded bag until you are ready to perform your installation.
  • Page 8 BXT7059 / BXTS7059 Technical Reference This page intentionally left blank Trenton Systems Inc.

  • Page 9: Chapter 1 Starting Aptio® Tse

    SHB hardware and during production may have made subtle changes to some of the settings described in this document. Therefore, some of the options that are described in this document may not exist or may have been modified for use in the BXT7059 / BXTS7059 implementation of the Aptio TSE BIOS utility.

  • Page 10: Aptio® Tse Setup Menu

    ESC : Exit Version 2.15.1227, Copyright © 2012 American Megatrends, Inc. There may be slight differences in the screen shots illustrated in this manual due to Trenton BXT7059 BIOS modifications. Contact Trenton Technical support for any questions regarding the SHBs’...
  • Page 11 BXT7059 / BXTS7059 Technical Reference Starting Aptio® TSE This page intentionally left blank Trenton Systems Inc.

  • Page 12: Chapter 2 Advanced Setup

    BXT7059 / BXTS7059 Technical Reference Advanced Setup Chapter 2 Advanced Setup Introduction Select the Advanced menu item from the Aptio TSE screen to enter the Advanced BIOS Setup screen. You can select any of the items in the left frame of the screen, such as PCI Sub-System Settings, ACPI Settings, CPU Configuration, SATA or SAS Configuration, USB Configuration, and a Super IO configuration if the SHB is equipped with an optional IOB33.
  • Page 13 Advanced Setup BXT7059 / BXTS7059 Technical Reference PCI Sub-System Settings (continued) Option Description PERR# Generation Disabled/Enabled PCI Express Settings There are several sections associated with this BIOS parameter setting as shown below. Short operational descriptions for each setting can be found in the upper left corner of the BIOS set-up screen.

  • Page 14: Acpi Settings

    BXT7059 / BXTS7059 Technical Reference Advanced Setup ACPI Settings This is where you set up your system for use with the ACPI soft control states available on the SHB. The standard BIOS default is the S1 only (CPU Stop Clock) sleep state. The SHB hardware and BIOS supports both the S1 and S3 sleep states and these sleep states are available for selection at the operating system level.

  • Page 15: Runtime Error Logging Configuration

    Advanced Setup BXT7059 / BXTS7059 Technical Reference CPU Configuration (continued) The lower portion of the main menu screen contains processor features that you may elect to enable or disable based on the unique requirements of your system. Here is a partial listing of some of these CPU...

  • Page 16: Sas Configuration

    BXT7059 / BXTS7059 Technical Reference Advanced Setup SATA Configuration (continued) If the SATA Mode selection is changed to the AHCI Mode then the following sub-menu options are available: Option Description Aggressive Link Disabled/Enabled (bold = default setting) - Short operational descriptions for...

  • Page 17: Super Io Configuration

    BXT7059 / BXTS7059 Technical Reference Super IO Configuration The only Super IO component available in a system implementation using a BXT7059 or BXTS7059 is located on the optional IOB33 module. An IOB33 can plug into the SHBs’ P20 I/O Expansion connector.

  • Page 18: Serial Port 1 Configuration

    BXT7059 / BXTS7059 Technical Reference Advanced Setup Super IO Configuration (continued) Serial Port 1 Configuration This option specifies the base I/O port address and Interrupt Request address of serial port 1. The Optimal setting is 2F8/IRQ3. The Fail-Safe setting is Disabled.

  • Page 19: Parallel Port Configuration

    Advanced Setup BXT7059 / BXTS7059 Technical Reference Parallel Port Configuration This option enables/disables the parallel port on the IOB33 and is used to configure the I/O address and operating mode for the parallel port. The default setting is AUTO, but you may elect to change this as needed.

  • Page 20: Serial Port Console Redirection Configuration

    BXT7059 / BXTS7059 Technical Reference Advanced Setup Serial Port Console Redirection Configuration The SHB must have an optional IOB33 installed in order for the BIOS setting to apply. Serial port console redirection is available for use on the IOB33’s COM0 and COM1 serial communication ports. When selected, the serial port console redirection configuration BIOS screen displays the following parameters.

  • Page 21: Intel® I350 Gigabit Network Configuration - Lan0

    Advanced Setup BXT7059 / BXTS7059 Technical Reference Intel® i350 Gigabit Network Configuration – LAN0 Here is where you setup the interface parameters for the Ethernet controller that routes a LAN0 Gigabit interface to the SHB’s I/O plate. LAN0 is connector P4A on the SHB. Listed below are the available network configuration parameters.
  • Page 22 BXT7059 / BXTS7059 Technical Reference Advanced Setup This page intentionally left blank 2-11 Trenton Systems Inc.

  • Page 23: Chapter 3 Chipset Configuration Setup

    Chapter 3 Chipset Configuration Setup Introduction The term “chipset” is a bit of a misnomer for the Trenton BXT7059 and BXTS7059. The “chipset” on these SHBs is really a single component called a “Platform Controller Hub” or PCH. Specifically, the Trenton BXT7059 and BXTS7059 both feature the Intel®...
  • Page 24 This option allows the user to view, select or set to auto the link frequency of the Intel® Quick Path Interconnect or Intel QPI between the dual processors on a BXT7059 board. Trenton recommends using the QPI link defaults. Isoc: Disabled/Enabled QPI Link Speed Mode: Slow, Fast QPI Link Speed Selection: Auto, 6.4GT/s, 7.2GT/s, 8.0GT/s...

  • Page 25: South Bridge Configuration

    BXT7059 / BXTS7059 Technical Reference Chipset Configuration Setup Memory Configuration Parameters (continued): Rank Interleaving: Auto, 1 Way, 2 Way, 3 Way, 4 Way Patrol Scrub: Disabled/Enabled Demand Scrub: Disabled/Enabled Data Scrambling: Disabled/Enabled Device Tagging: Disabled/Enabled Rank Margin: Disabled/Enabled Thermal Throttling: Disabled, OLTT, CLTT...
  • Page 26 Chipset Configuration Setup BXT7059 / BXTS7059 Technical Reference South Bridge Configuration (continued) PCI Express Ports These settings are available for configuring the PCI Express links used for Configuration component interconnects on the board and for the B0 PCIe link routed to the SHB’s edge connector.
  • Page 27 BXT7059 / BXTS7059 Technical Reference Chipset Configuration Setup This page intentionally left blank Trenton Systems Inc.

  • Page 28: Chapter 4 Boot Setup

    BXT7059 / BXTS7059Technical Reference Boot Setup Chapter 4 Boot Setup Introduction Select the Boot Setup menu item from the Aptio TSE screen to enter the BIOS Setup screen. The Boot menu option allows you to access the following the following boot setup features.

  • Page 29: Boot Option Priorities

    Boot Setup BXT7059 / BXTS7059 Technical Reference Boot Option Priorities The following settings allow you to set the system boot priority of where to pull the BIOS settings from in order to perform a system boot. You can set three priority levels and the number of available options within each priority is based on the devices connected to the SHB.
  • Page 30 BXT7059 / BXTS7059Technical Reference Boot Setup This page intentionally left blank Trenton Systems Inc.

  • Page 31: Chapter 5 Security

    BXT7059 / BXTS7059Technical Reference Security Chapter 5 Security Two Levels of Password Protection Security Setup provides both a Supervisor and a User password. If you use both passwords, the Supervisor password must be set first. The system can be configured so that all users must enter a password every time the system boots or when Setup is executed, using either or either the Supervisor password or User password.
  • Page 32 Security BXT7059 / BXTS7059 Technical Reference This page intentionally left blank Trenton Systems Inc.

  • Page 33: Chapter 6 Saving And Exiting Bios Setup And Restoring Defaults

    BXT7059 / BXTS7059 Technical Reference Saving & Exiting Setup Chapter 6 Saving and Exiting BIOS Setup and Restoring Defaults Introduction There are four methods of saving BIOS changes and leaving Aptio TSE listed at the top of this screen: 1 - Save Changes & Exit When you have completed the system configuration changes, select this option to save your BIOS changes and leave Aptio TSE.

  • Page 34: Restore Defaults

    Saving & Exiting Setup BXT7059 &BXTS7059 Technical Reference The following menu options for BIOS defaults are available: Restore Defaults Aptio TSE automatically sets all Aptio TSE options to a complete set of factory default settings when you select this option.
  • Page 35 BXT7059 / BXTS7059 Technical Reference Saving & Exiting Setup This page intentionally left blank Trenton Systems Inc.

  • Page 36: Chapter 7 Smbios Event Log

    BXT7059 / BXTS7059 Technical Reference Saving & Exiting Setup Chapter 7 SMBIOS Event Log Change SMBIOS Event Log Settings Use the Aptio TSE menu screen options to set up the system event log reporting format and configuration options for the BIOS.

  • Page 37: Appendix Abios Messages

    BXT7059 / BXTS7059 Technical Reference Appendix A Appendix A BIOS Messages Introduction A status code is a data value used to indicate progress during the boot phase. These codes are outputted to I/O port 80h on the SHB. Aptio 4.x core outputs checkpoints throughout the boot process to indicate the task the system is currently executing.

  • Page 38: Dxe Beep Codes

    Appendix A BXT7059 / BXTS7059 Technical Reference DXE Beep Codes # of Beeps Description Some of the Architectural Protocols are not available No Console Output Devices are found No Console Input Devices are found Invalid password Flash update is failed...

  • Page 39: Bios Status Codes

    The POST code checkpoints are the largest set of checkpoints during the BIOS pre-boot process. The following chart is a key to interpreting the POST codes displayed on LEDs 0 through 7 on the BXT7059 and BXTS7059 SHBs. Refer to the board layout in the Specifications chapter for the exact location of the POST code LEDs.

  • Page 40: Status Code Ranges

    Appendix A BXT7059 / BXTS7059 Technical Reference Status Code Ranges Status Code Range Description 0x01 – 0x0F SEC Status Codes & Errors 0x10 – 0x2F PEI execution up to and including memory detection PEI execution after memory detection 0x30 – 0x4F 0x50 –...
  • Page 41 BXT7059 / BXTS7059 Technical Reference Appendix A PEI Status Codes Status Code Description Progress Codes 0x10 PEI Core is started 0x11 Pre-memory CPU initialization is started 0x12 Pre-memory CPU initialization (CPU module specific) 0x13 Pre-memory CPU initialization (CPU module specific)
  • Page 42 Appendix A BXT7059 / BXTS7059 Technical Reference PEI Error Codes 0x50 Memory initialization error. Invalid memory type or incompatible memory speed 0x51 Memory initialization error. SPD reading has failed 0x52 Memory initialization error. Invalid memory size or memory modules do not match.

  • Page 43: Pei Beep Codes

    BXT7059 / BXTS7059 Technical Reference Appendix A PEI Beep Codes # of Beeps Description Memory not Installed Memory was installed twice (InstallPeiMemory routine in PEI Core called twice) Recovery started DXEIPL was not found DXE Core Firmware Volume was not found...
  • Page 44 Appendix A BXT7059 / BXTS7059 Technical Reference 0x7A – 0x7F Reserved for future AMI DXE codes 0x80 – 0x8F OEM DXE initialization codes 0x90 Boot Device Selection (BDS) phase is started 0x91 Driver connecting is started 0x92 PCI Bus initialization is started...

  • Page 45: Dxe Beep Codes

    BXT7059 / BXTS7059 Technical Reference Appendix A 0xB8 – 0xBF Reserved for future AMI codes 0xC0 – 0xCF OEM BDS initialization codes DXE Error Codes 0xD0 CPU initialization error 0xD1 North Bridge initialization error 0xD2 South Bridge initialization error 0xD3...

  • Page 46: Acpi/Asl Status Codes

    Appendix A BXT7059 / BXTS7059 Technical Reference ACPI/ASL Status Codes Status Code Description 0x01 System is entering S1 sleep state 0x02 System is entering S2 sleep state 0x03 System is entering S3 sleep state 0x04 System is entering S4 sleep state...

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