Pin No.
Pin Name
I/O
101
VSS1
—
102
VDD0
—
103
AVSS
—
104
AVDD
—
105
PLLCK
I/O
106
XPLLEN
I
107
TST
I
108
LRCT
I
109
LROUT
O
110
BKOUT
O
111
VSS2
—
112
VDD1
—
113
BCK0
I
114
BCK1
I
115
LRCK0
I
116
LRCK1
I
117 -120
SIA - SID
I
Ground
Power supply +3.3 V
Ground for PLL cell
VDD for PLL cell
PLL output/test clock input (Not connected)
PLL cell oscillation enable "L" oscillation enable "H" oscillation stop (Connected to ground)
Test data input "L" = normal "H" = test (Connected to ground)
Frequency counter input (Connected to ground)
LRCK0 divider output
BCK0 divider output
Ground
Power supply +3.3 V
BCK input
BCK input
LRCK input
LRCK input
Serial data input
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Description