Commodore VIC-20 Programmer's Reference Manual page 173

ROR
RO R Rufa (c our bit tigh t f memory or accumulator}
ROR
Operation:
7 6 5 U
3 | 2 | 1 | g I ' N C T D V
(Ref; 10.4)
Addressing
Mode
Accumulator
Zero Page
Zero Page.X
Absolute
AbsoIuCetX
Asseobly Lingua^e
Form
ROR A
ROft Oper
ROR Oper.S
ROR Oper
ROR Oper,X
np
CODE
6A
66
76
6E
7E
Ho.
Bytes
1
2
2
3
3
No.
Cycles
2
5
6
6
7
Note: ROR Instruction will be available on HCS65OX micro
processors after June, 1976.
RTI
Operation: Pt PC+
RTI Return from interrupt
(Ref: 9.6)
RTI
N Z C I D V
From Stack.
Addressing
Mode
Implled
Assembly Language
Fottd
RTI
OP
CODE
So.
Bytes
1
Cycles
6
RTS
RTS Return from subroutine
Operation; PC*, PC + 1-* PC
{Ref: 8.2)
N 2.
RTS
Addressing
Mode
ImpLied
Assembly Language
Fona
RTS
OP
CODE
60
Jio.
Bytes
1
No.
Cycles
6
157