Force Computers SPARC/CPU-5TE Installation Manual

Hide thumbs

Table Of Contents

Table of Contents

Quick Links

Download this manual

Enlarged version

SPARC/CPU-5TE

Installation Guide

P/N 203739 Edition 5.0

February 1999

FORCE COMPUTERS Inc./GmbH

This document shall not be duplicated, nor its contents used

for any purpose, unless express permission has been granted.

Table of Contents

Need help?

Do you have a question about the SPARC/CPU-5TE and is the answer not in the manual?

Questions and answers

Summary of Contents for Force Computers SPARC/CPU-5TE

Page 1: Installation Guide
SPARC/CPU-5TE Installation Guide P/N 203739 Edition 5.0 February 1999 FORCE COMPUTERS Inc./GmbH All Rights Reserved This document shall not be duplicated, nor its contents used for any purpose, unless express permission has been granted. Copyright by FORCE COMPUTERS...
Page 2 World Wide Web: www.forcecomputers.com 24-hour access to on-line manuals, driver updates, and application notes is provided via SMART, our SolutionsPLUS customer support program that provides current technical and services information. Headquarters The Americas Europe Asia Inc. GmbH Japan KK ORCE OMPUTERS ORCE OMPUTERS...
Page 3: Table Of Contents
1.6.1 Features of the Front Panel .................... 25 1.8 SPARC CPU-5TE Connectors...................... 26 1.8.1 Twisted Pair Ethernet Connector Pinout ............... 27 1.8.2 Serial Port A and B Connector Pinout................28 1.8.3 Keyboard/Mouse Connector Pinout ................30 FORCE COMPUTERS Page i...
Page 4 Jumper Setting for IOBP-10 ................. 32 1.9 IOBP-DS............................37 1.9.1 Jumper Setting for IOBP-DS ..................37 1.9.2 IOBP-DS P2 Connector Pinout ..................38 1.10 How to Determine the Ethernet Address and Host ID..............43 1.11 History of the Manual ........................44 Page ii FORCE COMPUTERS...
Page 5 Figure 6. Twisted Pair Ethernet ....................... 27 Figure 7. Serial Ports A and B Connector Pinout ................29 Figure 8. Keyboard/Mouse Connector .................... 30 Figure 9. The IOBP-10 ........................32 Figure 10. The IOBP-DS ........................37 FORCE COMPUTERS Page iii...
Page 6 IOBP-DS J2 Pinout (SCSI #2) ..................40 Table 18. IOBP-DS J3 Pinout (Ethernet #1 - AUI) ................. 41 Table 19. IOBP-DS J4 Pinout (Serial A and B)................42 Table 20. IOBP-DS J5 Pinout (Keyboard/Mouse)................42 Table 21. History of Manual ......................44 Page iv FORCE COMPUTERS...
Page 7: Getting Started
Installation Guide Getting Started This Installation Guide provides guidelines for powering up the SPARC/CPU-5TE board. The Installation Guide, which you have in your hand now, appears both as Section 2 of the SPARC CPU-5TE Technical Reference Manual and as a stand-alone Installation Guide. The SPARC CPU-5TE Technical Reference Manual is also available from FORCE COMPUTERS.
Page 8: Figure 1. Diagram Of The Cpu-5Te (Top View)
Installation Guide SPARC/CPU-5TE FIGURE 1. Diagram of the CPU-5TE (Top View) SW10 J 124 Lower Reset (#1) Boot Flash Micro Abort Memory SPARC-II Upper 7-Segment (#2) Display J 125 Rotary Status LEDs User LEDs Keyboard Mouse S4-VME A and B...
Page 9: Figure 2. Diagram Of The Cpu-5Te (Bottom View)
SPARC/CPU-5TE Installation Guide FIGURE 2. Diagram of the CPU-5TE (Bottom View) SW12 SW13 FORCE COMPUTERS Page 3...
Page 10: Before Powering Up
Installation Guide SPARC/CPU-5TE Before Powering Up Before powering up, please make sure that the default switch settings are all set according to the table below. Check these switch settings before powering up the SPARC CPU-5TE because the board is configured for power up according to these default settings. For the position of the switches on the board, please see the diagrams on the previous two pages.
Page 11 SPARC/CPU-5TE Installation Guide Table 1: Default Switch Settings (cont.) Default Diagram of Switch Switches Function Setting SWITCH 7 SW7-1 SCSI#1 termination for Front Panel OFF = Automatic (When a connector is plugged into the front panel SCSI connector, then termi- nation is disabled.
Page 12 Installation Guide SPARC/CPU-5TE Table 1: Default Switch Settings (cont.) Default Diagram of Switch Switches Function Setting SWITCH 10 SW10-1 Test Switch, must be SW10-2 VMEbus Slot-1 Device ON = Automatic Slot-1 Device Recognition OFF = Not Slot-1 Device SWITCH 11...
Page 13 SPARC/CPU-5TE Installation Guide Table 1: Default Switch Settings (cont.) Default Diagram of Switch Switches Function Setting SWITCH 13 SW13-1 User Flash EPROM write protection ON = disable, OFF = enable SW13-2 Boot Flash EPROM write protection ON = disable, OFF = enable...
Page 14: Memory Module Mem-5
Installation Guide SPARC/CPU-5TE 1.3.2 Memory Module MEM-5 It is necessary to install the memory module on the board before powering up. For instructions on installing the MEM-5, please see the document How to Install MEM-5. Memory Module # 1 must be installed for power up because it holds conﬁguration information for booting the board.
Page 15: Powering Up
SPARC/CPU-5TE Installation Guide Powering Up The initial power up can easily be done by connecting a terminal to ttya (serial port A). The advantage of using a terminal is that no frame buffer, monitor, or keyboard is used for initial power up, which facilitates a simple startup.
Page 16: Reset And Abort Key Enable
Installation Guide SPARC/CPU-5TE 1.4.4 RESET and ABORT Key Enable To enable the RESET and the ABORT functions on the front panel, set switches SW6-1 (RESET) and SW6-2 (ABORT) to ON. This is the default setting. 1.4.5 Front Panel SCSI#1 Termination Please note how the SCSI#1 termination works on the front panel.
Page 17: Boot Flash Eprom Write Protection
SPARC/CPU-5TE Installation Guide 1.4.7 Boot Flash EPROM Write Protection Both Boot Flash EPROMs are write protected via the switch SW13-2. When SW13-2 is OFF, the devices are write protected, and this is the default setting. 1.4.8 User Flash EPROM Write Protection The optional User Flash EPROMs are write protected via SW13-1.
Page 18: Floppy Interface Or Scsi#2 Availability On P2
Installation Guide SPARC/CPU-5TE 1.4.10 Floppy Interface or SCSI#2 Availability on P2 It is important to understand that the availability of both the floppy and SCSI#2 devices at the same time is dependent upon the availability of a 5-row P2 connector. When using a 3-row P2 connector, you have the choice of either the floppy or the SCSI#2 on P2.
Page 19: Network Interface Selection (Nis) For Ethernet
SPARC/CPU-5TE Installation Guide 1.4.11 Network Interface Selection (NIS) for Ethernet It is important to understand that the Ethernet is selected either via the twisted pair connector or the AUI (Attachment Unit Interface). When you boot your system and a connection exists with an AUI network, then the AUI is automatically selected.
Page 20: Openboot Firmware
Installation Guide SPARC/CPU-5TE OpenBoot Firmware This chapter describes the use of OpenBoot firmware. Specifically, you will read how to perform the following tasks. • Boot the System • Run Diagnostics • Display System Information • Reset the System • OpenBoot Help For detailed information concerning OpenBoot, please see the OPEN BOOT PROM 2.0...
Page 21 SPARC/CPU-5TE Installation Guide The boot command has the following format: boot [device-specifier] [filename] [-ah] The optional parameters are described as follows. [device-specifier] The name (full path or alias) of the boot device. Typical values are cdrom, disk, floppy, net or tape.
Page 22: Table 2. Device Alias Definitions
Installation Guide SPARC/CPU-5TE To retrieve a list of all device alias definitions, type devalias at the Forth Monitor command prompt. The following table lists some typical device aliases: Table 2: Device Alias Deﬁnitions Alias Boot Path Description disk /iommu/sbus/espdma/esp/sd@3,0 Default disk (1st internal) SCSI-ID 3...
Page 23: Nvram Boot Parameters
SPARC/CPU-5TE Installation Guide 1.5.2 NVRAM Boot Parameters The OpenBoot firmware holds configuration parameters in NVRAM. At the Forth Monitor prompt, type printenv to see a list of all available configuration parameters. The OpenBoot command setenv may be used to set these parameters.
Page 24: Diagnostics
Installation Guide SPARC/CPU-5TE 1.5.3 Diagnostics At power on or after reset, the OpenBoot firmware executes POST. If the NVRAM configuration parameter diag-switch? is true for each test, a message is displayed on a terminal connected to the first serial port. In case the system is not working correctly, error messages indicating the problem are displayed.
Page 25 SPARC/CPU-5TE Installation Guide To test all the SCSI buses installed in the system, type: probe-scsi-all /iommu@0,10000000/sbus@0,10001000/esp@2,100000 Target 6 Unit 0 Disk Removable Read Only Device SONY CD-ROM CDU-8012 3.1a /iommu@0,10000000/sbus@0,10001000/espdma@4,8400000/esp@4,8800000 Target 3 Unit 0 Disk MICROP 1684-07MB1036511AS0C1684 The actual response depends on the devices on the SCSI buses.
Page 26 Installation Guide SPARC/CPU-5TE and tested and you will receive the ok prompt. If the PROM or the on-board memory is not working, you receive one of a number of possible error messages indicating the problem. To test the clock function, type: watch-clock Watching the ‘seconds’...
Page 27: Display System Information
SPARC/CPU-5TE Installation Guide 1.5.4 Display System Information The Forth Monitor provides several commands to display system information. These commands let you display the system banner, the Ethernet address for the Ethernet controller, the contents of the ID PROM, and the version number of the OpenBoot firmware.
Page 28: Reset The System
Installation Guide SPARC/CPU-5TE 1.5.5 Reset the System If your system needs to be reset, you either press the reset button on the front panel or, if you are in the Forth Monitor, type reset on the command line. reset The system immediately begins executing the Power On SelfTest (POST) and initialization procedures.
Page 29 SPARC/CPU-5TE Installation Guide An example of how to get help for special forth words or subcategories. help tools Category: Tools (memory, numbers, new commands, loops) Sub-categories are: Memory access Arithmetic Radix (number base conversions) Numeric output Deﬁning new commands Repeated loops...
Page 30: Front Panel
Installation Guide SPARC/CPU-5TE Front Panel FIGURE 5. Diagram of the Front Panel SPARC CPU-5TE RESET ABORT RUN BM ETH-TP 2 ETH-TP 1 Page 24 FORCE COMPUTERS...
Page 31: Features Of The Front Panel
SPARC/CPU-5TE Installation Guide 1.6.1 Features of the Front Panel • Reset and Abort key • Status LEDs on the front panel • Hex display on the front panel These features are described in detail in Section 3 of the SPARC CPU-5TE Technical Reference Manual.
Page 32: Sparc Cpu-5Te Connectors
Installation Guide SPARC/CPU-5TE SPARC CPU-5TE Connectors The connectors on the SPARC CPU-5TE are listed in the following table. Table 6: SPARC CPU-5TE Connectors Manufacturer Part Function Location Type Number Ethernet # 1 Front Panel RJ-45 AMP 555131-1 (Twisted Pair) Ethernet # 2...
Page 33: Twisted Pair Ethernet Connector Pinout
SPARC/CPU-5TE Installation Guide 1.8.1 Twisted Pair Ethernet Connector Pinout The following table shows the pinout of the twisted pair Ethernet connector. The pinout for both of the connectors is identical. Table 7: Twisted Pair Ethernet Connector Pinout Signal Number Name...
Page 34: Serial Port A And B Connector Pinout
Installation Guide SPARC/CPU-5TE 1.8.2 Serial Port A and B Connector Pinout The following table is a pinout of the serial port connector. The figure on the next page shows the serial port connector and location of the pin numbers. Table 8: Serial Port A and B Connector Pinout...
Page 35: Figure 7. Serial Ports A And B Connector Pinout
SPARC/CPU-5TE Installation Guide FIGURE 7. Serial Ports A and B Connector Pinout FORCE COMPUTERS Page 29...
Page 36: Keyboard/Mouse Connector Pinout
Installation Guide SPARC/CPU-5TE 1.8.3 Keyboard/Mouse Connector Pinout The keyboard and mouse port is available on the front panel via a Mini DIN connector. Table 9: Keyboard/Mouse Connector Pinout Function +5VDC Mouse In Keyboard Out Keyboard In Mouse Out +5VDC FIGURE 8.
Page 37: Vme P2 Connector Pinout
SPARC/CPU-5TE Installation Guide 1.8.4 VME P2 Connector Pinout The SCSI#2 interface is an alternative to the FDC interface. The signals for rows Z and D are only available on the 5-row P2 Connector. Table 10: VME P2 Connector Pinout Signal Row C...
Page 38: The Iobp-10 Connectors
Installation Guide SPARC/CPU-5TE 1.8.5 The IOBP-10 Connectors The IOBP-10 is an I/O back panel on VMEbus P2 with ﬂat cable connectors for SCSI, serial I/O, Centronics/ﬂoppy interface, and a micro D-Sub connector for the Ethernet#1 interface. The Centronics interface on the IOBP-10 is not supported by the CPU-5TE. This back panel can be plugged into the VMEbus P2 connector.
Page 39: Table 11. Iobp-10 P1 Pinout
SPARC/CPU-5TE Installation Guide Table 11: IOBP-10 P1 Pinout ROW A Signal ROW B Signal ROW C Signal SCSI Data 0 N.C. FPY DENSEL SCSI Data 1 FPY DENSENS SCSI Data 2 N.C. N.C. SCSI Data 3 N.C. FPY INDEX SCSI Data 4 N.C.
Page 40: Table 12. Iobp-10 P2 Pinout (Scsi #1)
Installation Guide SPARC/CPU-5TE Table 12: IOBP-10 P2 Pinout (SCSI #1) Signal Signal SCSI #1 Data 0 SCSI #1 Data 1 SCSI #1 Data 2 SCSI #1 Data 3 SCSI #1 Data 4 SCSI #1 Data 5 SCSI #1 Data 6...
Page 41: Table 13. Iobp-10 P3 Pinout (Floppy)
SPARC/CPU-5TE Installation Guide Table 13: IOBP-10 P3 Pinout (Floppy) Signal Signal FPY EJECT FPY DENSEL FPY DENSENS N.C. FPY INDEX FPY DRVSEL N.C. N.C. FPY MOTEN FPY DIR FPY STEP FPY WRDATA FPY WRGATE FPY TRACK0 N.C. FPY WRPROT FPY RDDATA...
Page 42: Table 14. Iobp-10 P5 Pinout (Serial)
Installation Guide SPARC/CPU-5TE Table 14: IOBP-10 P5 Pinout (Serial) Signal Signal RESERVED RESERVED RESERVED TxD Port B TxD Port A RxD Port B RxD Port A RTS Port B RTS Port A CTS Port B CTS Port A Table 15: IOBP-10 Pinout (Ethernet)
Page 43: Iobp-Ds
SPARC/CPU-5TE Installation Guide IOBP-DS The IOBP-DS is an I/O back panel on VMEbus P2 with ﬂat cable connectors for SCSI #1, SCSI #2, serial I/O, keyboard/mouse and a micro D-Sub connector for the Ethernet #1 interface (AUI). This back panel can be plugged into the VMEbus P2 connector. The diagram below shows all the connectors.
Page 44: Iobp-Ds P2 Connector Pinout
Installation Guide SPARC/CPU-5TE 1.9.2 IOBP-DS P2 Connector Pinout Signal Row C Signal Signal (SCSI#2 Row A Row B signals) SCSI#1-D0 SCSI#2-D0 SCSI#1-D1 SCSI#2-D1 SCSI#1-D2 N.C. SCSI#2-D2 SCSI#1-D3 N.C. SCSI#2-D3 SCSI#1-D4 N.C. SCSI#2-D4 SCSI#1-D5 N.C. SCSI#2-D5 SCSI#1-D6 N.C. SCSI#2-D6 SCSI#1-D7 N.C.
Page 45: Table 16. Iobp-Ds J1 Pinout (Scsi #1)
SPARC/CPU-5TE Installation Guide Table 16: IOBP-DS J1 Pinout (SCSI #1) Signal Signal SCSI #1 Data 0 SCSI #1 Data 1 SCSI #1 Data 2 SCSI #1 Data 3 SCSI #1 Data 4 SCSI #1 Data 5 SCSI #1 Data 6...
Page 46: Table 17. Iobp-Ds J2 Pinout (Scsi #2)
Installation Guide SPARC/CPU-5TE Table 17: IOBP-DS J2 Pinout (SCSI #2) Signal Signal SCSI #2 Data 0 SCSI #2 Data 1 SCSI #2 Data 2 SCSI #2 Data 3 SCSI #2 Data 4 SCSI #2 Data 5 SCSI #2 Data 6...
Page 47: Table 18. Iobp-Ds J3 Pinout (Ethernet #1 - Aui)
SPARC/CPU-5TE Installation Guide Table 18: IOBP-DS J3 Pinout (Ethernet #1 - AUI) Function Collision+ Transmit Data+ Receive Data+ N.C. Collision- Transmit Data- Receive Data- +12VDC N.C. FORCE COMPUTERS Page 41...
Page 48: Table 19. Iobp-Ds J4 Pinout (Serial A And B)
Installation Guide SPARC/CPU-5TE Table 19: IOBP-DS J4 Pinout (Serial A and B) Signal Signal RESERVED RESERVED RESERVED RESERVED TxD Port B TxD Port A RxD Port B RxD Port A RTS Port B RTS Port A CTS Port B CTS Port A...
Page 49: How To Determine The Ethernet Address And Host Id
How to Determine the Ethernet Address and Host ID In order to see the Ethernet address and host ID, type the following command at the prompt: ok banner The information below explains how the SPARC/CPU-5TE Ethernet address and the host ID are determined. The 48-bit (6-byte) Ethernet address...
Page 50: History Of The Manual
Installation Guide SPARC/CPU-5TE 1.11 History of the Manual Below is a description of the publication history of this SPARC/CPU-5TE Installation Guide. Table 21: History of Manual Edition No. Description Date of Last Change First Print June 1995 Row C of VME P2 Connec-...