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Appendix
A: Watchdog Timer (WDT) Setting
WDT is widely applied to industry computers to monitor CPU activities. The
programmed application triggers WDT by adequate timer setting depending on
its requirement. Before WDT counts down to zero, the functional system will
reset the counter. In case the WDT counter is not reset by an abnormal system,
it will count down to zero and then reset the system automatically.
This computer supports the watchdog timer up to 255 levels for users for
software programming. Hereunder is the source code written in C for a WDT
application example.
Sample code:
outportb(0x2e, 0x87);
outportb(0x2e, 0x87);
outportb(0x2e, 0x07);
outportb(0x2e+1, 0x07);
outportb(0x2e, 0xf5);
outportb(0x2e+1, 0x40);
outportb(0x2e, 0xf0);
outportb(0x2e+1, 0x81);
outportb(0x2e, 0xf6);
outportb(0x2e+1, 0x05);
outportb(0x2e, 0xF5);
outportb(0x2e+1, 0x20);
outportb(0x2e, 0xAA);
/* initial IO port */
/* twice, */
/* point to logical device */
/* select logical device 7 */
/* select offset f5h */
/* set bit5 = 1 to clear bit5 */
/* select offset f0h */
/* set bit7 =1 to enable WDTRST# */
/* select offset f6h */
/* update offset f6h to 0ah :10sec */
/* select offset f5h */
/* set bit5 = 1 enable watch dog time */
/* stop program F71869E, Exit */
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