LG 55LV355C-UA Service Manual page 28

Led lcd tv
Hide thumbs Also See for 55LV355C-UA:
Table of Contents

Advertisement

+3.3V_Normal
MODEL OPTION
OPT
R201
100
IF_AGC_SEL
MODEL_OPT_0
R202
OPT
100
LNA2_CTL
MODEL_OPT_1
OPT
100
R203
RF_SWITCH_CTL
MODEL_OPT_2
R204
100
MODEL_OPT_3
OPT
R210
100
MODEL_OPT_4
OPT
R213
0
MODEL_OPT_5
R216
OPT
0
MODEL_OPT_6
OPT
CK+_HDMI1
CK-_HDMI1
D0+_HDMI1
D0-_HDMI1
D1+_HDMI1
D1-_HDMI1
D2+_HDMI1
D2-_HDMI1
DDC_SDA_1
DDC_SCL_1
HPD1
CK+_HDMI4
CK-_HDMI4
D0+_HDMI4
D0-_HDMI4
D1+_HDMI4
D1-_HDMI4
D2+_HDMI4
D2-_HDMI4
DDC_SDA_4
DDC_SCL_4
HPD4
CEC_REMOTE_S7
R4024
22
DSUB_HSYNC
R4025
22
DSUB_VSYNC
R228
33
C204
0 . 0 4 7 u F
DSUB_R+
R229
68
C205
0 . 0 4 7 u F
R230
33
C206
0 . 0 4 7 u F
DSUB_G+
R231
68
C207
0 . 0 4 7 u F
R232
33
C208
0 . 0 4 7 u F
DSUB_B+
R233
68
C209
0 . 0 4 7 u F
C210
1000pF
R253
33
C211
0 . 0 4 7 u F
R254
68
C212
0 . 0 4 7 u F
R255
C213
33
0 . 0 4 7 u F
R256
68
C214
0 . 0 4 7 u F
R257
33
0 . 0 4 7 u F
C215
R258
68
C216
0 . 0 4 7 u F
R236
0
C217
1000pF
R237
33
C218
0 . 0 4 7 u F
COMP2_Pr+
R238
68
C219
0 . 0 4 7 u F
R239
33
C220
0 . 0 4 7 u F
COMP2_Y+
R240
68
C221
0 . 0 4 7 u F
R241
33
C222
0 . 0 4 7 u F
COMP2_Pb+
R242
68
C223
0 . 0 4 7 u F
C224
1000pF
C248
0 . 0 4 7 u F
R244
33
C225
0 . 0 4 7 u F
TU_CVBS
R245
33
C226
0 . 0 4 7 u F
R246
33
C227
0 . 0 4 7 u F
AV_CVBS_IN
R4016
33
C4057
0 . 0 4 7 u F
SIDEAV_CVBS_IN
R248
33
C229
0 . 0 4 7 u F
Delete CHB_CVBS_IN
R249
33
C230
0 . 0 4 7 u F
AV_CVBS_IN2
R250
33
C231
0 . 0 4 7 u F
C203
R251
33
C232
0 . 0 4 7 u F
1000pF
OPT
TP210
R252
68
C233
0 . 0 4 7 u F
Close to MSTAR
AV_CVBS_IN2
TP211
THE SYMBOL MARK OF THIS SCHEMETIC DIAGRAM INCORPORATES
SPECIAL FEATURES IMPORTANT FOR PROTECTION FROM X-RADIATION.
FILRE AND ELECTRICAL SHOCK HAZARDS, WHEN SERVICING IF IS
ESSENTIAL THAT ONLY MANUFATURES SPECFIED PARTS BE USED FOR
THE CRITICAL COMPONENTS IN THE SYMBOL MARK OF THE SCHEMETIC.
©
Copyrig h t
MODEL OPTION
PIN NAME
HIGH
PIN NO.
LOW
N O _ F R C
MODEL_OPT_0
FRC_HW_OPT
G19
NO FRC
U 3 _ I N T E R N A L
U5_EXTERNALBOOT
MODEL_OPT_4
E18
50/60Hz LVDS
100/120Hz LVDS
r e s e r v e d f o r F R C
MODEL_OPT_1
C5
PHM_ON
- - > T h i s o p t i o n i s o n l y a p p l i e d i n E U .
PHM_OFF
I n c a s e o f N O N _ E U , d e f a u l t v a l u e s e t L O W .
MODEL_OPT_2
F7
NON_DVB_T2
DVB_T2
MODEL_OPT_3
B6
HD
FHD
MODEL_OPT_5
D18
Ready
d e f a u l t
- - > I n c a s e o f G P 2 , T h i s p o r t w a s u s e d f o r G I P / N O N _ G I P
MODEL_OPT_6
F9
LCD
OLED
--> MODEL_OPT_5, MODEL_OPT_6
: Only 3D_SG GPIO OUTPUT CONTROL
S7M-PLUS_DivX_MS10
IC101
LGE107DC-RP [S7M+ DIVX/MS10]
F1
W2
TP201
A_RXCP
VIFP
F2
W1
A_RXCN
VIFM
TP202
G2
A_RX0P
G3
V2
A_RX0N
I P
H3
V1
A_RX1P
IM
G1
A_RX1N
H1
Y2
A_RX2P
S S I F / S I F P
H2
Y1
A_RX2N
SSIF/SIFM
F5
DDCDA_DA/GPIO24
F4
U3
DDCDA_CK/GPIO23
QP
TP203
E6
V3
HOTPLUGA/GPIO19
QM
TP204
D3
Y5
B_RXCP
IFAGC
C1
Y4
B_RXCN
RF_TAGC
TP205
D1
B_RX0P
D2
U1
OPT
R291
B_RX0N
TGPIO0/UPGAIN
E2
U2
OPT
R292
B_RX1P
TGPIO1/DNGAIN
E3
R3
B_RX1N
TGPIO2/I2C_CLK
F3
T3
B_RX2P
TGPIO3/I2C_SDA
E1
B_RX2N
D4
T2
DDCDB_DA/GPIO26
XTALIN
E4
T1
DDCDB_CK/GPIO25
XTALOUT
D5
HOTPLUGB/GPIO20
AA2
G14
C_RXCP
SPDIF_IN/GPIO177
AA1
G13
R296
100
C_RXCN
SPDIF_OUT/GPIO178
AB1
C_RX0P
AA3
C_RX0N
AB3
B7
C_RX1P
DM_P0
AB2
A7
C_RX1N
DP_P0
AC2
C_RX2P
AC1
AF17
C_RX2N
DM_P1
AB4
AE17
DDCDC_DA/GPIO28
DP_P1
AA4
DDCDC_CK/GPIO27
AC3
HOTPLUGC/GPIO21
F14
I2S_IN_BCK/GPIO175
A2
F13
COMP2_DET
D_RXCP
I2S_IN_SD/GPIO176
A3
F15
D_RXCN
I2S_IN_WS/GPIO174
B3
D_RX0P
A1
D20
D_RX0N
I2S_OUT_BCK/GPIO181
B1
E20
D_RX1P
I2S_OUT_MCK/GPIO179
B2
D19
D_RX1N
I2S_OUT_SD/GPIO182
C2
F18
D_RX2P
I2S_OUT_SD1/GPIO183
C3
E18
D_RX2N
I2S_OUT_SD2/GPIO184
B4
D18
DDCDD_DA/GPIO30
I2S_OUT_SD3/GPIO185
C4
E19
DDCDD_CK/GPIO29
I2S_OUT_WS/GPIO180
E5
HOTPLUGD/GPIO22
D6
CEC/GPIO5
N1
C236
2 . 2 u F
OPT
LINE_IN_0L
P3
C237
2 . 2 u F
OPT
LINE_IN_0R
G5
P1
C238
2 . 2 u F
HSYNC0
LINE_IN_1L
G6
P2
C239
2 . 2 u F
VSYNC0
LINE_IN_1R
K1
P4
C4059
2 . 2 u F
RIN0P
LINE_IN_2L
L3
P5
C4060
2 . 2 u F
RIN0M
LINE_IN_2R
K3
R6
C242
2 . 2 u F
GIN0P
LINE_IN_3L
K2
T6
C243
2 . 2 u F
GIN0M
LINE_IN_3R
J 3
U5
C244
2 . 2 u F
BIN0P
LINE_IN_4L
J 2
V5
C245
2 . 2 u F
BIN0M
LINE_IN_4R
J 1
U6
C246
2 . 2 u F
OPT
SOGIN0
LINE_IN_5L
V6
C247
2 . 2 u F
OPT
LINE_IN_5R
G4
HSYNC1
H6
U4
VSYNC1
LINE_OUT_0L
K5
W3
RIN1P
LINE_OUT_2L
K4
W4
TP207
RIN1M
LINE_OUT_3L
J 4
V4
TP208
GIN1P
LINE_OUT_0R
K6
Y3
GIN1M
LINE_OUT_2R
H4
W5
TP209
BIN1P
LINE_OUT_3R
J 6
BIN1M
J 5
R4
SOGIN1
MIC_DET_IN
OPT
T5
C234
2 . 2 u F
MICCM
R5
C235
2 . 2 u F
MICIN
H5
OPT
HSYNC2
N3
T4
RIN2P
AUCOM
N2
RIN2M
M2
P7
GIN2P
VRM
M1
C249
C253
GIN2M
4 . 7 u F
1uF
L2
R7
BIN2P
VAG
L1
P6
OPT
BIN2M
VRP
M3
SOGIN2
R1
R217
100
HP_OUT_1L
R218
100
R2
HP_OUT_1R
N4
CVBS0P
N6
CVBS1P
L4
E21
ET_RXD0
CVBS2P
ET_RXD0
L5
E22
ET_TXD0
CVBS3P
ET_TXD0
L6
CVBS4P
M4
D21
ET_RXD1
CVBS5P
ET_RXD1
M5
F21
ET_TXD1
CVBS6P
ET_TXD1
K7
CVBS7P
E23
ET_REF_CLK
ET_REFCLK
M6
D22
ET_TX_EN
CVBS_OUT1
ET_TX_EN
M7
F22
ET_MDC
CVBS_OUT2
ET_MDC
D23
ET_MDIO
ET_MDIO
N5
F23
ET_CRS
VCOM0
ET_CRS
F8
TP206
AVLINK
OPT
G8
R298
100
IRINT
K8
TESTPIN
A4
RESET
Y17
55INCH
+3.3V_Normal
U3_RESET
R205
55INCH
22
10K
R4018
OPT
RSDS Power OPT
+1.26V_VDDC
VDD_RSDS:88mA
VDD_RSDS
OPT
OPT_0
OPT_4
L213
+2.5V_Normal
BLM18PG121SN1D
: L O W
L O W
: H I G H L O W
:HIGH HIGH
L214
VDD33
BLM18PG121SN1D
: L O W
H I G H
55INCH
C4005
0 . 1 u F
Close to MSTAR
DTV_IF
R288
100
C257
0 . 1 u F
IF_P_MSTAR
R289
100
C258
0 . 1 u F
IF_N_MSTAR
C250
0 . 1 u F
R4002
47
TU_SIF
C251
0 . 1 u F
R4003
47
ANALOG SIF
Close to MSTAR
+3.3V_Normal
L227
BLM18PG121SN1D
Close to MSTAR
C4064
R4019
0 . 1 u F
1K
R4020
10K
IF_AGC_MAIN
C4065
AMP_SCL
0 . 0 2 2 u F
AMP_SDA
TU/DEMOD_I2C
16V
22
DEMOD_SCL
22
DEMOD_SDA
TU_SCL
TU_SDA
C261
27pF
X201
24MHz
C262
27pF
LED_DRIVER_D/L_SDA
SPDIF_OUT
SIDE_USB_DM
SIDE_USB_DP
SIDE USB
NEC_SDA
NEC_SCL
AUD_SCK
AUD_MASTER_CLK_0
AUD_LRCH
LED_DRIVER_D/L_SCL
MODEL_OPT_4
MODEL_OPT_5
AUD_LRCK
AV_L_IN
AV_R_IN
SIDEAV_L_IN
SIDEAV_R_IN
COMP2_L_IN
COMP2_R_IN
PC_L_IN
PC_R_IN
L202
BLM18SG121TN1D
C256
C263
0 . 1 u F
10uF
EXT_SPK_L
EXT_SPK_R
RSDS Power OPT
+1.26V_VDDC
IR
SOC_RESET
FRC_RESET
VDDC 1.26V
OPT
OPT
OPT
OPT
N o r m a l P o w e r 3 . 3 V
+3.3V_Normal
VDD33
VDD33_T/VDDP/U3_VD33_2:47mA
L204
BLM18PG121SN1D
OPT
OPT
OPT
OPT
AVDD_MEMPLL:24mA
AU33:31mA
FRC_AVDD:60mA
+2.5V_Normal
VDD33
AU33
FRC_AVDD
L215
L221
BLM18PG121SN1D
BLM18PG121SN1D
C4015
55INCH
0 . 1 u F
OPT
FRC_VDD33_DDR:50mA
FRC_LPLL:13mA
FRC_MPLL:4mA
VDD33
VDD33
FRC_LPLL
FRC_VDD33_DDR
55INCH
L206
L222
BLM18PG121SN1D
BLM18PG121SN1D
55INCH
OPT
VDD33_DVI:163mA
+3.3V_Normal
VDD33_DVI
AVDD_DMPLL
L207
L217
BLM18PG121SN1D
BLM18PG121SN1D
C287
C288
10uF
0 . 1 u F
OPT
AVDD_DMPLL/AVDD_NODIE:7.362mA
Normal 2.5V
AVDD2P5/ADC2P5:162mA
+2.5V_Normal
AVDD2P5
AVDD2P5
AVDD2P5
L211
BLM18PG121SN1D
+2.5V_Normal
AU25
+2.5V_Normal
AVDD25_PGA
L212
L219
BLM18PG121SN1D
BLM18PG121SN1D
AU25:10mA
AVDD25_PGA:13mA
DDR3 1.5V
AVDD_DDR0
+1.5V_DDR
AVDD_DDR0:55mA
AVDD_DDR1:55mA
AVDD_DDR0
AVDD_DDR0
OPT
OPT
OPT
OPT
OPT
OPT
+1.5V_FRC_DDR
AVDD_DDR0
AVDD_DDR_FRC:55mA
AVDD_DDR_FRC
MVREF
MIU0VDDC
+1.26V_VDDC
FRCVDDC
55INCH
L228
L225
BLM18SG700TN1D
BLM18SG700TN1D
MIU1VDDC
L226
BLM18SG700TN1D
55INCH
55INCH
MAIN2, HW OPT
+1.26V_VDDC
VDDC : 2026mA
S7M-PLUS_DivX_MS10
IC101
LGE107DC-RP [S7M+ DIVX/MS10]
+1.26V_VDDC
H11
G18
VDDC_1
GND_1
H12
H9
VDDC_2
GND_2
H13
H10
VDDC_3
GND_3
H14
H18
VDDC_4
GND_4
H15
H19
VDDC_5
GND_5
J 1 2
J 1 0
VDDC_6
GND_6
J 1 3
J 1 7
VDDC_7
GND_7
J 1 4
J 1 8
VDDC_8
GND_8
J 1 5
J 1 9
VDDC_9
GND_9
J 1 6
K9
VDDC_10
GND_10
L18
K10
VDDC_11
GND_11
K11
GND_12
H16
K12
MIU0VDDC
A_DVDD
GND_13
K19
K13
MIU1VDDC
B_DVDD
GND_14
K14
GND_15
L19
K15
FRC_VDDC_0
GND_16
M18
K16
FRC_VDDC_1
GND_17
M19
K17
FRC_VDDC_2
GND_18
N18
K18
FRC_VDDC_3
GND_19
N19
L9
FRC_VDDC_4
GND_20
N20
L10
FRC_VDDC_5
GND_21
P18
L11
FRC_VDDC_6
GND_22
P19
L12
FRC_VDDC_7
GND_23
P20
L13
FRC_VDDC_8
GND_24
L14
GND_25
Y12
L15
FRCVDDC
U3_DVDD_DDR
GND_26
L16
GND_27
L17
GND_28
J 1 1
M9
AVDD1P2
GND_29
C4045
1uF
L7
M10
DVDD_NODIE
GND_30
M11
GND_31
M12
GND_32
AVDD2P5
H7
M13
AVDD2P5_ADC_1
GND_33
J 7
M14
AVDD2P5_ADC_2
GND_34
J 8
M15
AVDD25_REF
GND_35
M16
GND_36
M17
GND_37
AU25
L8
N10
AVDD_AU25
GND_38
N11
GND_39
N12
GND_40
AVDD2P5
W15
N13
PVDD_1
GND_41
Y15
N14
AVDD2P5
PVDD_2
GND_42
N15
AVDD25_PGA
GND_43
U8
N16
AVDD25_PGA
GND_44
N17
GND_45
P10
GND_46
AVDD_DMPLL
M8
P11
AVDD_NODIE
GND_47
P12
GND_48
P13
GND_49
VDD33_DVI
N9
P14
AVDD_DVI_1
GND_50
P9
P15
AVDD_DVI_2
GND_51
N8
P16
AVDD3P3_CVBS
GND_52
AVDD_DMPLL
P8
P17
AVDD_DMPLL
GND_53
R10
GND_54
R11
GND_55
AU33
T7
R12
AVDD_AU33
GND_56
U7
R13
AVDD_EAR33
GND_57
R14
GND_58
R15
GND_59
VDD33
T9
R16
AVDD33_T
GND_60
R17
GND_61
R8
R18
VDDP_1
GND_62
R9
T10
VDDP_2
GND_63
T8
T11
VDDP_3
GND_64
T12
GND_65
T13
GND_66
V20
T14
FRC_VD33_2_1
GND_67
W20
T15
FRC_VD33_2_2
GND_68
T16
GND_69
VDD_RSDS
U19
T17
FRC_AVDD_RSDS_1
GND_70
U20
T18
FRC_AVDD_RSDS_2
GND_71
V19
T19
FRC_AVDD_RSDS_3
GND_72
U10
GND_73
W19
U11
FRC_AVDD
FRC_AVDD
GND_74
U18
U12
FRC_LPLL
FRC_AVDD_LPLL
GND_75
T20
U13
FRC_AVDD_MPLL
GND_76
U14
GND_77
FRC_VDD33_DDR
Y14
U15
FRC_VDD33_DDR
GND_78
U16
GND_79
U17
GND_80
VDD33
V7
GND_81
R19
V8
AVDD_MEMPLL
GND_82
W14
V9
FRC_AVDD_MEMPLL
GND_83
V10
GND_84
V11
AVDD_DDR0
GND_85
D15
V12
AVDD_DDR0_D_1
GND_86
D16
V13
AVDD_DDR0_D_2
GND_87
E15
V14
AVDD_DDR0_D_3
GND_88
E16
V15
AVDD_DDR0_D_4
GND_89
E17
V16
AVDD_DDR0_C
GND_90
V17
AVDD_DDR0
GND_91
F16
V18
AVDD_DDR1_D_1
GND_92
F17
W7
AVDD_DDR1_D_2
GND_93
G16
W8
AVDD_DDR1_D_3
GND_94
G17
W9
AVDD_DDR1_D_4
GND_95
H17
W10
AVDD_DDR1_C
GND_96
W11
GND_97
W12
GND_98
AVDD_DDR_FRC
AB11
W13
FRC_AVDD_DDR_D_1
GND_99
AB12
W16
FRC_AVDD_DDR_D_2
GND_100
AC11
W17
FRC_AVDD_DDR_D_3
GND_101
AC12
W18
FRC_AVDD_DDR_D_4
GND_102
AA12
Y13
FRC_AVDD_DDR_C
GND_103
Y18
GND_104
AA13
GND_105
AB13
GND_106
AC13
GND_107
MVREF
G15
D17
MVREF
GND_108
H23
GND_109
AF13
GND_110
Y7
J 9
L223
NC_1
GND_FU
BLM18SG121TN1D
Y8
U9
NC_2
PGA_VCOM
GP2R
20101023
2
LGE
Internal
Use
Only

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents