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Vector Graphic Prom Ram III User Manual

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iI=torn =tArn
U)E=i) mAnUAL .

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Summary of Contents for Vector Graphic Prom Ram III

  • Page 1 iI=torn =tArn U)E=i) mAnUAL .
  • Page 3 PROM!RAM BOARD Revision PROM PROGRAMMING PROGRAM Revision USERS MANUAL Revision A" July 16, 1979...
  • Page 4 Copyright 1979 by Vector Graphic Inc. All rights reserved. Disclaimer Vector Graphic makes no representations or warranties with respect to the contents of this manual itself, even if the product it describes is covered by a warranty or repair agreement.
  • Page 5 VECTOR GRAPHIC, INC., to commence with the repair work involved. VECTOR GRAPHIC, INC., shall have no obligation to repair, replace or correct any PROM RAM III Board until the written estimate has been returned with approval to proceed, and VECTOR GRAPHIC, INC.,...
  • Page 7 Repair Agreement Table of Contents Specifications •...•••••.••.•.••••.•.••••.•••••.•..•••..•.••••. Description of the PROM/RAM III Board ••••••••••••••••••••••••• Block A and Block B - General ••••••••••••••••••••••••••••••••• Block A•• ~••••••••••••••••.••••••••••••••••••••••••••••••••••• Block B••••••••••••••••••••••••••••••••••••••••••••••••••••••• Figures 2 & 3 - EXamples of Block B Configurations •••••••••••• 2-5 Block Select Addressing ••••••••••••••••••••••••••••••••••••••• PROM/Scratchpad Memory Invert •••••••••••••••••••••••••••••••••...
  • Page 8 Board Layout ••••••••••••••••••••••••••••••••••••••••••••••••••• Schematic Errata ••••••••••••••••••••••••••••••••••••••••••••••• Schem.tic •••••••••••..•••.•••••••••••••••••••••••.•.••••••••••••...
  • Page 9 RAM: 1K, included with the board PROM: Sockets for 12 PROMs. Listing included in manual Executable version on MOOS System Diskettes 8.4 and later. RAM: 300 ns. PROM: User selected (450 ns. typ) RAM: 2114 static PROM: 2708 (1K each) or 2704 (1/2K each) Two blocks (A and B) are separately addressed...
  • Page 10 Use PRESET or POC Power-on/Reset Jump Options ( jumper) Jump to first instruction of Block A or B. Disable phantom generation Disable jump to on-board memory POCis used Standard.power-on/Reset Jumpers Jump to beginning of Block B Phantom and jump to on-board both enabled Jumper option to generate MWRlTE o n board Standar~ option not enabled...
  • Page 11 PROMs is provided as a listing in this manual, and is included on disk with all Vector Graphic systems shipped with this board. combining the use of MSI decoding logic and unique addressing features,...
  • Page 12 This Users Guide begins ·with a description of the amount and kind of PRat which can be used on this board, followed by a description of the RAM included with the board, then a detailed description of the various options you have for addressing the PRats and the RAM.
  • Page 13 To begin specifying the addresses for the memory,there are two seParately addressable blocks of memoryspace available on the board, called blocks and B. Jumpers are used to specify what the base address is for each of these two blocks, within a 64Ktotal memory space.
  • Page 14 If the jumpers in area G are switched from the way the board is normally shipped, then the base address of block A will be controlled by jumper area E and the base address of block B will controlled by jumper area F, instead of the other way around.
  • Page 15 other boards. The way you specify the address spaces within block B is as follows: First, you specify the base address of Block B using jumper area E (or you specify in area E that the block disabled). disabled, then you use jumper area to specify whether the 4K of PROM...
  • Page 16 ION-BOARD PROM SCRATCHPAD <= <= (¥') <= < c:a.. :> :> Co:' • ••• I I. = = = = = = = = =rill ..- .. ._ III •• - - - ••• ••• ••• • • • •...
  • Page 17 Jumper names: A13, A13, A14, A14, A15, A15 ~ address lines BA 1, BA2, BAJ • block B address pads BB1, BB2, BB3 • block A address pads NOT. The second letter in the block B address pads is "A", while the second letter in the block A address...
  • Page 18 Function: These jumpers allow the user to selectively determine where the RAM addresses are to be located. With the board jumpered as manufactured, the 1Kof RAM occupies the top-most 1K of addresses of the 4K scratchpad memory block. Options: If you wish to alter factory supplied connections,...
  • Page 19 This is appropriate standard Vector Graphic canputers, because in these systems, both the RESET switch on the front panel and the· initial poW'er-on condition cause an active low pulse on the POC line, via circuitry on the Z80 board.
  • Page 20 Function: When1 and 2 are tied together, the phantom signal generated whenever a POC or PRESET signal is received. Phantom disables other system memoryboards. (and 8080) processor chip immediately executes instruction when the or PRESETsignal appears on the bus, OOOOH assuming the CPO board is so designed.
  • Page 21 S-100 signal. This is not needed in Vector Graphic systems shipped after April 9, 1979, because the Z-80 boards in these systems now generate MWRITE. Options: If the board is installed in a system without a source of MWRITE, add a jumper from 9 to 10.
  • Page 22 300 ns. in a 4 MHz(Z-SO) system. PRDY not connected to WAIT on the PROM/RAM III board as manufactured, because the Vector Graphic Z-SOboard used in Vector Graphic systems generates wait-state. You would want to generate the wait-state...
  • Page 23 TABLE 1 8K BLOCK (A or B) STARTlNG ADDRESS OOOOH 00000 2000H 81920 4000H 163840 6000H • 245760 BOOOH 327680 AOOOH ••409600 COOOH ••491520 EOOOH ••573440 TABLE 2 CONNECT DESIRED 8K BLOCK Bl(3 STARTING ADDRESS OOOOH ZOOOH x ••Block A or B 4000H Bx1.
  • Page 24 (except that it uses the Extended Systems Monitor in Vector Graphic systems for console I/O.) The utility (called "PROM")runs beginning at address 2BOO Hex and takes up less than 1K. If...
  • Page 25 depress! on the keyboard. MOOS will take control, as indicated by the >. MOOS p ranpt Load the object code to be stored on PROM into a free area of memory. Alternately, you may generate desired code by assembling canpilin~ a higher level program. >, 10.
  • Page 26 13. In resp:>nse.to the question "Source address:", type the starting address in memory of the material you want to store on PR~. This can be any address in memory. Then press the RETURN k ey. 14. Slide "programming" switch at the upper right-hand corner of the PR~/RAM III board to the LEFT.
  • Page 27 A good program has a comparison of the source and destination data, after programmingthe PROM is canplete. If your system has a dynamic memory board in it (such as all Vector Graphic systems shipped since about March 1, 1979), then there MUST b e a delay loop after...
  • Page 28 The source code for the program is listed in Section 2.21 below. Enter the program using the MOOS e ditor LINEEDIT. You can assemble wherever . like, although BCOO is not suggested because M.BASIC uses the very top of RAM for stack. The pre-assembled version on the diskette (under...
  • Page 29 GOOO **************************** 0000 0000 Prom Programming Program 0000 Version 1 0000 for the Prom/Ram III oeoo 0000 by Lance Lewis, 0000 Vector Graphic Inc. .•. 20-July-79 0000 0000 0000 **************************** 0000 0000 0000 System equates 0000 .INPUT 0000 C003 oe003H ;character input (COOC on pre 3.0 monitors)
  • Page 30 2842 aD OA 2844 2844 OA idown a line 2845 20 20 50 72 , Program prem' 2649 6F 67 72 61 284D 6D 20 70 72 2851 6F 6D 2853 aD SA 2855 2855 CD 43 2D STARTADRS CALL PRINT isend message 2B58 20 20 53 74...
  • Page 31 2BCA 20 61 64 64 2ECE 72 65 73 73 28D2 8A 2BD3 CD 4F 2D CALL. AORS ;get source address 2BD6 DA 8F·2B SOURCEAORS ;i1 not valid try again 2BD9 2BD9 CD 43 2D CALL. PRINT 2BDC OD OA CRL.F 2BDE 2BDE 00 OA...
  • Page 32 2C57 3E 64 A,100 ide lay for dynamic memory 2C59 3D DELAY itime up 2C5A C2 59 2C DELAY ikeep stalling 2C5D • 2C50 23 2C5E 13 iadvance pointers 2C5F CD F6 2C CALL TEST iend of block 2C62 C2 55 2C LOOP keep going 2C65...
  • Page 33 2ceE 00 8A 2CCO 2CCO CO 43 20 ·ENO CALL PRINT 2CC3 20 20 54 75 , Turn off the programming enable switch' 2CC7 72 6E 20 6F 2cce 66 66 20 74 2CCF 68 65 20 70 2C03 72 6F 67 72 2C07 61 60 60 69 2COB 6E 67 20 65 2COF 6E 61 62 6C...
  • Page 34 Aodr 81 82 83 84 E LabeL Opcd Operand 2041 37 ;set error flag 2042 C9 2043 2043 E3 PRINT XTHL ;save HL get SP 2044 7E LPRINT ;get character CAl.I. OUT 2045 CO 08 CO ;print it 2048 23 ;advance pointer 2049 87 ;is MSB set...
  • Page 35 2065 37 20B6 C9 20B7 20B7 CO 43 20 CALL PRINT 20BA 3F 20 73 70 specified portion of prom is not erased' 2DBE 65 63 69 66 20C2 69 65 64 20 2DC6 70 6F 72 74 20CA 69 6F 6E 20 2DCE 6F 66 20 70 2002 72 6F 6D 20 2006 69 73 20 6E...
  • Page 36 Address input lines AO to A9 are buffered in line receivers U13 and U14. The outputs of U13 and U14 are then connected to both the PROM and RAM memory address pins. Address input lines A10 to A15 are buffered in U12 before use on the board.
  • Page 37 The DOlines fran the S-100 bus contain data fran the CPUto the memory. RAM is contained in two 2114 chips (U1 and U2). 01 contains the low four data bits in each location and U2 the high four bits. Thus 000 to D03 are tied to the data pins of U1 and 004 to D07 to the data pins These data bus lines...
  • Page 38 into the RAMs, assuming the board has been addressed and the selected by the chip enable from Area I. Whenit is desired to read data fran this board, the U19-6 must be low at the appropriate time, enabling the bus drivers U16and 017. This is accomplished by generating...
  • Page 39 PROM socket 11 is used to program an EPROM.EPROMs are programmed as follows: With the desired data on the data inputs to the. PROM and the desired low order address byte on the address lines to the PROM, chip select must be raised to 12V (rather than the usual 0 for reading and 5...
  • Page 40 When the pulse is over and the wait line is released, CPU is released to increment the address and program the next byte. Power for this board is obtained from the unregulated and plus or minus supplies in the system. Regulation of the input vo1ta98 to the required +12V is obtained...
  • Page 41 c;:;]u 5 r;}6 ~; JtJ~) I· •• :I ••••••• • • ..~ <E!)r;"iiI. • ~..~r:tJ~. · L:...:.J fit CJ ;>•••••• '1 • • ::r ' . · I :. ~ t..: · ~ ~: ::' > :: : : : ·...
  • Page 43 ~"~"."o • MWRITED 68 PWRD ,0r.:-".9W SOUT 74LS02 809~ 8T97 MWRITE ------l 5 RCiWR CS RllIWR UI3.J'" c-!I 14 13 13 Al'I 81 10UI 9,1' A3-31 4 A3 lie:; 2114 2114 ~ A4 A5-291~t..- 41'3 2 A5 UI4 5 I A6 A7- 83 61;;14 17A7...
  • Page 44 ;PROMS 74LS42 8-11 74Ls02 151 • 141 131 121 74LSI0 74LS20 74LS20 JU:1 ~UI9~ ¥- ..•... 8K BLOCK SWAP VECTOR GRAPHIC ;:;: .•Z;],~ WESTLAKE VILLAGE CALIF. U6-2~11 12 K PROM tRAM "I.A< 7-13-79 REV-O 4SS~ 74LS02 14~13 1nK,;l72~PROY Sill ••••..