Quantum ProDrive 40S Product Manual page 31

Section 3 Principles of Operation
3.2.3
READ/WRITE SYSTEM
The read channel path on the ProDrive begins at the heads as the magnetic flux transitions recorded on the
disk pass under the heads causing a low amplitude output differential voltage. These signals pass from the
head onto a flex circuit where a preamplifier/write driver IC is mounted to amplify the signal.
Preamplification is done on the flex circuit at the point closest to the head to improve the signal to noise
perfonnance.
The flex circuit leaves the enclosed drive through a gap between the base casting and the cover, and connects
with a mating header on the PCB. This gap is sealed by the cover gasket. Here the read signal is amplified
further, filtered, and differentiated by the read data processor IC which outputs the signal READ DATA.
This signal is fed to the data synchronizer/ENDEC IC which decodes the data into an NRZ data stream
(NRZ), and a byte clock (BCLK). The Ie also provides the signal address mark detected (AMD) if the data
pattern read is the address mark pattern. These signals are fed to the data sequencer/DMA controller IC
called SOLO. Once SOLO has identified the incoming data as belonging to the target sector(s) the data
sequencer portion converts the NRZ serial bit stream into an 8 bit word. The DMA portion of SOLO then
feeds this word to the cache/buffer RAM. The interface IC then outputs the data to the host with DMA
control from SOLO.
Writing data is the reverse of reading in that data is presented at the interface IC and passed to SOLO as an
8-bit word. Data presented at a rate faster than can be written are temporarily stored in the cache/buffer
RAM. In this way, data can be passed to the drive at a rate independent of the rate at which data can be
written to the disk.
The data synchronizerlENDEC IC provides SOLO with the signal address mark detect (AMD) and data to
identify the target sector. Once SOLO detects the correct sector, it converts the data from an 8-bit word into
a serial bit stream and passes this data and a clock to the data synchronizer/ENDEC IC. The data is then
encoded into an RLL 2,7 bit stream and passed to the preamplifier/write driver IC via the write data line.
The preamplifier/write driver IC receives the signal write gate from SOLO and writes the data to the disk.
Figure 3-4 provides a block diagram of the read/write electronics.
WRITE
DRIVER WRITE GATE
NRZ
BCLK
AMD
ADDRESS
SOLO
WR
RD
REO
ACK
CACHE/BUFFER
RAM
SPICY
Figure
3-4
Read/Write Block Diagram
Principles of Operation 3 - 5