Summary of Contents for Dynatem CPU-111-10
- Page 1 USER MANUAL CPU-111-10 (VPQ) Intel Xeon Quad-Core 6U VPX Single Board Computer CPU-111-10_User_Manual_d0.1.doc Updated 25mar2013...
- Page 2 CPU-111-10 User’s Manual Rev. Draft 0.1 March 25, 2013 Dynatem 23263 Madero, Suite C Mission Viejo, CA 92691 Phone: (949) 855-3235 Fax: (949) 770-3481 www.dynatem.com...
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Page 3: Table Of Contents
BIOS & SETUP *** NEED INPUT FROM HUNG *** ..................27 ........................27 EDIRECTING TO A ERIAL ............................28 ETUP ENUS ......................28 AVIGATING ETUP ENUS AND IELDS CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... - Page 4 B.11 ..........................39 IRMBASE ETUP B.12 ........................41 ISCELLANEOUS ETUP POWER AND ENVIRONMENTAL REQUIREMENTS ................... 43 RTM REAR PLUG-IN I/O EXPANSION MODULE FOR THE CPU-111-10 ............. 44 RTM VPX P ............................ 44 OUTS CPU-111-10 R ..................46 RANSITION ODULE OUTS ........................
- Page 5 TABLE 15: RTM VPX RP4 PIN-OUTS TABLE 16: RTM VPX RP3 PIN-OUTS TABLE 17: RTM VPX RP6 PIN-OUTS TABLE 18: PMC I/O HEADER PIN-OUTS TABLE 19: RTM REAR PANEL CONNECTOR PIN-OUTS CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem...
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Page 6: Features
Chapter 1 – Features Features The CPU-111-10 is a rugged, high-performance 6U VPX (VITA 46) Single Board Computer (SBC) featuring a quad-core Intel L5408 Xeon processor and integrated 10 Gigabit Ethernet switch to support full-mesh backplane data layer interconnectivity for up to eight SBCs integrated into a single chassis. Available in air cooled or conduction cooled formats, the CPU-111-10 conforms to the OpenVPX (VITA 65) payload module profile MOD6-PAY-4F2T- 12.2.2.4 with four fat pipes (10 GBase-BX4) and two thin pipes (1000Base-T). -
Page 8: Related Documents
Related Documents Listed below are documents that describe applicable standards, the processor and chipset, and the peripheral components used on the CPU-111-10. Either download from the Internet or contact your local distributor for copies of these documents. Many of the documents are confidential and may require execution of a non-disclosure agreement between the supplier and CPU-110-10 user. -
Page 9: Hardware Description
Chapter 3 – Hardware Description Hardware Description Overview and Specifications The block diagram of the CPU-111-10 is shown below. The sections that follow describe the major functional blocks of the CPU-111-10. Figure 1: CPU-111-10 Block Diagram CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual... - Page 10 Chapter 3 – Hardware Description Specifications CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem...
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Page 11: Processing Architecture
The Intel® 5100 Memory Controller Hub (MCH) provides dual memory controllers and 24 lanes of PCI Express expansion (all of which are implemented on the CPU-111-10) for high-speed connectivity to dual XMC sites (8 lanes each) and a PLX PEX8624PCIe Switch (8 lanes) for further PCI Express distribution. The MCH supports up to 4 GBytes of DDR2 SDRAM running at up to 1066 MHz double data rate speeds. - Page 12 Chapter 3 – Hardware Description CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem...
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Page 13: Pci Express Architecture
Chapter 3 – Hardware Description PCI Express Architecture The PCI Express (PCIe) structure is shown below. All PCIe links operate at Gen1 speeds. The CPU-111-10 does not support XMC based root complexes, only end-points. PE0 - x8 PCIe Intel 5100... -
Page 14: Idt Tsi384 Pcie To Pci-X Bridges For Pmc Support
(Dual Monitor), at 8-bit, 16-bit, or 32-bit per pixel and a 3-color hardware cursor per video output. Connects to ICH9R via x1 PCI Express Interface 16MByte Internal DDR SDRAM Video Memory 2D Graphics Accelerator DMA Controller CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 15: 10 Gigabit Ethernet Architecture
3.4.1 Fulcrum FM3224 Switch The FM3224 10GbE Switch is the heart of the CPU-111-10 SBC. Using 10Gb Ethernet, it connects the backplane to the CPU, XMC Modules, and front panel SFP+ Fiber Optic I/O modules (not included with the CPU-111-10). -
Page 16: Intel 82599 Dual 10Gb Ethernet
PEX8624 PCIe switch and from there to the CPU. As previously mentioned, the 82599 also supports IEEE 1588 precision time protocol (PTP) by time stamping in-coming and out-going data packets. Figure 5: 82599 Block Diagram CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 17: Sfp+ Interface (Ael2009)
3.4.4 VPX 10Gb Ethernet I/O Seven ports from the FM3224 10GbE switch are connected to the VPX backplane. The CPU-111-10 complies with the VITA 46 OpenVPX standard for profile MOD6-PAY-4F2T-12.2.2-5. This profile covers the four 10GbE channels on VPX connector P1. The remaining three 10GbE channels connect to P2, P4, and P5. -
Page 18: Xmc 10Gbe I/O
VPX General Purpose I/O The CPU-111-10 provides general purpose I/O via VPX connector P4. This I/O can be connected to a rear transition module or can be terminated on the backplane. The I/O consists of (4) SATA ports, (4) USB ports, (1) LPC bus, (1) RS232/RS485 Serial Communications Port, (2) 1GbE SERDES channels, and (2) 1000BASE-T 1GbE ports. -
Page 19: Reset Structure
A block diagram of the CPU-111-10 reset structure is shown below. The ispPOWR1220A provides reset glue logic for the board. The backplane system reset (BP_SYSRST#) is an input when the CPU-111-10 is installed in a peripheral slot and an output when installed in the system controller slot. -
Page 20: Smbus Architecture
Chapter 3 – Hardware Description SMBus Architecture The CPU-111-10 utilizes an SMBus to support inter-chip communications. This can range from management functionality, e.g. reading temperature sensors, to setting up application specific operational conditions in the various peripheral components. The SMBus runs at a maximum speed of 100KHz. -
Page 21: Board Power
Chapter 3 – Hardware Description Board Power There are 11 major supply rails on the CPU-111-10. A block diagram of the power supply architecture is shown below. The VPX backplane provides +12V and +5V supplies. The majority of the on-board supply rails are generated by Linear Technology LTM4616 16A MicroModules. -
Page 22: Rear Transition Module
VGA port. Four 2mm headers are provided to support CPU-111-10 PMC Module I/O. J1 and J3 terminate the signals derived from PMC J14 and J2 and J4 terminate signals from J24. Please refer to Appendix D for RTM pin assignments. -
Page 23: Installation
Installation *** UNDER CONSTRUCTION *** The following sections cover the steps necessary to configure the CPU-111-10 and install it into a 6U VPX system for single-slot operation. This chapter should be read in its entirety before proceeding with the installation. -
Page 24: Figure 12: Cpu-111-10 Connectors And Headers
Chapter 4 - Installation Figure 12: CPU-111-10 Connectors and Headers CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 25: Pci Mezzanine Card (Pmc) Installation
Front Panel Connectors and Reset Switch The CPU-111-10 supports two PMC/XMC sites, an SFP+ connector, and an optional USB port. Front panel indicators consist of a green power on LED, a red CPU Error LED, a yellow System Controller LED, and a yellow solid state drive activity LED. -
Page 26: Connector Pin-Outs
XAIU3_RX0- XAIU3_RX0+ Data Plane 4 (Fat Pipe) Differential XAIU3_TX1- XAIU3_TX1+ XAIU3_RX1- XAIU3_RX1+ Differential XAIU3_TX2- XAIU3_TX2+ XAIU3_RX2- XAIU3_RX2+ 10GBASE-BX4 Differential XAIU3_TX3- XAIU3_TX3+ XAIU3_RX3- XAIU3_RX3+ OpenVPX VITA 46.7 r0.05 MOD6-PAY-4F2T-12.2.2-4 CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 27: Table 3: Vpx P2 Connector Pin-Outs
J14-44 Differential J14-45 J14-47 J14-46 J14-48 Differential SMB_B_CLK J14-49 J14-51 J14-50 J14-52 Differential J14-53 J14-55 J14-54 J14-56 Differential RS485_EN J14-57 J14-59 J14-58 J14-60 Differential J14-61 J14-63 J14-62 J14-64 CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 28: Table 5: Vpx P4 Connector Pin-Outs
Differential XAIU7_TX0- XAIU7_TX0+ XAIU7_RX0- XAIU7_RX0+ User Defined Data Plane 7 (Fat Pipe) Differential XAIU7_TX1- XAIU7_TX1+ XAIU7_RX1- XAIU7_RX1+ Differential XAIU7_TX2- XAIU7_TX2+ XAIU7_RX2- XAIU7_RX2+ 10GBASE-BX4 Differential XAIU7_TX3- XAIU7_TX3+ XAIU7_RX3- XAIU7_RX3+ CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 29: Pci-X Mezzanine Card Connectors
AD[6] AD[5] V3_3 AD[35] AD[34] Px4_53 Px4_54 AD[4] AD[33] Px4_55 Px4_56 AD[3] AD[32] Px4_57 Px4_58 AD[2] AD[1] Px4_59 Px4_60 AD[0] V5_0 ACK64# V3_3 Px4_61 Px4_62 REQ64# Px4_63 Px4_64 CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 30: Xmc Connectors
PE1_RX7n PE1_RX7p PE1_RX6n PE1_RX6p P26_DP19n P26_DP19p P26_DP18n P26_DP18p WAKE# REFCLKn REFCLKp SFP+ Pin-out Table 10: SFP+ Connector Pin-outs SFP+ Connector Signal Signal TX_FAULT TX_DISABLE 3.3V MOD_DETECT 3.3V RX_LOS CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 31: Front Panel Usb Pin-Out
Appendix A - Connector Pinouts Front Panel USB Pin-out Table 11: USB Connector Pin-out USB Connectors Signal USB- USB+ CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 32: Bios & Setup *** Need Input From Hung
BIOS & Setup *** NEED INPUT FROM HUNG *** The CPU-111-10 uses General Software’s Embedded BIOS with StrongFrame™ Technology, Rev 6.The BIOS is configured with the System Setup Utility, accessible from the Preboot Menu. This photo shows the initial splash screen that is displayed after powering up the system as the BIOS runs through the Power On Self Test (POST). -
Page 33: Setup Menus
Setup Menus The standard Embedded BIOS setup menus are described below in the order they generally appear in the menuing system (Dynatem cannot vouch for support for all BIOS functions described in the subsequent sections): Main Display main system components and allow editing of date and time. -
Page 34: Main Setup Menu
OEM. The BIOS information is obtained by Setup from the internal system BIOS build itself; this information is useful when obtaining support for your system. PLEASE CALL Dynatem at (800)543-2830 FOR BIOS SUPPORT; DO NOT CALL GENERAL SOFTWARE DIRECTLY. -
Page 35: Exit Setup Menu
Appendix B – BIOS & Setup BIOS Build Date Date in MM/DD/YY format on which Dynatem built the system BIOS binary file. System BIOS Size Size of BIOS exposed in low memory below the 1MB boundary. Commonly, 128KB would mean that the BIOS is visible in the address space from E000:0000 to F000:FFFF. -
Page 36: Boot Setup Menu
(BAID). The drive may be Legacy Floppy, PATA, SATA, the drive has not been detected yet, or the drive’s Compact Flash, or a USB drive. full manufacturing name and serial number (if CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... - Page 37 CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem...
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Page 38: Post Setup Menu
Be sure to review the Features menu, where additional items can be configured, such as the Splash Screen and BIOS initiatives. The figure below shows the same menu, scrolled down so that the remainder of its fields may be viewed. CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... - Page 39 Appendix B – BIOS & Setup CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem...
- Page 40 Enable head seek on each hard drive configured in the system. This is a way of extending the standard testing performed on each drive during POST, by requesting that the drive actually move the head. Not available with all drives. CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem...
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Page 41: Pnp Setup Menu
Enable exclusive use of IRQ6 by PnP. IRQ7 Enable exclusive use of IRQ7 by PnP. IRQ8 Enable exclusive use of IRQ8 by PnP. IRQ9 Enable exclusive use of IRQ9 by PnP. CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 42: Super I/O (Sio) Setup Menu
It should be noted that these are not the only possible addresses, but they are the ones that will ensure compatibility with the most legacy software, especially early DOS programs that do not use BIOS to access the COM ports. CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 43: Features Setup Menu
Enable automatic entry into manufacturing mode when POST encounters a critical error. Used in closed device settings such as smart phones that need access to docking stations when they don’t boot. Leave disabled. CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... -
Page 44: Firmbase Setup Menu
USB devices to be supported in the BBS device list(see the BOOT menu.) EHCI/USB 2.0 Enables EHCI Firmbase Technology driver, allowing USB Boot feature to use high CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... - Page 45 COM3 – Console on 3rd serial port. COM4 – Console on 4th serial port. Virtual Console History Specifies the number of lines of text that Firmbase Technology maintains in its virtual CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem...
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Page 46: Miscellaneous Setup Menu
Specifies the amount of time a repeating key may be pressed on a PS/2 keyboard until the key repeat feature begins repeating the keystroke. USB typematic is automatic and does not use this parameter. CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem... - Page 47 WITHOUT WARRANTY OF ANY KIND. ALWAYS BACKUP YOUR DATA BEFORE PERFORMING DIAGNOSTICS ON ANY SYSTEM, AS THEY COULD CAUSE DATA LOSS. Floppy Disk Read There is no Floppy Drive interface implemented on the CPU-111-10. Stimulation CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem...
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Page 48: Power And Environmental Requirements
Appendix C – Power & Environment Requirements Environmental and Power Requirements The CPU-111-10 power and environmental requirements are shown in the tables below. The 3 Volt lithium coin cell is a BR1225 with 48 mAhours capacity and it is used to battery-back the Real Time Clock and the BIOS’s NV-RAM. -
Page 49: Rtm Rear Plug-In I/O Expansion Module For The Cpu-111-10
Appendix D – XPDDRIO Rear Plug-in I/O Expansion Module for the CPU-111-10 RTM Rear Plug-in I/O Expansion Module for the CPU-111-10 Dynatem offers a rear transition module for I/O expansion with the CPU-111-10. RTM VPX Pin-outs Table 14: RTM VPX RP0 Pin-outs... -
Page 50: Table 16: Rtm Vpx Rp3 Pin-Outs
Appendix D – XPDDRIO Rear Plug-in I/O Expansion Module for the CPU-111-10 Table 16: RTM VPX RP3 Pin-outs Wafer Type Row G Row F Row E Row D Row C Row B Row A Single-ended J14-1 J14-3 RTM_MDIO J14-2 J14-4... -
Page 51: Cpu-111-10 Rear Transition Module Pin - Outs
Appendix D – XPDDRIO Rear Plug-in I/O Expansion Module for the CPU-111-10 CPU-111-10 Rear Transition Module PMC I/O Pin-outs Table 18: PMC I/O Header Pin-outs J14-64 J14-63 J24-64 J24-63 J14-62 J14-61 J24-62 J24-61 J14-60 J14-59 J24-60 J24-59 J14-58 J14-57 J24-58... - Page 52 Appendix D – XPDDRIO Rear Plug-in I/O Expansion Module for the CPU-111-10 CPU-111-10 - Intel Xeon Quad-Core 6U VPX SBC – User’s Manual Dynatem...
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