Sony STR-DG810 Service Manual page 53

Multi channel av receiver
Hide thumbs Also See for STR-DG810:
Table of Contents

Advertisement

QQ
3 7 63 1515 0
• IC Pin Descriptions
IC1009 ADSP21266SKSTZ-2C (DSP EX3) (DIGITAL BOARD (3/5))
Pin No.
1
2
3
4
BOOTCFG0
5
BOOTCFG1
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
TE
L 13942296513
23
24 to 26
AD6 to AD4
27
28
29, 30
31
32
33, 34
35
36, 37
38
39
40
41 to 43
AD15 to AD13
44
45
46
47
48
49 to 52
AD11 to AD8
53
54
55
www
56, 57
58
59
.
60
61
62
http://www.xiaoyu163.com
Pin Name
I/O
VDDINT
Power supply terminal (+1.2 V)
CLKCFG0
I
Clock frequency setting signal input 0
CLKCFG1
I
Clock frequency setting signal input 1
I
Boot mode setting signal input 0 from DSP.
I
Boot mode setting signal input 1 from DSP.
GND
Ground
VDDEXT
Power supply terminal (+3.3 V)
GND
Ground
VDDINT
Power supply terminal (+1.2 V)
GND
Ground
VDDINT
Power supply terminal (+1.2 V)
GND
Ground
VDDINT
Power supply terminal (+1.2 V)
GND
Ground
INT_REQ
O
Interrupt status output for main system controller.
DIR_ERR
O
PLL lock error signal and data error flag output for main system controller.
AD7
I/O
Two-way data bus and address signal output 7 with S-RAM.
GND
Ground
VDDINT
Power supply terminal (+1.2 V)
GND
Ground
VDDEXT
Power supply terminal (+3.3 V)
GND
Ground
VDDINT
Power supply terminal (+1.2 V)
I/O
Two-way data bus and address signal output 6 to 4 with S-RAM.
VDDINT
Power supply terminal (+1.2 V)
GND
Ground
AD3, AD2
I/O
Two-way data bus and address signal output 3, 2 with S-RAM.
VDDEXT
Power supply terminal (+3.3 V)
GND
Ground
AD1, AD0
I/O
Two-way data bus and address signal output 1, 0 with S-RAM.
XWR
O
Data write enable signal output for S-RAM. (L: active)
VDDINT
Power supply terminal (+1.2 V)
GND
Ground
XRD
O
Read strobe signal output for S-RAM. (L: active)
ALE
O
Address latch enable signal output
I/O
Two-way data bus and address signal output 15 to 13 with S-RAM.
GND
Ground
VDDEXT
Power supply terminal (+3.3 V)
AD12
I/O
Two-way data bus and address signal output 12 with S-RAM.
VDDINT
Power supply terminal (+1.2 V)
GND
Ground
I/O
Two-way data bus and address signal output 11 to 8 with S-RAM.
A16
O
Address signal output 16 for S-RAM.
VDDINT
Power supply terminal (+1.2 V)
GND
Ground
A17, A18
O
Address signal output 17, 18 for S-RAM.
x
ao
GND
Ground
y
VDDEXT
Power supply terminal (+3.3 V)
i
VDDINT
Power supply terminal (+1.2 V)
GND
Ground
PF_CE
I/O
Chip enable signal input/output (Not used in this set)
http://www.xiaoyu163.com
8
Q Q
3
6 7
1 3
u163
.
2 9
9 4
2 8
Pin Description
1 5
0 5
8
2 9
9 4
m
co
STR-DG810
9 9
2 8
9 9
53

Advertisement

Table of Contents
loading

Table of Contents