Block Diagrams - Philips for Intel Socket 775 processor Service Manual

Block Diagrams, Testpoint Overview, and Waveforms
6. Block Diagrams, Testpoint Overview, and Waveforms
6.1 Block Diagram for Logic circuit
42" SDv2
LOGIC CONTROL
LVDS
DATA_R
8Bits
DATA_G
8Bits
DATA_B
8Bits
DCLK
Vs ync
Hsync
Enable
42" SDv3
Display
DRIVER CIRCUIT & PANEL
Data
852× 480 Pixels
Driver
852× 3× 480 Cells
Timing
Scan
Timing
V5
Vset Vsc Ve V3.3
- V3.3 : Voltage for LOGIC Control
- V5 :
Voltage for COF driver
Voltage for FET driver
- Vdd :
- Va :
Voltage for address pulse
Voltage for sustain driver
- Vs :
Voltage for scan pulse
- Vsc :
Voltage for X ramppulse
- Ve :
- Vset : Voltage for Y ramppulse
S/SD/HD 3.1 PDP
Column Driver
Vdd
Va Vs
Reference
6. EN 27