Gazoo - Nokia E52 Service Schematics

1
CBUS(3:0)
1
0
TXC(2:0)
2
1
J2203
0
J2204
PUSL(15:0)
2 J2205
3
J2206
1
J2207
"Note!"
EMINT(3:0)
0 J2208
2 J2209
GAZOOIO(3:0) GND
8
0 J2211
A
VBAT
SLOWAD(6:0)
1
2
0
5
J2213
GND
3
TXC_CONV(4:0)
6
1
0
5
1
0
CHARGER
LED(10:0)
VBAT
3 GND
R2200
PMR03EZPJU10L
CURRENT SENSE RESISTOR
1 CURRENT 4
SENSE
C2316
2 3
BGND GND 2u2
GND
Lines must be connected
directly to resistor pads
B
Minimize trace lenght Crl and CrO
B2200
32.768kHz
Symmetrical layout!
VREF
ACI(7:0)
C2317
VBAT 2u2
10kOhm pull-up resistor is
GND
needed for empty battery 4
start up and ESD protection 1 J2225
for PWRONX pin 0 J2227
PWRONX
L2300
2
VBAT
3
LED(10:0)
2u2H
V2300
PMEG3002AEL
0
C2314
1u0
GND
1
2
VIO
L2310
1uH
C
C2230
22u
GND VBACK
VCORE L2340
1uH
kelvin
connect to ClassDKelvin N6
GND
C2231
GND
22u
GND
GND
GND
GND
Place Vcore and VIO coils
GND
and de-coupling capasitors
GND
nearby ASIC. Minimize ground
GND
looåp from capasitor to ASIC
GND
VBACK
GND
GND
GND
GND
+
GND
G2200
GND
-
CP3225A
GND
2.6V
4700003
GND
GND
GND
GND
GND
GND
D
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
1
2
Due to Digital Mic, no MICB1 cap is needed
N2200
GAZOO_V3.4
J2200 N8 K6 0
CBusData Mic1P
J2201 N7 G2 1
CBusClk Mic2P
J2202 P8 F3 2
CBusSelX Mic2N
D3 G3 3
TxCData Mic3LP
C2 F4 4
TxCClk Mic3LN
B2 G4 5
TxCCtrl Mic3RP
E3 J4 6
SleepX Mic3RN
C4 N2
SleepClk MicData
A4 H3 7
PURX MicB1
P2 J3 8
RSTX MicB2
A2
ATM
B11
UserResetX
A3 N3
EMInt AudClk "Note!"
M13 G1
VCoreDef EarP
P1 K4
GenOut1 EarN
R2 K3
GenOut2 XEarL
H9 K2
ExtPWMOut XEarLC
N11 L3
SMPSClk XEarR
C5 L4
WDDis XEarRC
P4
IHFSpLP
R3
IHFSpLN
P12 R5
BTemp IHFSpRP
T6
IHFSpRN
J9
LST
N13 C1
RFTemp VibraP
H7 D2
WTxDet VibraN
N5
EarDataL
EarDataR P3
J2243 D4
TxCOut
J2244 C3 N1
AFCOut PMARP
N4
PMARN
K9
USBCharDetX
10
P13 H6
USBCharDis LineInLP
T7 J6 11
VCharIn1 LineInLN
12
R9 L1
VCharIn2 LineInRP
13
R8 L2
VCharOut1 LineInRN
T10 N6
VCharOut2 ClassDKelvin kelvin
connect to TestNet3 T1
L8 0 1 2
VCharInTest
N9 F9 0
ChInd SIMDetX
C7 C12 J2218
VRTC SIMDa
B14
SIMClk J2219 J2220
B3 B13
SenseP SIMIOC
E4 L16 1
SenseM SIMDaC
2
L14
SIMClkC
3
H11
SIMRstC
A6 C10
CrI BSI
0
B6
CrO
E15
CMDA
CMDB G15
G7 M14
VRef CMDDir
A7
VBg
Data1A G10 "Note"
C2315
G14
Data1B
2u2
D13
Data1Dir "Note"
GND
G9 C14
MBus Data2A "Note"
B12 H14
MBusTx Data2B
D11 D12
MBusRx Data2Dir "Note"
C13
Data3A "Note"
B10 J14
PwrOnX Data3B
E14
Data3Dir "Note"
G6 D14
HeadDet Data4A "Note"
D10 J13
HookDet Data4B
J11
Data4Dir "Note"
E13
ClkA "Note"
M15 K14
LedOut ClkB
H10 F13
OVVLed ClkFB "Note"
K10
SetCurrD
14
J10 M4
SetCurrKB VBUSCtrl
P9
VBUS
VBUS
VBUSSMPSOut P10
R10
VUSB
C15 R11
VIOCoil VBUSCoil
C16 VIOCoil DP R13
A13 R12
VIO DM
15
P15 L10
VCoreCoil ID
P16 M2
VCoreCoil Speed
T13 J2
VCore SlaveSW
J7
Suspend
B7
VAna
N14 H13
VBack VAux1
G13
VAux2
H8
VOut
E5
VR1
R1 C6
TestNet1 VRFC
T2 A11
TestNet2 VRCP1
T1 D8
TestNet3 VDigiMic
D9
VCP
C8
FlyHigh C2319
D15 C9
GndVIO FlyLow 2u2
D16 GndVIO VSIM K16
R15 F16
GndVCore VMEM
T14 G8
GndVCore VDIGI
R14 GndVCore
L2207
R16 B15
GndVCore VBatVIO VBAT
T15 A14
GndVCore VBatVIO
220R/100MHz
T16 GndVCore VBatVIO A15 C2326
J8 A16
GndAVSS1 VBatVIO 2u2
K8 B16
GndAVSS2 VBatVIO
L7 N15
GndChacon VBatVCore
GND
L9 N16
GndCHInd VBatVCore
B4 D5
GndLDO1 VBatVR1 VBAT3
B5 D7
GndLDO1 VBatVAna VBAT4
G11 J15
GndLDO2 VBatVAux VBAT5
F7 H15
GndRef VBatVAux
T11 F8
GndUSB VBatVDigi VBAT8
E2 K15
GndVibra VBatVSIM VBAT9
B9
VBatVCP VBAT12
D6 T3
GndXTAL VBatIHFLN
G16 P5
GndVMEM VBatIHFLP VBAT10
L15 R7
GndLED VBatIHFRN
B8 GndCPump VBatIHFRP P6 VBAT11
T4 F15
GndIHFLP VBatVMEM VBAT13
R4 L13
GndIHFLN VBatLED
R6 N10
GndIHFRP VBatChacon
P7 P11
GndINFRN VBatUSB VBAT C2281
K7 D1
GndAudRx VBatVibra 2u2
F1 GndAudTx VBatVibra A1 VBAT1
B1
VBatVibra
N12 F2
GndPVSS2 VDDAudTx VDDAUDTX
GND
K13 K1
GndPVSS3 VDDAudRx
F14 H2 THIS DRAWING IS PROTECTED BY COPYRIGHT AS AN UNPUBLISHED WORK.
GndPVSS5 VDDAudRx2 VDDAUDRX
C11 M3
GndPVSS6 VDDAudRx3 VIO
UNAUTHORIZED REPRODUCTION OF THIS DRAWING IS NOT PERMITTED.
A10 F10
GndPVSS7 VDD18
H4 P14 THIS DRAWING CONTAINS PROPRIETARY AND CONFIDENTIAL INFORMATION.
MicSub VPROGID C2296
K11
GndLED2 2u2
4376047 GND GND
2
3 4
0
3
0
J2212
1
4
5
6
7
0
1
2
3
4
5
1
J2214
2
4
5
J2217
2
1 2 3 4 5
0
J2221
1
J2223 2
3
4
5
6
7
8
9
J2236 10
11
VMEM VSIM VDigimic VRCP1 VRFC VR1 VOUT
C2280 C2214 C2269 C2265 C2266 C2222 C2267
C2211 2u2 2u2 2u2 2u2 2u2 2u2 2u2
10u
GND GND GND GND GND GND GND GND
L2206
VBAT
220R/100MHz
C2282
2u2
VDDAUDRX VDDAUDTX
GND VANA
VBAT
VBAT C2245
2u2
GND
Copyright (C) Nokia Corporation. All rights reserved.
This document is property of Nokia Corporation
3 4
5
AUDIO(13:0)
With SleepClk line should be used Near-End Star Cluster topology,
XAUDIO(7:0)
which means that every component has own branch so they are not chained.
it is very important these branches are equal lenght and the star point
is near SleepClk sourse.
H_BRIDGE(5:0)
DIG_AUDIO(20:0)
SleepClk: Shield SleepClk trace from every direction in order to avoid crosstalk injected to it.
If Gazoov2.0 is used then it is recommended to use T-filter (47R, 33pF, 47ohm) in Gazoo end
before dividing lines to different components.
AudioClk: Shield AudioClk trace from every direction in order to avoid crosstalk injected to it.
If AudioClk is shared from RAPU to both Gazoo and DigiMic then it is recommended to put termination
resistors in the beginning of both traces (Values have to be defined case by case with simulations)
MemCard Interface A-side (RAPU-Gazoo): Traces should be as short as possible and have good ground reference
ESD CRITICAL LINES!
INT_SIM(5:0)
SIM(6:0)
Route Memory/SIM signals isolated from other
SLOWAD(6:0)
signals if possibility to apply ESD to card holder
(when device is powered). Also avoid routing nearby
MMC(15:0)
regulator in/output traces.
INT_MMC(13:0)
ADVICE FOR PHONE PROGRAMS USING GAZOO/PEARL INTEGRATED LED DRIVER
- It is recommended to use equal amount of LEDs in both branches (display&keyboard)
- Also it is possible to use combination 2+4, 2+3 or 3+4 but then there is possibility that 1uF ceramic capacitor in LED driver starts ringing
- Ringing can be compensated by using following methods:
- Capacitor should be located as rigid place as possible on PWB, also places near large can or otherside of large can are possible
- Solder mask + 1st layer copper opening under capacitor
- Capacitor can be divided to two smaller caps and those can be placed other side of the PWB
USB(20:0)
VBAT VRCP1 VR1
0 1 3
VAUX2 VAUX1 VANA
VBAT8 VBAT4 VBAT1
VBAT
C2228
2u2
GND
VBAT should form a wide distribution plane
C2271 C2213 C2268
underneath ASIC to ensure proper power supply
2u2 2u2 2u2
GND GND GND
L2203
VBAT
120R/100MHz
Name

GAZOO

5
6
A
B
VREF
4
RFPWR(5:0)
VBAT13 VBAT5 VBAT9
C
C2285 C2229
2u2 2u2
GND GND
VBAT3
L2202
VBAT
120R/100MHz
C2294
2u2
GND
VBAT12 VBAT10 VBAT11
L2205
VBAT
120R/100MHz
C2247 C2249
2u2 2u2
C2232
10u
GND GND GND
D
Appr
6