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Actis VSBC-6862 User Manual

Vme single board computer with powerquicc ii processor
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Actis VSBC-6862 User Manual

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  • Page 1 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...
  • Page 2 USER'S GUIDE VSBC-6862 VME Single Board Computer with PowerQUICC II processor Revision 1.43 3105 ACTIS Computer www.actis-computer.com support@actis-computer.com Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 3 VSBC-6862 Rev 1.43 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 4: Table Of Contents

    Rev. 1.43 User's Guide Table of contents Product description _________________________________________________________ 7 1.1. Introduction _____________________________________________________________ 7 1.2. Features _______________________________________________________________ 8 1.3. Photograph _____________________________________________________________ 9 1.4. Block diagram __________________________________________________________ 10 1.5. Component location _____________________________________________________ 11 Peripherals description _____________________________________________________ 13 2.1. FLASH memory ________________________________________________________ 13 2.2.
  • Page 5 4.9.3. Transceivers operations ________________________________________________ 71 4.10. SMC1 and SMC2 serial ports ______________________________________________ 75 4.10.1. MPC-8260 I/O ports _________________________________________________ 75 4.10.2. ACTIS Console Cable _______________________________________________ 75 4.11. SCC serial ports ________________________________________________________ 76 4.11.1. RS-232 option _____________________________________________________ 76 4.11.2. RS-422/RS-485/V.35 option___________________________________________ 77 4.11.3.
  • Page 6 11.1. List of ACTIS's IP modules _______________________________________________ 121 11.2. List of ACTIS's 6U transition modules_______________________________________ 123 11.3. List of ACTIS's 6U VME boards ___________________________________________ 123 Technical support ____________________________________________________ 125 Ordering information __________________________________________________ 127 OEM Warranty ______________________________________________________ 129 Appendix___________________________________________________________ 131 15.1.

  • Page 7: List Of Figures

    While efforts have been made to ensure the accuracy of this document, and although the information contained in this document is believed to be correct, ACTIS Computer S.A. can not be held responsible for any error or for any resulting consequential losses. ACTIS Computer S.A may change or improve the specifications of its products at any time without prior notification.

  • Page 8: Product Description

    This method offers great advantage where complex processes are handled and where real time tasks are the critical features. The VSBC-6862 combines the best possibilities with its flexible industrial interface and its wide range of communications ports. This single board computer is built around a communication-oriented processor: The PowerQUICC II (MPC-8260) is a member of the PowerPC family of MOTOROLA semiconductors division.

  • Page 9: Features

    VSBC-6862 Rev 1.43 1.2. Features This board has been designed to integrate the most required functions, including several Fast Ethernet ports, communication ports, and the flexibility of four IP modules slots for easy user's customization. • Designed with Motorola PowerQUICC II processor •...

  • Page 10: Photograph

    Rev. 1.43 User's Guide 1.3. Photograph Figure 1: Photograph The VMEbus Technology logo is a Trademark of the VMEbus International Trade Association. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 11: Block Diagram

    VSBC-6862 Rev 1.43 1.4. Block diagram The VSBC-6862 architecture is divided in four main sections: The CPU This is the heart of the board, it is the MPC-8260 'PowerQUICC II' with a bus speed of 66MHz, CPM speed of 133MHz and Core speed of 133 or 200MHz.

  • Page 12: Component Location

    Rev. 1.43 User's Guide 1.5. Component location Figure 3: Component location Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 13 VSBC-6862 Rev 1.43 Please note that on the VSBC-6862, some locations are not populated. This was done either to avoid problems of component availability, either for debug purposes. From the user side, its totally transparent, nothing has to be modified.

  • Page 14: Peripherals Description

    The Flash memory bank connected to the Chip Select 0 is the boot device. This bank must contain both ResetWord used by the PowerQUICC II configuration and the boot code. The VSBC-6862 provides a 'Bootbank' jumper to provide the ability to invert the CS0 and CS2 signals, thus inverting the bootable Flash memory bank.

  • Page 15: Sram Memory

    VME Stand-By power signal. 2.4. Real Time Clock with SRAM memory The VSBC-6862 includes a real time clock device, with as an additional feature, a battery backed 32 kbyte SRAM. This device is controlled by the Chip Select 3. Its 32 kbyte SRAM provides flexible user data storage with retention capability by its SNAPHAT battery pack.

  • Page 16: Board Registers

    Each IP slot has an own IRQ level attributed to the MPC-8260. If the both IRQ are active at the same time on an IP module, the VSBC-6862 handles the IP IRQ 0 first, and then IP IRQ 1. The IP DMA channels are controlled by the IDMA channels, with IP Slot A controlled by IDMA1, Slot B controlled by IDMA2, Slot C controlled by IDMA3 and Slot D controlled by IDMA4 2.6.
  • Page 17 The VME system controller. This function can be enabled or disabled with the Slot1 jumper. When the system controller is enabled, the VSBC-6862 provides the following functions: VME arbiter: SGL, PRI, or RRS depending of the VAM register. VME bus monitor: BTO(30) IACK daisy-chain driver.

  • Page 18: I C Eeprom

    An on-board transformer provides a direct connection for a 10Base-T and 100Base-TX interface 2.10. SMC1 and SMC2 serial ports The VSBC-6862 offers two RS-232 serial ports. One of these general-purpose serial ports is available on the front panel RJ-45 connector, the other one is available on an internal connector.

  • Page 19: Scc Multi-Protocols Serial Ports

    RS-232 mode for V.35 Note: As described above, the VSBC-6862 did not provides all defined signals for V.35, it provides all 'transmission signals' but not for example, the loopback or ring indicator signals. All ports support full and half-duplex mode, and supports also synchronous operations.

  • Page 20: C Interface

    The board provides external accesses to this bus through an internal connector. 2.13. LED displays The VSBC-6862 allows monitoring for a wide range of board activities, these status are available for user check on the front panel. The Power and Access LEDs functions are hardware fixed.
  • Page 21 VSBC-6862 Rev 1.43 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 22: Connectors & Jumpers

    In spite of this fact, ACTIS placed the connectors and jumpers in a very straightforward location. The connectors are numbered upwards: the first connectors for IP, serial ports and Fast Ethernet ports are in the bottom of the board.

  • Page 23: Figure 4: Connectors And Jumpers Location

    VSBC-6862 Rev 1.43 Locations Figure 4: Connectors and jumpers location Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 24: Push Button: Bp1

    Rev. 1.43 User's Guide 3.1. Push Button: BP1 In the front panel, the push button generates a Power-On Reset to the board. This button is debounced. Figure 5: Push button location Before SN:10135, the Push Button was generating a Hardware Reset instead of Power-On Reset.

  • Page 25: Ip Module Strobes, Header J1

    J1 header allows the selection for both signals with the following assignment. The VSBC-6862 has internals pull-ups connected to these Strobe signals. Jumpers permit to access or connect pull-downs to these signals.

  • Page 26: Jumper: J2

    Description: This jumper is used to define which Flash memory bank is the boot bank. The VSBC-6862 as two Flash memory banks. The usage of this jumper allows the user to reverse the bootable bank. This function will be very helpful to test new software versions during software debugging.

  • Page 27: Jumper: J3

    When the Slot1 function is enabled, the board activates the functions to be the VME System Controller: Arbiter, Clock generation, Daisy-Chain Handling, Bus timer Activate the Slot1 function only if the VSBC-6862 is physically installed in the first VME Slot. Warning 3.5.

  • Page 28: Jumpers: J4, J5, J6, J7

    Rev. 1.43 User's Guide 3.6. Jumpers: J4, J5, J6, J7 This are the 'serial mode' jumpers, they have six position. They permits to select the mode used for the corresponding serial port. All the six positions of these jumpers must be either all in RS-232 position, either all in RS-485 position.

  • Page 29: Jumper: J8

    VSBC-6862 Rev 1.43 3.7. Jumper: J8 This jumper sets the base address for the A16 slave window. This window contains all registers accessible from an external VME master. A jumper plugged represents an address line in the state '0', with:...

  • Page 30: Two Rs-232 Terminal Ports, And I

    Rev. 1.43 User's Guide 3.8. Two RS-232 terminal ports, and I C bus: P13, P4 These serial ports are provided for general purpose application, its interface levels comply with the RS-232 specification. In most environments, these interfaces will be used as a console port for board configuration and monitoring functions.

  • Page 31: Figure 14: Connector P4 Pinout

    VSBC-6862 Rev 1.43 The second serial port is available in an internal connector shared with the I C bus. P4 contains the signals for the SMC2, power lines for user purposes (max 500mA, fused), and the I bus extension. This connector is available on-board through a HE-10 connector defined as following:...

  • Page 32: Four Multi-Protocols Serial Ports P7,P8,P9, P10

    Rev. 1.43 User's Guide 3.9. Four multi-protocols serial ports P7,P8,P9, P10 These four serial ports are provided for user applications These four ports are available in the front panel on four HD-15 connectors with: Port SCC1: connector P7 Port SCC2: connector P8 Port SCC3: connector P9 Port SCC4: connector P10 All signals on these connectors are in full-duplex mode.

  • Page 33: Figure 16: Termination Resistor Networks Example

    VSBC-6862 Rev 1.43 Termination network resistors When the RS-422/RS-485/V.35 is chosen, the VSBC-6862 is provided with removable network resistors. Each resistor network is located as: RZ34, RZ35: port SCC 1 RZ36, RZ37: port SCC 2 RZ38, RZ39: port SCC 3...

  • Page 34: Two Fast Ethernet Ports, Connectors P11, P12

    Rev. 1.43 User's Guide 3.10. Two Fast Ethernet ports, connectors P11, P12 For LAN based applications, two fast Ethernet connections are available for twisted-pair interface which is compliant for both 100Base-TX and 10Base-T specification described below. The PHY part of the BSBC-6862 is based on the SMSC83C183 transceiver. Front panel, connector Fast Ethernet 1 = connector P12, corresponds to FCC2.

  • Page 35: Ieee-1149.1 Interface, Connector P3

    VSBC-6862 Rev 1.43 3.11. IEEE-1149.1 interface, connector P3 The MPC-8260 provides a dedicated user-accessible test access port (TAP) that is fully compatible with the IEEE 1149.1 Standard Test Access Port and Boundary Scan Architecture. Problems associated with testing high-density circuit boards have led to development of this standard under the sponsorship of the Test Technology Committee of IEEE and the Joint Test Action Group (JTAG).

  • Page 36: Vme Bus, P1 Connector

    Rev. 1.43 User's Guide 3.12. VME bus, P1 connector Row A Row B Row C Signal Signal Signal /BBSY /BCLR /ACFAIL /BG0IN /BG0OUT /BG1IN /BG1OUT /BG2IN /BG2OUT SYSCLK /BG3IN /SYSFAIL /BG3OUT /BERR /DS1 /BR0 /SYSRESET /DS0 /BR1 /LWORD /WRITE /BR2 /BR3 /DTACK /IACK...

  • Page 37: Vme Bus, P2 Connector

    VSBC-6862 Rev 1.43 3.13. VME bus, P2 connector This connector has its VME user's pins attributed to the IP I/O slot D Row A Row B Row C Signal Signal Signal IP D, I/O 2 +5 V IP D, I/O 1...
  • Page 38 Power supply furnished by an non-interruptible power source TM 5 V 5 V provided by the VSBC-6862 to an optional transition module. Fuse protected This connector is compliant with the DIN-41612 specification. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 39: Four Ip Module Logic Interface, Connectors P3A, P4A, P5A, P6A

    3.14. Four IP module logic interface, connectors P3A, P4A, P5A, P6A For input/output extensions, the VSBC-6862 board provides a four slot IP module interface. This bus interface complies with the ANSI/VITA-4 1995 specification and handles 16-bit wide modules and supports 8 MHz mode.

  • Page 40: Four Ip Module I/O Signals, Connectors P3C, P4C, P5C, P6C

    3.15. Four IP module I/O signals, connectors P3C, P4C, P5C, P6C The four IP modules slots present on the VSBC-6862 have their I/O connections available on four high density connectors. They are connectors from Hirose (Ref: HIF6A-50PA-1,27DSA). The corresponding Hirose cable connector reference is: HIF6-50D-1,27R.

  • Page 41: Real Time Clock Battery, Circuit U5

    Rev 1.43 3.16. Real time clock battery, circuit U5 The VSBC-6862 provides a real time clock for calendar function. This device includes also a 32 kByte SRAM with battery backed capability. It also include an on-chip watchdog that can be used as board's Watchdog.

  • Page 42: Fuses Protection

    User's Guide 3.17. Fuses protection The VSBC-6862 offers a flexible I/O extension facility through its quad IP module interface. Therefore some cautions must be taken to avoid hardware damage in case of short circuit. This function is handled by a set of on-board fuses.
  • Page 43 VSBC-6862 Rev 1.43 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 44: Software Description

    The error generation is mainly handled with the internal bus monitor included in the 8260. See the SYPCR register and bus monitor description in the 8260 User's manual. Here follows the description of all used chip select on the VSBC-6862: Chip Select...

  • Page 45: Flash Memory

    VSBC-6862 Rev 1.43 4.2. FLASH memory Two banks of Flash devices are available. Each bank is 4 or 8 MBytes wide for a total of 8 or 16 MBytes Flash. The GPCM is used to control the Flash memory. Each bank is controlled by the Chip Select 0 (CS0) or Chip Select 2 (CS2) signal.

  • Page 46: Flash Programming

    -> $FFC0 0068 This example is for a 8MByte VSBC-6862. There is two 4MByte Flash memory banks. This Chip Select is connected to the second bank of Flash memory, depending of the 'BootBnk' jumper. The GPCM is used to control the Flash memory.

  • Page 47: Flash Chip Erase

    VSBC-6862 Rev 1.43 4.2.3. FLASH chip erase Chip erase operation is accomplished by executing the erase command sequence. This will invoke the Embedded Erase Algorithm, which is an internal algorithm that automatically programs the array if it is not already programmed before executing the erase operation. During erase, the device automatically defines the erase pulse widths and verifies proper cell margin.

  • Page 48: Flash Sector Protection: Option On Request

    4.2.5. FLASH sector protection: option on request The VSBC-6862 can also provides the possibility to protect or enable sectors writing. To implement this feature, the board has the capability to supply 12V on the Flash Reset pin. This voltage is supplied on both banks.

  • Page 49: Sdram Memory

    This controller supports directly all the SDRAM possibilities, like pipelining and interleaving. The VSBC-6862 is supplied with 128 MBytes SDRAM on-board, organized with four 16Mbitsx16 devices. The 64 bits wide data bus is directly connected on the 60x bus of the MPC-8260 to achieve the best performance.
  • Page 50 Rev. 1.43 User's Guide Typical Option Register: Field Value Function 0-16 $FE00 0 Address mask: for 32 MBytes 17-18 Bank per device: 19-22 ROWST 0111 Row start address bit: 23-25 NUMR Number of Row lines: PMSEL Page mode select: normal IBID Int.

  • Page 51: Sram Memory

    VSBC-6862 Rev 1.43 4.4. SRAM memory The VSBC-6862 includes 1 MByte SRAM for fast exchanges with external VME masters. With its backup capability with the VME Stand-By power line, this memory can be also useful to backup critical data. This memory is handled with the GPCM through the Chip Select 9.

  • Page 52: Real Time Clock With Sram Memory

    User's Guide 4.5. Real Time Clock with SRAM memory The VSBC-6862 includes a real time clock device, with as an additional feature, a battery backed 32 kByte SRAM. This 32 kByte SRAM provides a flexible user data storage with retention capability by its SNAPHAT battery pack.

  • Page 53: Rtc Registers Read Operation

    VSBC-6862 Rev 1.43 48T37V partial register map is: Base + Function (Range) BCD format $7FFF 10 Years Year Year (00-99) $7FFE 10M. Month Month (01-12) $7FFD 10 Date Date Date (01-31) $7FFC Century/Day (0-1/01-07) $7FFB 10 Hours Hours Hour (00-23)
  • Page 54 Power-On Reset. In this case, when the Watchdog's counter reachs zero, the VSBC-6862 will be completely Resetted. The connection of the IRQ signal to the 8260 permits also to use the Alarm feature contained in the M48T37V.

  • Page 55: Ip Modules

    Etc... These interfaces give the possibility to easily customize the VSBC-6862. This IP bus is implemented on the VSBC-6862 through a specific CPLD, which provides the interface between the PowerQUICC II processor and the four IP module slots. To avoid internal resynchronizations, the IP clock has been defined as derived from the bus clock (66MHz).
  • Page 56 Rev. 1.43 User's Guide The IP interface uses two processor chip selects to cover all IP module spaces. The I/O, ID, and INT spaces are controlled by the Chip Select 4. The memory space is controlled by the Chip Select 5. Chip Select 4 configuration Typical Base Register: Field...
  • Page 57 VSBC-6862 Rev 1.43 Typical Option Register: Field Value Function 0-16 $FE00 0 Address mask: for 32 MBytes 17-18 Reserved BCTLD Buffer control: 20-22 Reserved Burst inhibit Burst disabled 24-28 Reserved 00000 29-30 EHTR No idle clock inserted Reserved -> $FE00 0100...

  • Page 58: Memory Spaces

    $180'0000 - $1ff'ffff 4.6.2. Registers The VSBC-6862 contains registers to configure the IP slots operations. All IP slot has is own set of registers to have the four IP slots fully independent. These registers are controlled by the Chip Select 4.

  • Page 59: Interrupt Functions

    68k family. Since that the PowerPC no more handles this type of bus access, the VSBC-6862's internal logic provides specific function in order for ensuring interrupt acknowledge compatibility. The process becomes as follows.

  • Page 60: Dma Functions

    Rev. 1.43 User's Guide 4.6.4. DMA functions The DMA is controlled by the IDMA channels of the MPC-8260. The DCR registers set-up the DMA channels configuration, as following: ENDMA bit: It enables the DMA request to the PowerQUICC II processor, in accordance with the S0 bit definition.
  • Page 61 VSBC-6862 Rev 1.43 Board control registers The VSBC-6862 contains some registers for general board features. They are mapped in the Chip Select 4 memory map and VME slave A16 memory map as: Local Offset VME offset Name Mode Description $1001...

  • Page 62: Vme Operations

    The main function is to set the SLOT1 function that activates the VME controller when the VSBC-6862 is plugged in the slot1. See jumper 'Slot1' description. The other functions are for Reset operations between VME and the VSBC-6862. These functions are described in the above corresponding chapter. See jumpers 'Sysresetin' and 'Sysresetout' description.

  • Page 63: Vme Master

    VSBC-6862 Rev 1.43 4.7.3. VME master The VSBC-6862 is VME master A32/A24/A16/D32/D16/D8 The VME master can use two windows to access the VME bus. They are controlled by the UPM, with the chip selects CS6 and CS7. All VME chip select takes a CPU space of 64 MBytes.
  • Page 64 ROR mode: Release On Request, the VSBC-6862 keeps the bus until an VME Bus Clear signal is coming. This mode permits the VSBC-6868 to access the VME bus without having to request the bus, thus, accelerates the bus access.

  • Page 65: Vme Slave

    'winning' master can use the zone. It’s to be noticed that an external VME access to one of these zones (VSBC-6862 slave access), will not block the local processor with the SDRAM, IP modules, or communication ports. For example, the MPC-8260 can access the SDRAM at the same time an external VME master accesses the local SRAM.

  • Page 66: Figure 20: Vme Slave Window

    Flash bank: 8MB VSWA24[FLAx] 512kB 256kB 32kB VSBC-6862 slave window RTC: 32kB Figure 20: VME slave window The bootable Flash memory bank 0 is 8 MBytes, the VME slave window for Flash is 256 kBytes. 32 positions are needed to cover all Flash memory map. This is done using the VSWA24 register, bits FLA18-FLA22.

  • Page 67: Vme Interrupter

    Software Exception routine include the deactivation of the 'local- RMW' function. 4.7.5. VME interrupter The VSBC-6862 can send any interrupt level to the VME bus with its interrupter I(1-7) D08(O) ROAK. Before generating this interrupt, the interrupt level and the vector must be defined with the VIVEC register.

  • Page 68: Vme System Controller

    The VSBC-6862 can work as a system controller. This function can be enabled or disabled with the Slot1 jumper. When the system controller feature is enabled, the VSBC-6862 provides the following functions: • VME arbiter: SGL, PRI or RRS depending of the VAM register.

  • Page 69: Serial I C Eeprom

    VSBC-6862 Rev 1.43 4.8. Serial I C EEPROM 8 kbits of non-volatile memory is provided on the I C bus. This memory can be used for board initialization and user purposes, they will generally contains some boards specific information like physical Ethernet addresses.

  • Page 70: Fast Ethernet Ports

    Interface features the Basic and Extended registers set. The 4B/5B Encoder and Decoder are also included. An on-board transformer provides a direct connection for a 10Base-T and 100Base-TX interface Specific hardware configuration as defined by the VSBC-6862 is like the following: Fast Ethernet Port 1 PHY address:...

  • Page 71: Mpc-8260 I/O Ports

    VSBC-6862 Rev 1.43 4.9.2. MPC-8260 I/O ports The following table gives the connection to MPC-8260 I/O ports. MPC-8260 Peripheral function Function Signal Description Fast Ethernet port 1 MII_MDC ECMDC data clock MII_MDIO MIIMDIO data PB26 MII_CRS MIICRS carrier sense PB27...

  • Page 72: Transceivers Operations

    Rev. 1.43 User's Guide 4.9.3. Transceivers operations Each transceiver has many registers to handle Fast Ethernet operation. These registers are accessed with set of command on the MII bus. Commands must use a serial format starting with an idle pattern that is a series of at least 32 1's of data, with clock pulses having at least 400ns period.
  • Page 73 VSBC-6862 Rev 1.43 PHY register address 1: Status Register NAME DESCRIPTION DEFAULT 100BASE-T4 1 = 100BASE-T4 capability 0 = no 100BASE-T4 capability 100BASE-TX full duplex 1 = full duplex 100BASE-TX capability 0 = No full duplex 100BASE-TX capability 100BASE-TX half duplex...
  • Page 74 Rev. 1.43 User's Guide PHY register address 4: Auto-Negotiation Advertisement Register NAME DESCRIPTION DEFAULT Next Page 1 = additional link code word pages 0 = no additional pages Acknowledge 1 = received ANeg Word recognized 0 = not recognized Remote fault 1 = ANeg remote fault detected 0 = no remote fault detected 12:10...
  • Page 75 VSBC-6862 Rev 1.43 LED Function: Description for PHY register 17, bits 7 and 6 Bits 7, 6 LED_5 LED_4 LED_3 LED_2 LED_1 LED_0 Receive Activity Transmit Activity Link Collision Full Duplex 10 Mb/s Receive Activity Transmit Activity Link Activity Full Duplex...

  • Page 76: Smc1 And Smc2 Serial Ports

    4.10.2. ACTIS Console Cable ACTIS can provide a serial cable for this Console port. Its reference is CAB-RJ45-DB9. This DTE cable connects the VSBC-6862's Console port (SMC) to a standard PC serial port in RS-232 with software handshake. Connectors: RJ-45 8-pin male...

  • Page 77: Scc Serial Ports

    Baud Rate Generators (BRG) with external clock signal. 4.11.1. RS-232 option These VSBC-6862 ports are in an standard RS-232 mode. The following signals are controlled by the PowerQUICC II: TxD, RxD, TxC, RxC, CTS, RTS, and DCD All ports support hardware handshaking functions.

  • Page 78: Rs-422/Rs-485/V.35 Option

    PSMR). Each port has its own resistor network. These resistors are on sockets. ACTIS choose to implement manual resistor networks to keep the RS- 485 network always working, independently of the power state of the VSBC-6862. These resistor networks are to be installed only when the corresponding serial port is at one of both ends of the RS-485 network cable.

  • Page 79: Actis Serial Cable

    4.11.3. ACTIS Serial Cable ACTIS can provide a serial cable for these multi-protocol serial ports. Its reference is CAB-V6862- SCC-01. This cable connects the VSBC-6862 multi-protocols serial ports (SCC) in RS-232/RS- 422/RS-485/V.35 mode to a DCE equipment, for example a modem.

  • Page 80: Mpc-8260 I/O Ports

    Rev. 1.43 User's Guide 4.11.4. MPC-8260 I/O ports The following table gives the connection to MPC-8260 I/O ports. MPC-8260 Peripheral function Function Signal Description SCC1 PD30 TXD1 Transmit data PD31 RXD1 Receive data PD29 RTS1 Request to send PC15 CTS1 Clear to send PA22 PA22...

  • Page 81: I 2 C Interface

    For related software setup, please refer to the corresponding Motorola MPC- 8260 user's manual and application notes. 4.13. Auxiliary LEDs The VSBC-6862 provides two auxiliary LEDs, controlled by the PowerQUICC II I/O port. The following table gives its connection to MPC-8260 I/O ports. MPC-8260...

  • Page 82: Summary Of Board Resources

    Rev. 1.43 User's Guide Summary of board resources 5.1. Chip Select Chip Select Port size (bits) Device Size Flash bank 0: boot device 0 8 MBytes SDRAM 128 MBytes Flash Bank 1: boot device 1 8 MBytes Real Time Clock and SRAM 32 kBytes IP ID, I/O + Board registers 32 kBytes...

  • Page 83: Interrupt Sources

    VSBC-6862 Rev 1.43 With: Local offset: offset from local CS4 VME offset: offset from VME A16 slave window, defined with J8 Mode: RW=Read/Write, RO=Read only, WO=Write only 5.3. Interrupt sources Interrupt Source IRQ0 not used IRQ1 VME interrupt-handler IRQ2 IP module D...

  • Page 84: Figure 21: Reset Scheme

    Rev. 1.43 User's Guide The VSBC-6862 uses these reset signals with an equivalent circuitry than following: Figure 21: Reset scheme The PORESET can be generated by: - the VSBC-6862's power monitor (MAX700) - the RTC's watchdog, depending of the SRESR register settings...

  • Page 85: Power Description

    Rev 1.43 5.5. Power description For the majority of the applications, the VSBC-6862 uses only the +5V power supply. Internally, many modules use 3.3V, and the MPC-8260 use also 2.5 or 2.0V. The internal 3.3V, and 2.5V or 2.0V voltages are generated on-board.

  • Page 86: Mpc-8260 I/O Ports Assignment

    Rev. 1.43 User's Guide 5.7. MPC-8260 I/O ports assignment The MPC-8260 processor provides four I/O ports (A, B, C and D) which have the abilities for handling several hardware functions like serial communication interfaces, DMA control handling and general purpose I/Os. MPC-8260 Peripheral function Function...
  • Page 87 VSBC-6862 Rev 1.43 BRG4 Transmit clock PD10 PC26 CLK6 Receive clock Fast Ethernet port 1 MII_MDC ECMDC data clock MII_MDIO MIIMDIO data PB26 MII_CRS MIICRS carrier sense PB27 MII_COL MIICOL collision MII_TX_EN MIITXEN transmission enable PB29 PC19 CLK13 MII_TX_CLK transmission clock...
  • Page 88 Rev. 1.43 User's Guide IDMA4: DREQ DMARQ4 IDMA request IDMA1: DACK DMACK1 IDMA acknowledge IDMA2: DACK DMACK2 IDMA acknowledge IDMA3: DACK DMACK3 IDMA acknowledge IDMA4: DACK DMACK4 IDMA acknowledge PC22 IDMA1: DONE DMADONE1 IDMA done IDMA2: DONE DMADONE2 IDMA done IDMA3: DONE DMADONE3 IDMA done...
  • Page 89 VSBC-6862 Rev 1.43 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 90: Board Initialization

    The ResetWord is loaded by the 8260 from the boot Flash memory bank. When the ResetWord is invalid in Flash memory, the VSBC-6862 must be started with the ResetConf jumper plugged-in in order to use the 8260 default ResetWord, and then the ResetWord can be programmed in the Flash memory through the JTAG port.

  • Page 91: Reset Word

    The ResetWord is a 32 bits field read by the PowerQUICC II during Power-On sequence. This word set several important options for the hardware operations. The Reset Word must be located in the bootable device, on the VSBC-6862, it will be in the Flash memory bank, at offset 0.

  • Page 92: Mpc-8260 Internal Registers

    User's Guide 6.3. MPC-8260 internal registers The MPC-8260 contains some registers to configure for correct operations. Here follows the specific configuration of these registers for the VSBC-6862: Internal Memory Map Register: IMMR This register set the memory map for the MPC-8260 internal registers.
  • Page 93 VSBC-6862 Rev 1.43 SIU Module Configuration Register: SIUMCR This register contains bits that configure various features in the SIU module. Field Value Function Bus busy disable: pin is DBB External snoop enable: pin is GBL PBSE Parity byte select enable:...

  • Page 94: Mpc-8260 I/O Ports

    The PowerQUICC II contains 120 I/O pins that are used for communication ports and general purpose I/Os. Many different functions are multiplexed on I/O pins, and need to be defined depending on the board configuration. For the VSBC-6862, the I/O pins have to be defined as: Function PPARA...
  • Page 95 VSBC-6862 Rev 1.43 SCC2_TXD PB12 PB13 not used PB14 SCC3_RXD PB15 SCC2_RXD PB16 not used PB17 not used PB18 FCC2_MII_RXD3 FCC2_MII_RXD2 PB19 PB20 FCC2_MII_RXD1 PB21 FCC2_MII_RXD0 FCC2_MII_TXD0 PB22 PB23 FCC2_MII_TXD1 PB24 FCC2_MII_TXD2 PB25 FCC2_MII_TXD3 PB26 FCC2_MII_CRS PB27 FCC2_MII_COL PB28 FCC2_MII_RX_ER...
  • Page 96 Rev. 1.43 User's Guide LED_AUX1 PC30 PC31 SCC1_TXCLK Function PPARD PDIRD PODRD PSORD not used not used IDMA1_DACK not used not used SMC1_RXD SMC1_TXD PD10 SCC4_TXCLK PD11 not used PD12 RTC_WDI PD13 not used PD14 I2C_SCL PD15 I2C_SDA PD16 not used PD17 SCC2_TXCLK PD18...

  • Page 97: Chip Select

    Note that for SDRAM, some registers are to be programmed in addition to the chip select. These registers initialization are described in the corresponding chapter. 6.6. Serial EEPROM The VSBC-6862 provides one on-board serial EEPROM on the I C bus which handle most of the configuration attributes.
  • Page 98 Rev. 1.43 User's Guide Serial Number Option (optional) This option specifies the serial number of the product (ASCII terminated by a zero byte). The code for this option is 3, and its minimum length is 1. E.g.: $03 $06 'P' 'R' 'O' 'T' 'O' $00 Revision Option (optional) This option specifies the revision / version of the board.

  • Page 99: Boot Code

    Thus the boot code will start at the offset $0100 of the bootable Flash memory bank. The addresses below $0100 are reserved for the PowerQUICC II reset configuration. By default, the VSBC-6862 is provided with one Flash memory bank factory loaded with the ECMon debugger.

  • Page 100: Registers Definition

    Rev. 1.43 User's Guide Registers definition IPGCRA IP General Configuration Register A CS4 + $401 IPGCRB IP General Configuration Register B CS4 + $501 IPGCRC IP General Configuration Register C CS4 + $601 IPGCRD IP General Configuration Register D CS4 + $701 These registers permit to configure general purposes for IP slot x.
  • Page 101 VSBC-6862 Rev 1.43 IPDCRA IP DMA Configuration Register A CS4 + $403 IPDCRB IP DMA Configuration Register B CS4 + $503 IPDCRC IP DMA Configuration Register C CS4 + $603 IPDCRD IP DMA Configuration Register D CS4 + $703 These register permits to configure the DMA access for IP slot x.
  • Page 102 Rev. 1.43 User's Guide IPIVRA IP Interrupt Vector Register A CS4 + $481 IPIVRB IP Interrupt Vector Register B CS4 + $581 IPIVRC IP Interrupt Vector Register C CS4 + $681 IPIVRD IP Interrupt Vector Register D CS4 + $781 These registers permit to acknowledge the IRQ for IP slot x.
  • Page 103 VSBC-6862 Rev 1.43 SRESR Software Reset Register CS4 + $1001 VME slave + $9 This register permits to perform Software or Hardware Reset by software Value Default Writing this register with the value $1 'connects' the RTC's Watchdog pin to the Power-On Reset Writing this register with the value $3 generates a Reset on Flash Devices Writing this register with the value $6 generates a Hardware Reset on board.
  • Page 104 Rev. 1.43 User's Guide BSCR Board Special Configuration Register CS4 + $1021 This register permits to access the protection purpose of the Flash memory. This option is available on request. Value FLPROT Local_rmw Default With: FLPROT Release Mode Normal operation Put 12V on the Flash memory Reset pin to protect/unprotect sectors, please see Flash memory datasheet Local_rmw...
  • Page 105 VSBC-6862 Rev 1.43 VMBA VME Master Bus Access CS4 + $1051 This register permits to select the mode for VME bus access and release Value Default With: Request Level Bus Request 0 Bus Request 1 Bus Request 2 Bus Request 3...
  • Page 106 Rev. 1.43 User's Guide VMBMA VME Master: A32 Base address for window A CS4 + $1055 VMBMB VME Master: A32 Base address for window B CS4 + $1057 These register permit to complete the high order address for accesses in A32 mode. Value VA31 VA30...
  • Page 107 VSBC-6862 Rev 1.43 VHIL VME interrupt Handler: Interrupt Level CS4 + $1061 This register indicates the current VME interrupt level to acknowledge by reading the corresponding VHV register. Value IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 IRQ2 IRQ1 Default With: IRQ1: VME interrupt request level 1...
  • Page 108 Rev. 1.43 User's Guide VME Interrupter Vector CS4 + $1073 to CS4 + $107f When accessed, this register acknowledges the corresponding VME interrupt as: VME IRQ to acknowledge VHV address CS4 + $1072 CS4 + $1074 CS4 + $1076 CS4 + $1078 CS4 + $107a CS4 + $107c CS4 + $107e...
  • Page 109 VSBC-6862 Rev 1.43 VIVEC VME Interrupter Vector CS4 + $106d VME slave + 7 This register contains IRQ level and the vector sent by the VME interrupter. 8260 Value Vec4 Vec3 Vec2 Vec1 Vec0 Default With: IL2-IL0: IRQ level coded on 3 bits. IRQ level = 0 implies that no IRQ will be...
  • Page 110 Rev. 1.43 User's Guide VSBA24 VME Slave Base Window A24 CS4 + $1069 VME slave + 3 This register sets the VME base address for the visible A24 memory window. 8260 Value WinA24On MailOn VME_rmw Default With: VME Slave Base Address $00'0000 $10'0000 $20'0000...
  • Page 111 VSBC-6862 Rev 1.43 VSWA24 VME Slave Window A24 management CS4 + $106b VME slave + 5 This register contains the local offsets for the VME A24 window. 8260 Value SRA19 FLA22 FLA21 FLA20 FLA19 FLA18 Default With: SRA19: corresponding high order local address for SRAM memory.

  • Page 112: Characteristics

    Rev. 1.43 User's Guide Characteristics Electrical characteristics PARAMETER UNITS POWER SUPPLY +5 V (VDD) 4.5 V +12 V 10.8 13.2 -12 V -13.2 -10.8 Input voltage GND-0.3 VDD+0.3 Operating Power supply current (without IP modules) 1800 (only used by IP modules and Flash protection) +12V (only used by IP modules) -12V...
  • Page 113 VSBC-6862 Rev 1.43 Performance issues The VSBC-6862 has been designed for providing efficient performance with peripheral connected around the PowerQUICC II processor. The following table provides the respective wait states that should be expected for each access type. Conditions: MPC-8260 @ 200 MHz...

  • Page 114: Physical Board Definition

    Rev. 1.43 User's Guide Physical board definition 9.1. PCB dimensions 1.7mm 160mm Figure 22: PCB dimensions Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 115: Front Panel

    VSBC-6862 Rev 1.43 9.2. Front panel Figure 23: Front panel Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 116: Software Available

    Software available Thanks to ECRIN Automatismes, many software packages are already available for the VSBC-6862. ECRIN is our sister company and work together with ACTIS to provide full solution to our customers. All software requests can be directly addressed at ECRIN. (see chapter Technical support) 10.1.

  • Page 117: Command Description

    VSBC-6862 Rev 1.43 The boot time is less then 1 second. Then, when typing the 'Return' key, the 'ECMon>' prompt will be displayed. The default radix for all commands is hexadecimal. You can use an explicit prefix to specify the radix as:...
  • Page 118 Rev. 1.43 User's Guide Function : Read or write data from/to an I2C device Syntax : i2c <device> <offset> <count> <address> Options : <device> - I2C device address <odd value> to read <even value> to write <offset> - starting I2C memory offset <count>...
  • Page 119 VSBC-6862 Rev 1.43 mmap Function : Display memory map Syntax : mmap mmb, mmw, mml Function : Modify the contents of memory (byte-value) Syntax : mmb <address> [ { <value> | <keyword> } ] Options : <address> - starting address <value>...

  • Page 120: Advanced Information

    Rev. 1.43 User's Guide pflash Function : Program flash memory Syntax : pflash <source> <count> <destination> Options : <source> - starting source address <count> - number of bytes to program <destination> - starting destination address reset Function : Provide an hardware reset Syntax : reset sload...

  • Page 121: Typical Example

    In case of problem, the user can come back in the previous state inverting again the 'BootBnk' jumper and resetting the board. If the Window's Hyperterminal is used to load the ASCII file to the VSBC-6862, please set the Line delay to 10ms in the Properties, Configuration, ASCII configuration menu.

  • Page 122: Hardware Available

    The VSBC-6862 can expand his functions by the mean of the IP modules. Up to four IP modules can be plugged on this board. A choice of these modules is available by ACTIS Computer, and the most used are described above. Reference Description 8 single ended (or 4 differential) channels, 12-bit A/D Converter ±10 V, 140...
  • Page 123 VSBC-6862 Rev 1.43 MIL-STD-1553 Bus controller (BC), Remote terminal (RT), and Bus monitor (MT) LAN-15 with 64K x 16 bit of RAM (to support complex MT or BC applications), compatible with other IP using the DDC ACE controller Fast Ethernet™ IEEE802.3u Controller with on-board 128 KBytes Fast SRAM...

  • Page 124: List Of Actis's 6U Transition Modules

    The IP modules provides many functions, some of these functions need special connectors or lot of I/O ports. ACTIS provide transition modules for all its IP modules and cables to provide professional connectors on front panels. A choice of ACTIS transition modules is described above.
  • Page 125 VSBC-6862 Rev 1.43 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 126: Technical Support

    ECRIN Automatismes which supply BSP and IP driver for ACTIS Computer products: • Phone : +33 476 92-2000 • Fax : +33 476 08-0318 • Email : support@ecrin.com Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 127 VSBC-6862 Rev 1.43 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 128: Ordering Information

    VME board with MPC-8260 @ 200 MHz 128 MBytes SDRAM, 16 MBytes Flash memory, and four serial ports VSBC-6862/200-128-EK Engineering Kit VSBC-6862, contains documentation, support CD-ROM, four IP cables, four multi-protocol serial cables. CAB-RJ45-DB9 Adaptor cable with RJ-45 and DB-9 female in RS-232, DTE mode...
  • Page 129 VSBC-6862 Rev 1.43 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 130: Oem Warranty

    To obtain warranty service, you should first contact the vendor from whom you purchased the ACTIS VSBC-6862 board. You may be asked to furnish proof of purchase to confirm the board is still under warranty. All ACTIS VSBC-6862 board returned to ACTIS Computer or its authorized distributor must be securely packaged and shipped postage prepaid.
  • Page 131 VSBC-6862 Rev 1.43 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 132: Appendix

    15.1.1. Example A: Application with VME boards This example represents the VSBC-6862 used in a standard VME rack with other VME boards and transition modules. In this configuration, the VSBC-6862 is VME master and can also be configured in system controller mode to arbiter the bus access for other masters.

  • Page 133: Example B: Application With Non-Vme Boards

    PC-Cards slots, one ISDN port, one multi-protocol serial port, two IP slots, and more... In this example, the VSBC-6862 with its two Fast Ethernet ports can access other boards without usage of the VME bus, using a Fast Ethernet port to controls the specific peripherals of the SBC-6860, its second Fast Ethernet port can be used to connect other systems.

  • Page 134: Example C: Application In Stand-Alone

    Example C: Application in stand-alone The VSBC-6862 can be used in stand-alone mode. The following picture illustrates the VSBC-6862 equipped with four UCC-08A/B IP modules, which provides each eight synchronous or asynchronous serial ports. For more convenience, we added four SC-08DB transition modules to have standard DB-25 connections on front panel.
  • Page 135 VSBC-6862 Rev 1.43 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 136: Index

    Fuses description............................41 connector ............................30 overview............................. 19 software description ........................... 80 Interrupt sources............................ 82 IP modules ACTIS............................... 121 connector for logic interface....................... 38 I/O connector ............................. 39 I/O connector on VME........................36 overview............................. 14 software description ........................... 54 JTAG connector ............................
  • Page 137 VSBC-6862 Rev 1.43 jumpers .............................. 27 overview............................. 18 software description ........................... 76 Termination resistors ......................... 32 SDRAM overview............................. 13 software description ........................... 48 connector 1 ............................29 connector 2 ............................30 overview............................. 17 software description ........................... 75 SRAM overview............................. 14 software description ...........................
  • Page 138 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...

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