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8K MEMORY USERS GUIDE
Page 5
HEMORY LOCATIONS
TO
BE TESTED (IN DECIMAL) •
IT TAKES SEVERAL MINUTES
TO
TEST
A
BOARD, AFTER NHICH THE PROGRl\M TYPES "CHECK OK" AND CONTINUES TESTING.
A
THOROUGH TEST REQUIRES ABOUT
10
PASSES.
IF
At."J
ERROR OCCURS,
THE
LOCATION IS
PRINTED OOT ALONG luTE THE NUMBER WRITI'EN INTO fI11EHORY AND READ FROM MEMORY.
EXAMPLE RUN
RUN
HiGH MEMORY ADD.? 20479
LOW MEMORr ADD.? 8192
LOCATION
WROTE
CHECK OK
GHECK OK
CH[CX OK
PROGRAM LISTING (MITS !ASIC]
30
INPUT~"HIGH
ME-HORY ADD .. ··JH
;0 I
NPUT"LOW
MEMORY
ADD .. •• J
L
!
21 PR I
NT"I-OCAT
I ON".t·' WROTE'· .. >OR EAO"
1.2'2 A-RND ( 1 )
125
e...
RND(-A)
130 FOR N-L TO H
140 POKE
N~INT(256.RNO{1»
150 NEXT
160 BllIlRNO (-A)
110
FOR
N",I- TO
H
180 IF PEEK(N)=lNT<256*RNO(1) ) GOTD
190 PRINT
N~lNT<256.RNO(0»#PEEK<N)
200
NEXT
21121
PRINT"CHECK
OK"
22121 GOTO 122
OK
20121
f1ACHINE LANGUAGE TEST PROGRA..'I1
THE MACHINE LANGUAGE MEMORY TEST PRCX3RA.r-l
eN'
THE FOLLOWING PAGES IS ABSTRACTED
FROM THE VECTOR 1 MONITOR PRCGRAt."1, AND ASSEMBLED TO RUN IN THE LallEST 256 BYTES
OF HE.."10RY.
srARI'
EXECUTION AT ADDRESS OOOOH.
A
"*/1
WILL BE TYPED IF YOU HAVE
PROPERLY PATCHED THE I/O ROUTINES FOR YOUR SYSTEM.
PTCN
IS
THE
OUTPUT ROUTINE
FOR A 3P+S BOARD WITH STATUS INVERTED (OR MITS REV. 1 SIO).
RDCN IS THE INPUT
ROUTINE.
IF YOU ARE USING A BOARD WITH A PROGRAMMABLE USART, YOU WILL HAVE TO
INITIALIZE IT IN ADDITION
TO
CHANGING THE r-'ASK, JUMP CONDITION, AND FORT.
AFTER
"*",
TYPE IN FOUR HEX CHARACTERS FOR THE STARrING ADDRESS OF THE MEr10RY
BLOCK
'IO
BE TESTED
AL\ID
FOUR HEX CHARACTERS FOR THE ENDING ADDRESS OF THE BLOCK.
SPACE IS AUTOMATIC, AND IF YOU TYPE ANY CHARACTERS OTHER THAN 0-9, A-F THE
PRCGRAM
WILL
ro STRANGE THINGS.
A RESET
WILL
TERMINATE THE TEST.
THE PROGRAM
GENERATES A 2 16-1 BYTE PSEUDO-RANIX::M NUMBER SEQUENCE, WRITES A PORI'ION OF IT IN
THE BLOCK OF MEMORY AND THEN REGENERATES THE SEQUENCES FROM THE SAJ."1E POINT TO
COMPARE \-vITH WHAT IS READ FRCM MEMORY.
IF THE PASS IS CORRECT, A NEW PORI'ION OF
THE SEQUENCE IS WRITrEN INTO ME.."10RY.
ERRORS ARE PRINTED OUT WITH THE ADDRESS,
w11AT
WAS WRI'ITEN,
AND
WHAT
WAS READ.
USE
THE
ADDRESS LOCATIONS ON
THE
CQ.\1FONENT
PLACEMENT DIAGRAM
TO
LOCATE THE
BAD
ROW, AND THE INCORRECT BIT TO LOCATE THE
COLUMN.
AN OUTPtJr OF "FF"
~1E..lillS
NO MEMORY.
MORE THAN ONE BIT WRONG IS USUALLY
CAUSED BY CHIPS IN Bl\CKWARDS (WHICH roES
~
DESTROY THE MEMORY CHIPS, CONTRARY
TO TTL) OR A SOLDER BRIDGE.
BENT UNDER ADDRESS PINS CAUSE MANY ERRORS
TO
BE
PRINTED OOT IN CNE 1K BLOCK.
THE MOST DIFFICULT PROBLEM TO ISOLATE IS A SHORI' CIRCUITED ADDRESS LINE TO THE
MEMORY ARRAY.
THIS WILL USUALLY CAUSE ALL MEMORY LOCATIONS TO INDICATE ERROR
WITH ALL BITS BAD.
THE
SHORr CAN BE CAUSED BY A Sa..DER BRIDGE, AN ETCH BRIDGE
(ALTHOUGH EACH BOARD IS ELECTRICALLY TESTED FDR THIS), OR A DEFECTIVE CHIP.
IF
YOU CANNOT LOCATE THE PROBLEM VISUALL Y, REMOVE HALF OF
THE
RCWS OF CHIPS AND
TEST WITH A SMALLER" BLOCK LENGTH.
REPEAT THIS UNTIL ALL CHIPS
~_VE
BEEN
ELIMINATED AS TROUBLE MAKERS.
THEN TEST BE'IWEEN MEMORY SOCKET PINS USING A LOil
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