Sharp LC-26GA4D Service Manual page 54

LC-26GA4D
LC-26GA4U
CPU BLOCK DIAGRAM-2/2
H
G
F
E
D
C
B
A
1 2
(N0546FJ)
:Power
Slow Bus
(A948WJ)
:CPLD
3 4 5
1.9V
(N0060CE)
:DebugPORT
TCK, TMS, N_TRST,
TDI, TDO,N_ASEMDO,
N_ASEBRKAK,N_RESETP
12.288MHz
(CA045WJ)
:CLK-Gen
PLL
(PST6001M)
:Reset IC
(N0056CE)
:PROGRAMPORT
N_CS_FLASH0,
N_CS_FLASH1
N_RESET_FLASH
FL_VPP0
N_RD_CPLD,
N_WE0_CPLD
N_RESETP
CBOOT, N_EXT_BOOTS, MAIN_INT[0-1]
N_MAIN_RST
N_MAIN_CE[0-1]
N_CS_I2CA,N_CS_I2CB, N_RESET_I2CA,N_RESET_I2CB
N_RESET_SD,N_CS_SD
N_SD_INT
6 7
54
(N0567FJ)
:PC IF to TMDS
IRQ
H-UDI
EXTAL (A817WJ)
:SH-7706 CPU
XTAL
(LHF64AF3)
:FLASH 8MB
8 9
(VHHT
:The
(MLC157DT,7
(7W
:SW
UART
Slow Bus
(A985W
(A985
:SDRAM 3
:SDRAM
10