Aeroflex Gaisler RT-SPW-ROUTER User Manual
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Aeroflex Gaisler RT-SPW-ROUTER User Manual

Radiation-tolerant 10x spacewire router radiation tolerant 6x spacewire router with pci
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GAISLER
Features
• SpaceWire Router compliant
with ECSS-E-ST-50-12C
• Non-blocking switch-matrix
connecting any input to any output
• Packet Distribution
• Group Adaptive Routing
• Path, Logical and Regional Logical addressing
• Two priority levels for output port arbitration
• Configuration port using RMAP, compliant with
ECSS-E-ST-50-52C
• 8x SpaceWire ports, full duplex, on-chip or off-
chip LVDS transceivers
• 2x external FIFO ports, 9-bit wide data paths
• Possible to cascade two routers without glue
logic via the FIFO ports
• 2x internal AMBA ports with DMA and RMAP
• PCI Initiator/Target interface, 32-bit, 33 MHz
• System-time distribution via all ports
• Timers on all ports to prevent deadlock
• Fault-tolerant design
Copyright Aeroflex Gaisler AB
Radiation-Tolerant 10x SpaceWire Router
Radiation Tolerant 6x SpaceWire Router with PCI
Data Sheet and User's Manual
Description
The Radiation-Tolerant SpaceWire
Router family is available as standard
components using the Actel RTAX and
RT ProASIC3 FPGAs. The fault
tolerant design of the router in
combination with the radiation tolerant
FPGA makes it ideally suited for space
and other high-rel applications.
Specification
• CCGA484, CQFP352, CCGA624
• Total Ionizing Dose (TID)
to 300 krad (Si, functional)
• Single-Event Latch-Up Immunity
(SEL) to LET
• Immune to Single-Event Upsets
(SEU) to LET
• 1.2-1.5V, 2.5V & 3.3V supply,
500 mW consumption (TBD)
• Up to 200 MBPS on SpaceWire links
Applications
The router implements a routing switch
as defined in the ECSS-E-ST-50-12C
SpaceWire links, nodes, routers and
networks standard, supporting all
mandatory and optional features.
The router implements up to ten external
routing ports and the mandatory
configuration port.
The configuration port provides access
to configuration and status registers, and
the routing table using the Remote
Memory Access Protocol (RMAP) as
defined in the ECSS-E-ST-50-52C
protocol standard.
The router also fully supports the
ECSS-E-ST-50-51C SpaceWire
protocol identification standard.
An optional PCI Initiator/Target
interface is available.
RT-SPW-ROUTER
2
> 117 MeV-cm
/mg
TH
2
> 37 MeV-cm
/mg
TH
June 2012, Version 1.2

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Summary of Contents for Aeroflex Gaisler RT-SPW-ROUTER

  • Page 1 Radiation-Tolerant 10x SpaceWire Router Radiation Tolerant 6x SpaceWire Router with PCI RT-SPW-ROUTER Data Sheet and User’s Manual GAISLER Features Description • SpaceWire Router compliant The Radiation-Tolerant SpaceWire with ECSS-E-ST-50-12C Router family is available as standard • Non-blocking switch-matrix components using the Actel RTAX and connecting any input to any output RT ProASIC3 FPGAs.

  • Page 2: Table Of Contents

    AEROFLEX GAISLER RT-SPW-ROUTER Table of contents Introduction..........................5 Overview ..............................5 Standard configurations ........................... 5 Signal overview ............................6 Architecture..........................7 Cores................................ 7 Interrupts ..............................7 Memory map ............................8 Plug & play information.......................... 8 Specifications............................9 Signals ..............................10 SpaceWire router........................
  • Page 3 AEROFLEX GAISLER RT-SPW-ROUTER Signal definitions and reset values ......................56 Timing ..............................58 SpaceWire encoder-decoder....................60 Overview ............................... 60 Operation ............................... 60 4.2.1 Overview ..........................60 4.2.2 Link-interface FSM......................... 60 4.2.3 Transmitter ..........................61 4.2.4 Receiver........................... 61 4.2.5 Time interface ......................... 62 Receiver interface ..........................
  • Page 4 AEROFLEX GAISLER RT-SPW-ROUTER Signal definitions and reset values ......................79 Timing ..............................79 Clock generation ........................80 Overview ............................... 80 Signal definitions and reset values ......................80 Timing ..............................80 Reset generation........................81 10.1 Overview ............................... 81 10.2 Signal definitions and reset values ......................81 10.3...

  • Page 5: Introduction

    AEROFLEX GAISLER RT-SPW-ROUTER Introduction Overview The SpaceWire Router family is based on a common architecture from which standard configurations are derived. The architecture is centered around the a non-blocking switch matrix which can connect any input port to any output port.

  • Page 6: Signal Overview

    AEROFLEX GAISLER RT-SPW-ROUTER Signal overview Clock & Reset resetn UART Debug Link dsurx dsutx dsutck dsutdo dsutms JTAG Debug Link dsutdi rxclk SpaceWire Links txclk spw_txdp[] spw_rxdp[] spw_rxdn[] spw_txdn[] spw_txsp[] spw_rxsp[] spw_rxsn[] spw_txsn[] Time-Code Interfaces timecodeen tickin[] tickout[] timein0[] timeout0[]...

  • Page 7: Architecture

    AEROFLEX GAISLER RT-SPW-ROUTER Architecture Cores The common architecture of the SpaceWire router family is based on cores from the GRLIB IP library. The vendor and device identifiers for each core can be extracted from the plug & play infor- mation. The used IP cores are listed in table 2.

  • Page 8: Memory Map

    AEROFLEX GAISLER RT-SPW-ROUTER Memory map The SpaceWire router family uses the same memory map for all standard configurations. The memory map shown in table 4 is based on the AMBA AHB address space. Access to addresses outside the ranges will return an AHB error response. The detailed register layout is defined in the description of each individual core.

  • Page 9: Specifications

    AEROFLEX GAISLER RT-SPW-ROUTER The plug & play memory map and bus indexes for AMBA AHB slaves are shown in table 7 and is based on the AMBA AHB address space. Table 7. Plug & play information for AHB slaves Core...

  • Page 10: Signals

    AEROFLEX GAISLER RT-SPW-ROUTER Signals The common architecture has the external signals shown in table 10. Table 10. External signals Name Usage Direction Polarity CID Main system clock resetn System reset dsutx Debug UART transmit data dsurx Debug UART receive data...
  • Page 11 AEROFLEX GAISLER RT-SPW-ROUTER Table 10. External signals Name Usage Direction Polarity CID txafull[1:0] Transmitter almost full signal for FIFO interfaces High rxcharav[1:0] Receiver data available signal for FIFO interfaces High rxaempty[1:0] Receiver empty signal for FIFO interfaces High enbridge[1:0] Enables bridge mode for the FIFO interfaces...

  • Page 12: Spacewire Router

    AEROFLEX GAISLER RT-SPW-ROUTER SpaceWire router Overview The SpaceWire router core implements a SpaceWire routing switch as defined in the ECSS-E-ST-50- 12C standard. It provides an RMAP target for configuration at port 0 used for accessing internal con- figuration and status registers. In addition to this there are three different external port types: SpaceWire links, FIFO interfaces and AMBA interfaces.

  • Page 13: Output Port Arbitration

    AEROFLEX GAISLER RT-SPW-ROUTER Since the latency for the lookup is very small and deterministic there is not much to gain by having configurable priorities for this. Priorities are instead used for arbitrating packets contending for an output port as described in the next section.

  • Page 14: Packet Distribution

    AEROFLEX GAISLER RT-SPW-ROUTER available means that no other packet transmission is active at the moment and also for SpaceWire links that the link is in run-state. For path addresses the bit corresponding to the path address will always be set. This is done as specified in the standard which requires a packet with a path address to be transmitted on the port with the same number as the address.
  • Page 15 AEROFLEX GAISLER RT-SPW-ROUTER In group adaptive routing mode the packet will be spilt if no characters have been transmitted for the timeout period after being assigned to a port. For packet distribution a packet will be spilt if no char- acter has been transmitted for the timeout period after being assigned to all the ports.

  • Page 16: On-Chip Memories

    AEROFLEX GAISLER RT-SPW-ROUTER 3.2.7.7 Timer enabled and packet distribution enabled, ports running but busy If at least one port is busy but all are running when packet distribution is enabled the packet will wait indefinitely. When the transmission has started the timer is restarted each time a character is transmit- ted and if the timer expires the remaining part of the packet is spilt and an EEP written to all the desti- nation ports.

  • Page 17: System Time-Distribution

    AEROFLEX GAISLER RT-SPW-ROUTER The scrubber starts at address 0 and simultaneously writes one location in the port setup memory and the routing table memory. It then waits for a timeout period until it writes the next word. Eventually the last location is reached and the process starts over from address 0.

  • Page 18: Spacewire Ports

    AEROFLEX GAISLER RT-SPW-ROUTER can be disabled by setting the self addressing enable (SA) bit in the router configuration/status register to 0. The reset value of this bit is set using a signal. This also applies to group adaptive routing and packet distribution. When group adaptive routing is enabled for an address a packet with that destination address will be spilt due to self-addressing only if the packet is actually routed to the source port.

  • Page 19: Receiver

    AEROFLEX GAISLER RT-SPW-ROUTER txcharcnt txwrite txfull txchar Figure 2. Transmitter FIFO interface write cycle. Txwrite is the write signal and each time when asserted on the rising edge of the clock the value on the txchar signal will be written into the transmitter FIFO if it is not full. If it is full the character will be dropped.

  • Page 20: Time-Code Receive

    AEROFLEX GAISLER RT-SPW-ROUTER tickin timein Figure 4. Time interface tickin operation. 3.4.4 Time-code receive The time-code receive interface consists of the following signals: tickout, timeout. Figure 5 illustrates the tickout operation. tickout timeout Figure 5. Time interface tickout operation. The clock that all the interface signals are synchronized to is the same as the core clock (the clock that everything except the SpaceWire links’...

  • Page 21: Amba Ports

    AEROFLEX GAISLER RT-SPW-ROUTER Table 11. Signal mappings of FIFO port in bridge mode. Port 0 Port 1 rxchar txchar rxread txfull txwrite rxcharav txchar rxchar txfull rxread rxcharav txwrite tickin tickout timein timeout tickout tickin timeout timein AMBA ports The AMBA ports consists of what is basically a GRSPW2 core with the SpaceWire codec removed.
  • Page 22 AEROFLEX GAISLER RT-SPW-ROUTER The AMBA interface is divided into the AHB master interface and the APB interface. The DMA engines have FIFO interfaces to the router switch matrix. These FIFOs are used to transfer N-Chars between the AMBA bus and the other ports in the router.

  • Page 23: Receiver Dma Channels

    AEROFLEX GAISLER RT-SPW-ROUTER Received Time-codes are stored to the same time-ctrl and time-counter registers which are used for transmission. The timerxen bit in the control register is used for enabling time-code reception. No time-codes will be received if this bit is zero.
  • Page 24 AEROFLEX GAISLER RT-SPW-ROUTER If an RMAP command is received it is only handled by the target if the default address register (including mask) matches the received address. Otherwise the packet will be stored to a DMA channel if one or more of them has a matching address. If the address does not match neither the default address nor one of the DMA channels’...
  • Page 25 AEROFLEX GAISLER RT-SPW-ROUTER Start Reception Receive 2 bytes rmap enabled pid =1 and defaddr*!defmask = rxaddr*!defmask Receive 1 byte Set DMA channel RMAP command number to 0 Increment channel number Channel enabled Last DMA channel Separate addressing RMAP enabled dma(n).addr* !dma(n).mask=...
  • Page 26 AEROFLEX GAISLER RT-SPW-ROUTER 3.5.3.2 Basic functionality of a channel Reception is based on descriptors located in a consecutive area in memory that hold pointers to buff- ers where packets should be stored. When a packet arrives at the port the channel which should receive it is first determined as described in the previous section.
  • Page 27 AEROFLEX GAISLER RT-SPW-ROUTER descriptors are added they must always be placed after the previous one written to the area. Otherwise they will not be noticed. A descriptor is enabled by setting the address pointer to point at a location where data can be stored and then setting the enable bit.
  • Page 28 AEROFLEX GAISLER RT-SPW-ROUTER using the DMA channel each time descriptors are enabled as mentioned above. If the rxdescav bit is ‘0’ and the nospill bit is ‘0’ the packets will be discarded. If nospill is one the grspw waits until rxdes- cav is set and the characters are kept in the N-Char fifo during this time.

  • Page 29: Transmitter Dma Channels

    AEROFLEX GAISLER RT-SPW-ROUTER 3.5.3.10 Promiscuous mode The port supports a promiscuous mode where all the data received is stored to the first DMA channel enabled regardless of the node address and possible early EOPs/EEPs. This means that all non-eop/ eep N-Chars received will be stored to the DMA channel. The rxmaxlength register is still checked and packets exceeding this size will be truncated.
  • Page 30 AEROFLEX GAISLER RT-SPW-ROUTER The HC bit should be set if RMAP CRC should be calculated and inserted for the header field and correspondingly the DC bit should be set for the data field. The header CRC will be calculated from the data fetched from the header pointer and the data CRC is generated from data fetched from the data pointer.
  • Page 31 AEROFLEX GAISLER RT-SPW-ROUTER Table 16. TXDMA transmit descriptor word 2 (address offset 0x8) 24 23 RESERVED DATALEN 31: 24 RESERVED 23: 0 Data length (DATALEN) - Length of data part of packet. If set to zero, no data will be sent. If both data- and header-lengths are set to zero no packet will be sent.

  • Page 32: Rmap Target

    AEROFLEX GAISLER RT-SPW-ROUTER 3.5.4.7.2 AHB error When an AHB error is encountered during transmission the currently active DMA channel is disabled and the transmitter goes to the idle mode. A bit in the DMA channel’s control/status register is set to indicate this error condition and, if enabled, an interrupt will also be generated.
  • Page 33 AEROFLEX GAISLER RT-SPW-ROUTER There is a user accessible destination key register which is compared to destination key field in incom- ing packets. If there is a mismatch and a reply has been requested the error code in the reply is set to 3.

  • Page 34: Amba Interface

    AEROFLEX GAISLER RT-SPW-ROUTER 3.5.5.4 Read commands Read commands are performed on the fly when the reply is sent. Thus if an AHB error occurs the packet will be truncated and ended with an EEP. There are no restrictions for incrementing reads but non-incrementing reads have the same alignment restrictions as non-verified writes.
  • Page 35 AEROFLEX GAISLER RT-SPW-ROUTER Table 19. AMBA port hardware RMAP handling of different packet type and command fields. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Command Action Verify data Command Write / before Acknow- Increment Reserved...
  • Page 36 AEROFLEX GAISLER RT-SPW-ROUTER Table 19. AMBA port hardware RMAP handling of different packet type and command fields. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Command Action Verify data Command Write / before Acknow- Increment Reserved...

  • Page 37: Registers

    AEROFLEX GAISLER RT-SPW-ROUTER 3.5.6.1 APB slave interface As mentioned above, the APB interface provides access to the user registers which are 32-bits in width. The accesses to this interface are required to be aligned word accesses. The result is undefined if this restriction is violated.
  • Page 38 AEROFLEX GAISLER RT-SPW-ROUTER Table 20. AMBA port registers APB address offset Register Control Status/Interrupt-source Default address Reserved 0x10 Destination key 0x14 Time 0x20 DMA channel 1 control/status 0x24 DMA channel 1 rx maximum length 0x28 DMA channel 1 transmit descriptor table address.
  • Page 39 AEROFLEX GAISLER RT-SPW-ROUTER Table 21. AMBA port control register 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 RA RX RC RESERVED RD RE RESERVED TR TT...
  • Page 40 AEROFLEX GAISLER RT-SPW-ROUTER Table 23. AMBA port default address register 16 15 RESERVED DEFMASK DEFADDR 0x00 0xFE 31: 8 RESERVED 15: 8 Default mask (DEFMASK) - Default mask used for node identification on the SpaceWire network. This field is used for masking the address before comparison. Both the received address and the DEFADDR field are anded with the inverse of DEFMASK before the address check.
  • Page 41 AEROFLEX GAISLER RT-SPW-ROUTER Table 26. AMBA port dma control register 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 RESERVED SP SA EN NS RD RX AT RA TA PR PS AI RI TI RE TE...
  • Page 42 AEROFLEX GAISLER RT-SPW-ROUTER Table 28. AMBA port transmitter descriptor table address register. DESCBASEADDR DESCSEL RESERVED 31: 10 Descriptor table base address (DESCBASEADDR) - Sets the base address of the descriptor table. 9: 4 Descriptor selector (DESCSEL) - Offset into the descriptor table. Shows which descriptor is cur- rently used by the GRSPW.

  • Page 43: Configuration Port

    AEROFLEX GAISLER RT-SPW-ROUTER Configuration port The configuration port uses the RMAP protocol (ECSS-E-ST-50-52C). Verified writes, reads and read-modify-writes all of length 4 bytes are supported (8B for RMW if the mask field is included in the count). Replies sent from the configuration port are always replied to the port they arrived from regardless of the source address.

  • Page 44: Write Commands

    AEROFLEX GAISLER RT-SPW-ROUTER Table 31. The order of error detection in case of multiple errors in the configuration port RMAP target. The error detected first has number 1. Detection Order Error Code Error Invalid destination logical address Unused RMAP packet type or command code...
  • Page 45 AEROFLEX GAISLER RT-SPW-ROUTER Table 32. RMAP command support by the configuration port. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Packet type Action Verify data Command Write / before Acknow- Increment Reserved / Response Read write...
  • Page 46 AEROFLEX GAISLER RT-SPW-ROUTER Table 32. RMAP command support by the configuration port. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Packet type Action Verify data Command Write / before Acknow- Increment Reserved / Response Read write...
  • Page 47 AEROFLEX GAISLER RT-SPW-ROUTER Table 32. RMAP command support by the configuration port. Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Packet type Action Verify data Command Write / before Acknow- Increment Reserved / Response Read write...

  • Page 48: Registers

    AEROFLEX GAISLER RT-SPW-ROUTER Registers The registers listed here are accessed through the RMAP target and the addresses specified shall be set in the address field of the RMAP command. They can also be accessed through AHB if the AHB slave is available.
  • Page 49 AEROFLEX GAISLER RT-SPW-ROUTER Table 35. GRSPWROUTER registers RMAP address Register RESERVED 0x4-0x7C Port setup for ports 1-31 0x80-0x3FC Port setup for logical addresses 32-255 0x400-0x47C RESERVED 0x480-0x7FC Routing table entry for logical addresses 32-255 0x800-0x87C Port 0-31 control 0x880-0x8FC Port 0-31 status...
  • Page 50 AEROFLEX GAISLER RT-SPW-ROUTER Table 37. Routing table entry RESERVED EN PR HD NR NR NR 31: 3 RESERVED Enable (EN) - Enables routing table entry. If enabled the corresponding logical address can be used to route packets, otherwise an invalid address error will be generated and the packet is discarded. Note that the corresponding port setup register must not be set to 0 when a routing table entry is enabled.
  • Page 51 AEROFLEX GAISLER RT-SPW-ROUTER Table 39. Port control 24 23 15 14 13 12 11 10 RESERVED ET NP PS BE DI TR PR TF RS TE RE CE AS LS LD 1 NA 1 31: 24 Run-state clock divisor (RD) - Clock divisor value used for this link when in the run-state. Only avail- able for SpW ports, reads as 0 otherwise.
  • Page 52 AEROFLEX GAISLER RT-SPW-ROUTER Table 40. Port status configuration port (port 0) 25 24 23 20 19 18 17 12 11 RESERVED ERRCODE RE TS RESERVED RESERVED NA 0 00000 31: 25 RESERVED Clear error code (CE) - Write with a 1 to clear the ERRCODE field.
  • Page 53 AEROFLEX GAISLER RT-SPW-ROUTER Table 42. Timer reload RESERVED RELOAD 31: 10 RESERVED 9: 0 Timer reload (RELOAD) - Port specific timer reload value. This timer runs on the prescaler generated tick and determines the timeout period for the port it is associated with. The timeout period will be between reload and reload+1 prescaler ticks.
  • Page 54 AEROFLEX GAISLER RT-SPW-ROUTER Table 44. Time-code RESERVED RE EN TIMECNT 31: 10 RESERVED Reset time-code (RE) - Resets the control flags and time counters to 0 when written with a 1. Always reads as 0. Enable time-codes (EN) - Enable time-codes to propagate and update the counter and control flags.
  • Page 55 AEROFLEX GAISLER RT-SPW-ROUTER Table 47. Configuration write enable RESERVED 31: 1 RESERVED Configuration write enable (WE) - When set to 1 write accesses to the configuration area are allowed. When set to 0 writes are not allowed except to this register. Write or RMW commands will be replied with an authorization error if a reply was requested.

  • Page 56: Signal Definitions And Reset Values

    AEROFLEX GAISLER RT-SPW-ROUTER Signal definitions and reset values The signals and their reset values are described in table 49. Table 49. Signal definitions and reset values Signal name Type Function Active Reset value spw_clk Input Transmitter default run-state clock Rising edge...
  • Page 57 AEROFLEX GAISLER RT-SPW-ROUTER Table 49. Signal definitions and reset values Signal name Type Function Active Reset value linkrun[ ] Output High Logical 0 SpaceWire link in run state when asserted gerror Output Global error High Logical 0 reload_ps[ ] Input Reset value for the timer prescaler.

  • Page 58: Timing

    AEROFLEX GAISLER RT-SPW-ROUTER Timing The timing waveforms are shown in figure 9 and 10. Timing parameters are defined in table 50 and SPW0 txclk spw_txd, spw_txdp/n SPW1 SPW1 spw_txs, spw_txsp/n spw_rxd, spw_rxdp/n SPW2 SPW3 spw_rxs, spw_rxsp/n SPW4 SPW4 spw_txd, spw_txdp/n...
  • Page 59 AEROFLEX GAISLER RT-SPW-ROUTER SPWFIFO0 SPWFIFO1 rxread[] rxcharav[], SPWFIFO2 rxaempty[], tickout[] rxchar[], timeout[] (output) SPWFIFO3 SPWFIFO4 txfull[], txafull[] SPWFIFO5 SPWFIFO6 txchar[], timein[] (input) SPWFIFO8 SPWFIFO7 txwrite[], tickin[] - FIFO interface Figure 10. Timing waveforms Table 51. Timing parameters - FIFO interface...

  • Page 60: Spacewire Encoder-Decoder

    AEROFLEX GAISLER RT-SPW-ROUTER SpaceWire encoder-decoder Overview The SpaceWire encoder-decoder implements an encoder-decoder compliant to the SpaceWire stan- dard (ECSS-E-ST-50-12C). It provides a generic host-interface consisting of control signals, status signals, time-code interface and 9-bit wide data buses connecting to a pair of FIFOs.

  • Page 61: Transmitter

    AEROFLEX GAISLER RT-SPW-ROUTER reaching the started state or forces it to the error-reset state. When the link is not disabled, the link interface FSM is allowed to enter the started state when either the link start signal is asserted or when a NULL character has been received and the autostart signal is asserted.

  • Page 62: Time Interface

    AEROFLEX GAISLER RT-SPW-ROUTER the link interface to enter the error-reset state. Disconnections are handled in the link-interface part in the tx clock domain because no receiver clock is available when disconnected. Received characters are flagged to the host domain and the data is presented in parallel form. L-Chars are the handled automatically by the host domain link-interface part while all N-Chars are stored in the receiver FIFO for further handling.

  • Page 63: Receiver Interface

    AEROFLEX GAISLER RT-SPW-ROUTER timeout timectrlout tickout Figure 15. Receiving time-codes using tickout, timeout and timectrlout. Receiver interface The receiver interface consists of the following signals connected to the receiver FIFO: rxicharav, rxi- charcnt, rxichar, rxiread. Rxicharav is asserted when there are one or more characters available in the receiver FIFO while rxicharcnt shows the actual number available.

  • Page 64: Link Errors

    AEROFLEX GAISLER RT-SPW-ROUTER new characters should be written to the FIFO the same or the following cycle that txiflush is asserted. Figure 17 shows an example of writing characters to the transmitter FIFO. txichar txicharcnt txifull txiwrite Figure 17. Transmitting characters through the FIFO interface.

  • Page 65: Pci Initiator/Target

    AEROFLEX GAISLER RT-SPW-ROUTER PCI Initiator/Target Overview This core provides a complete interface to an external PCI bus, with both initiator and target func- tions. The PCI initiator has PCI system host capability. The interface is based on the Actel CorePCIF IP and provides an AMBA bus backend.

  • Page 66: Pci Target

    AEROFLEX GAISLER RT-SPW-ROUTER PCI address are set by mapping registers, while the least significant bits are directly transferred from the AMBA backend. A separate mapping register is implemented for each AMBA master. To generate PCI memory accesses, the following steps must be executed. The master function must be enabled, preferably by the PCI system host during the PCI configuration and the mapping register...

  • Page 67: Byte Access

    AEROFLEX GAISLER RT-SPW-ROUTER address mapping registers are accessible via the AMBA APB interface. These registers must be setup to translate the access to the AMBA AHB slave interface into the correct PCI address. 5.2.4 Byte access Single byte accesses are supported by the interface. The byte is directly transferred between the two buses (i.e.

  • Page 68: Registers

    AEROFLEX GAISLER RT-SPW-ROUTER Registers The core is programmed via registers mapped into the APB address space and into PCI BAR 0. Table 52. PCIF: APB registers APB address offset Register 0x00 PCI to AMBA mapping for PCI BAR 1 0x04...
  • Page 69 AEROFLEX GAISLER RT-SPW-ROUTER Table 56. PCIF: Status register RESERVED M/T Abort RESERVED Host 31 : 30 RESERVED 29 : 28 Master and Target abort status from PCI configuration space 27 : 1 RESERVED System host (’1’ = in peripheral slot) Table 57.
  • Page 70 AEROFLEX GAISLER RT-SPW-ROUTER Table 61. PCIF: Interrupt status/ack register RESERVED Status 31 : 4 RESERVED 3 : 0 Interrupt status Table 62. PCIF: Interrupt clear register RESERVED IC[15:1] 31 : 16 RESERVED 15 : 1 Interrupt clear n (IC[n]): Writing ‘1’ to IC[n] will clear interrupt n RESERVED Table 63.

  • Page 71: Signal Definitions And Reset Values

    AEROFLEX GAISLER RT-SPW-ROUTER Signal definitions and reset values The signals and their reset values are described in table 64. Table 64. Signal definitions and reset values Signal name Type Function Active Reset value pci_clk Input PCI clock pci_rst Input Reset...

  • Page 72: Timing

    AEROFLEX GAISLER RT-SPW-ROUTER Timing The timing waveforms and timing parameters are shown in figure 21 and are defined in table 65. pci_clk pci_ad[ ], pci_cbe[ ], pci_frame, pci_irdy, PCIFT0 PCIFT0 pci_trdy, pci_stop, pci_idsel, pci_devsel, pci_perr, pci_serr, pci_par, pci_int pci_ad[ ], pci_cbe[ ],...

  • Page 73: Status Registers

    AEROFLEX GAISLER RT-SPW-ROUTER Status Registers Overview The status registers store information about AMBA AHB accesses triggering an error response. There is a status register and a failing address register capturing the control and address signal values of a failing AMBA bus transaction, or the occurrence of a correctable error being signaled from a fault tol- erant core.
  • Page 74 AEROFLEX GAISLER RT-SPW-ROUTER Table 67. AHB Status register RESERVED CE NE HWRITE HMASTER HSIZE 31: 10 RESERVED CE: Correctable Error. Set if the detected error was caused by a single error and zero otherwise. NE: New Error. Deasserted at start-up and after reset. Asserted when an error is detected. Reset by writing a zero to it.

  • Page 75: Serial Debug Interface

    AEROFLEX GAISLER RT-SPW-ROUTER Serial Debug Interface Overview The interface consists of a UART connected to the AMBA AHB bus as a master. A simple communi- cation protocol is supported to transmit access parameters and data. Through the communication link, a read or write transfer can be generated to any address on the AMBA AHB bus.

  • Page 76: Baud Rate Generation

    AEROFLEX GAISLER RT-SPW-ROUTER Block transfers can be performed be setting the length field to n-1, where n denotes the number of transferred words. For write accesses, the control byte and address is sent once, followed by the num- ber of data words to be written. The address is automatically incremented after each data word. For read accesses, the control byte and address is sent once and the corresponding number of data words is returned.

  • Page 77: Signal Definitions And Reset Values

    AEROFLEX GAISLER RT-SPW-ROUTER Transmitter hold register empty (TH) - indicates that the transmitter hold register is empty. Read only. Reset value: ‘1’. Break (BR) - indicates that a BREAKE has been received. Reset value: ‘0’. Overrun (OV) - indicates that one or more character have been lost due to overrun. Reset value: ‘0’.

  • Page 78: Jtag Debug Interface

    AEROFLEX GAISLER RT-SPW-ROUTER JTAG Debug Interface Overview The JTAG debug interface provides access to on-chip AMBA AHB bus through JTAG. The JTAG debug interface implements a simple protocol which translates JTAG instructions to AHB transfers. Through this link, a read or write transfer can be generated to any address on the AHB bus.

  • Page 79: Registers

    AEROFLEX GAISLER RT-SPW-ROUTER Table 73. JTAG debug link Data register AHB DATA Sequential transfer (SEQ) - If ‘1’ is shifted in this bit position when read data is shifted out or write data shifted in, the subsequent transfer will be to next word address.

  • Page 80: Clock Generation

    AEROFLEX GAISLER RT-SPW-ROUTER Clock generation Overview The clock generator implements internal clock generation and buffering. Signal definitions and reset values The signals and their reset values are described in table 76. Table 76. Signal definitions and reset values Signal name...

  • Page 81: Reset Generation

    AEROFLEX GAISLER RT-SPW-ROUTER Reset generation 10.1 Overview The reset generator implements input reset signal synchronization with glitch filtering and generates the internal reset signal. The input reset signal can be asynchronous. 10.2 Signal definitions and reset values The signals and their reset values are described in table 78.

  • Page 82: Amba Ahb Controller With Plug&Play Support

    AEROFLEX GAISLER RT-SPW-ROUTER AMBA AHB controller with plug&play support 11.1 Overview The AMBA AHB controller is a combined AHB arbiter, bus multiplexer and slave decoder according to the AMBA 2.0 standard. MASTER MASTER AHBCTRL ARBITER/ DECODER SLAVE SLAVE Figure 33. AHB controller block diagram 11.2...

  • Page 83: Registers

    AEROFLEX GAISLER RT-SPW-ROUTER 24 23 12 11 10 9 VENDOR ID DEVICE ID VERSION Identification Register USER-DEFINED USER-DEFINED USER-DEFINED BAR0 HADDR ADDR MASK MASK TYPE TYPE BAR1 ADDR MASK TYPE Bank Address Registers BAR2 ADDR MASK TYPE BAR3 ADDR MASK...

  • Page 84: Amba Ahb/Apb Bridge With Plug&Play Support

    AEROFLEX GAISLER RT-SPW-ROUTER AMBA AHB/APB bridge with plug&play support 12.1 Overview The AMBA AHB/APB bridge is a APB bus master according the AMBA 2.0 standard. AHB BUS AHB/APB Bridge APBO[0] APB SLAVE AHBSI APBO[n] AHB Slave APB SLAVE Interface AHBSO[n] •••...

  • Page 85: Electrical Description

    AEROFLEX GAISLER RT-SPW-ROUTER Electrical description 13.1 Absolute maximum ratings According to Actel data sheet [RTAX] and [RT3PE]. 13.2 Operating conditions According to Actel data sheet [RTAX] and [RT3PE]. 13.3 Input voltages, leakage currents and capacitances According to Actel data sheet [RTAX] and [RT3PE].

  • Page 86: Mechanical Description

    AEROFLEX GAISLER RT-SPW-ROUTER Mechanical description 14.1 Component and package All configurations are implemented in the ACTEL RTAX2000S/SL or RT3PE3000L FPGAs. Config- uration 1 is provided in either CQ352 or CG624 package, or CG484 package, as per Actel data sheets [RTAX], [RT3PE] and [PACK]. Configuration 2 is only available in CQ352 or CG624 package.
  • Page 87 AEROFLEX GAISLER RT-SPW-ROUTER Table 80. Pin assignment Load Pol- Name CG484 CQ352 CG624 Level Volt. Slew Drive [pF] Pull arity Note spw_txsn[1] LVDS spw_rxdp[2] LVDS High SpaceWire data spw_rxdn[2] LVDS spw_rxsp[2] LVDS High SpaceWire strobe spw_rxsn[2] LVDS spw_txdp[2] AA25 LVDS...
  • Page 88 AEROFLEX GAISLER RT-SPW-ROUTER Table 80. Pin assignment Load Pol- Name CG484 CQ352 CG624 Level Volt. Slew Drive [pF] Pull arity Note spw_txdp[6] LVDS High SpaceWire data spw_txdn[6] LVDS spw_txsp[6] LVDS High SpaceWire strobe spw_txsn[6] LVDS spw_rxdp[7] LVDS High SpaceWire data...
  • Page 89 AEROFLEX GAISLER RT-SPW-ROUTER Table 80. Pin assignment Load Pol- Name CG484 CQ352 CG624 Level Volt. Slew Drive [pF] Pull arity Note spw_rxs[6] LVTTL None High SpaceWire strobe spw_txd[6] LVTTL High 8 None High SpaceWire data spw_txs[6] LVTTL High 8 None High SpaceWire strobe...
  • Page 90 AEROFLEX GAISLER RT-SPW-ROUTER Table 80. Pin assignment Load Pol- Name CG484 CQ352 CG624 Level Volt. Slew Drive [pF] Pull arity Note timeout1[6] LVTTL High 8 None timeout1[7] LVTTL High 8 None Time output for FIFO 1, MSB rxcharav[0] LVTTL High 8...
  • Page 91 AEROFLEX GAISLER RT-SPW-ROUTER Table 80. Pin assignment Load Pol- Name CG484 CQ352 CG624 Level Volt. Slew Drive [pF] Pull arity Note txchar1[2] LVTTL None txchar1[3] LVTTL None txchar1[4] LVTTL None txchar1[5] LVTTL None txchar1[6] LVTTL None txchar1[7] LVTTL None txchar1[8]...
  • Page 92 AEROFLEX GAISLER RT-SPW-ROUTER Table 80. Pin assignment Load Pol- Name CG484 CQ352 CG624 Level Volt. Slew Drive [pF] Pull arity Note pci_clk PCI clock pci_rst PCI reset pci_frame inout pci_irdy inout pci_trdy inout pci_stop inout pci_idsel pci_devsel inout pci_par inout...
  • Page 93 AEROFLEX GAISLER RT-SPW-ROUTER Table 80. Pin assignment Load Pol- Name CG484 CQ352 CG624 Level Volt. Slew Drive [pF] Pull arity Note pci_ad[16] inout pci_ad[17] inout pci_ad[18] inout pci_ad[19] inout pci_ad[20] inout pci_ad[21] inout pci_ad[22] inout pci_ad[23] inout pci_ad[24] inout pci_ad[25]...

  • Page 94: Rtax2000S/Sl Specific Pins - Cq352 Package

    AEROFLEX GAISLER RT-SPW-ROUTER 14.3 RTAX2000S/SL specific pins - CQ352 package The Actel RTAX2000S/SL FPGA device has special pins that need to be correctly connected on the printed circuit board, as shown in table 81. Please refer to the Actel data sheet [RTAX] for details.

  • Page 95: Rtax2000S/Sl Specific Pins - Cg624 Package

    AEROFLEX GAISLER RT-SPW-ROUTER 14.4 RTAX2000S/SL specific pins - CG624 package The Actel RTAX2000S/SL FPGA device has special pins that need to be correctly connected on the printed circuit board, as shown in table 81. Please refer to the Actel data sheet [RTAX] for details.

  • Page 96: Rt3Pe3000L Specific Pins - Cg484 Package

    AEROFLEX GAISLER RT-SPW-ROUTER 14.5 RT3PE3000L specific pins - CG484 package The Actel RT3PE3000L FPGA device has special pins that need to be correctly connected on the printed circuit board, as shown in table 81. Please refer to the Actel data sheet [RT3PE] for details.

  • Page 97: Reference Documents

    AEROFLEX GAISLER RT-SPW-ROUTER Reference documents [AMBA] AMBA Specification, Rev 2.0, ARM IHI 0011A, 13 May 1999, Issue A, first release, ARM Limited [GRLIB] GRLIB IP Library User's Manual, Aeroflex Gaisler, www.aeroflex.com/gaisler [GRIP] GRLIB IP Core User's Manual, Aeroflex Gaisler, www.aeroflex.com/gaisler...

  • Page 98: Ordering Information

    AEROFLEX GAISLER RT-SPW-ROUTER Ordering information Ordering information is provided in table 84 and a legend is provided in table 85. Table 84. Ordering information Product CID Device SpaceWire Speed Package Lead Screening Interface Grade Type Count Level LVTTL LVDS STD -1...

  • Page 99: Change Record

    AEROFLEX GAISLER RT-SPW-ROUTER Change record Change record information is provided in table 86. Table 86. Change record Issue Date Sections Note 2012 June Clarified how timeout period is related to register value 2011 June Router configuration area memory map corrected 3.2.6...
  • Page 100 AEROFLEX GAISLER RT-SPW-ROUTER Information furnished by Aeroflex Gaisler AB is believed to be accurate and reliable. However, no responsibility is assumed by Aeroflex Gaisler AB for its use, nor for any infringements of patents or other rights of third parties which may result from its use.

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