Block Diagram - moteiv Telos User Manual

Ultra low power ieee 802.15.4 compliant wireless sensor module
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Block Diagram

32kHz
Oscillator
System
Clock
MCLK
CPU
16 bit
16 reg
multiply
Figure 6 : Block diagram of the TI MSP430 microcontroller and its connection to other peripherals
Moteiv Corporation
Flash
ACLK
RAM
SMCLK
DMA
Watchdog
Controller
Timer
3 Channels
15/16 bit
in the Telos module
Telos (Rev B) : PRELIMINARY Datasheet (12/5/2004)
Rev B (Low Power Wireless Sensor Module)
12-bit ADC
12-bit DAC
8 Channels
2 Channels
<10µs Conv
16-bit bus
Timer B
Timer A
7 CC reg
3 CC reg
CC2420 Radio
Interrupts & SPI
PC
UART via USB
I/O Port 1/2
I/O Port 3/4
16 I/Os
16 I/Os
Interrupts
Comparator
USART0
A
UART
SPI
I 2 C
Telos
I/O Port 5/6
8 I/Os
USART1
UART
SPI
Page 12 of 28

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