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Transtech Transputer User Manual

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Transputer
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Ref: TMB M 711

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Summary of Contents for Transtech Transputer

  • Page 1 Transputer Motherboard User Manual Ref: TMB M 711...
  • Page 2 Transtech Parallel Systems. Transtech reserves the right to alter specifications without notice, in line with its policy of continuous development. Transtech cannot accept responsibility to any third party for loss or damage arising out of the use of this information.

  • Page 3: Table Of Contents

    3.2 The Transputer Module ............18 3.2.1 Overview ..............18 3.2.2 Functional Description ..........18 3.2.3 Electrical Description ........... 21 3.3 The Transputer Module Motherboard ........21 3.3.1 Overview ..............21 3.3.2 Link Configuration ............22 3.3.3 System Control ............25 3.4 Host Computer Interface ............
  • Page 4 Chapter 5 The TMB04 Motherboard 5.1 Fitting TRAMs ................46 5.2 Fitting memory ...............46 5.3 Board Configuration Jumpers ..........47 5.3.1 On-board transputer clock and memory ......48 5.3.2 Control Configuration ...........49 5.3.3 Board IO Address ............50 5.3.4 Link Speed Configuration ..........51 5.3.5 Master and Slave Configuration ........52 5.3.6 IRQ &...
  • Page 5 Chapter 9 The TMB16 Motherboard 9.1 Overview ................115 9.2 Network Configuration ............116 9.2.1 Electronic Link Configuration ........117 9.2.2 The Link Patch Area ..........118 9.2.3 Summary of Network Configuration ......120 TMB M 711 Transputer Motherboard User Manual...
  • Page 6 10.5.1 Board Configuration ..........144 10.5.2 The Edge Connector ..........146 10.5.3 The Link Patch Area ..........148 10.6 Examples ................149 10.6.1 Stand-alone TMB17 ..........149 10.6.2 Multiple TMB17s ............150 Chapter 11 Utilities Software 11.1 PC Installation ..............153 Transputer Motherboard User Manual TMB M 711...
  • Page 7 11.5 Network test utilities ............159 11.5.1 Link Switch Configuration ........160 11.6 The Inmos server program ..........162 11.7 Transputer host I/O utilities ..........162 11.8 Inmos Aserver Support ............. 163 11.9 Solaris 2 Device Driver ............164 11.10 Reference Manual Pages ..........166 11.10.1 Commands ............
  • Page 8 Transputer Motherboard User Manual TMB M 711...

  • Page 9: Chapter 1 Introduction

    Introduction Chapter 1 Introduction This manual describes the Transtech transputer module (TRAM) motherboards. Chapter 2 gives an introduction to the concepts and nomenclature of transputer modules. All users should read this before attempting to configure a TRAM motherboard. Chapter 3 gives a detailed description of the TRAM standard for modules and motherboards.
  • Page 10 Introduction Chapter 12 provides a detailed trouble-shooting guide. Transputer Motherboard User Manual TMB M 711...

  • Page 11: Chapter 2 Using Transputer Modules

    IO function. 2.1.1 Hardware Description This section contains a description of the transputer hardware which allows users unfamiliar with TRAMs to understand the installation procedure described in the next section.
  • Page 12 Subsystem Pin 1 Pin 1 Figure 1. Transputer Modules Some TRAMs have a subsystem - this consists of three zero profile sockets mounted on the underside of the TRAM in one corner (always next to pin 1). Only slot 0 on the motherboard has the capacity to accept the subsystem from such a TRAM.
  • Page 13 Figure 3. TRAM slots on a motherboard The motherboard is specially wired so that if it is populated with size 1 TRAMs then the transputers are all connected in a pipeline. This is TMB M 711 Transputer Motherboard User Manual...
  • Page 14 Introducing TRAMs achieved by connecting link2 of one transputer to link1 of the next transputer. See figure 4. Slot0 Slot1 Slotn PipeTail PipeHead Figure 4. The Default Transputer Pipeline TRAMs which are larger than size 1 do not use all of the sites underneath them.

  • Page 15: Building A Computer From Trams

    2. Configure the motherboard reset structure for the software devel- opment system or application being used, 2.2.1 Physically building the System Transputer modules and motherboards contain components which can be damaged by static electricity. It is therefore advisable to take some simple precautions before handling TRAMs and module motherboards: •...

  • Page 16: Configuring The System

    The most important control signal sent to a TRAM is the reset signal. When a TRAM receives this signal, the transputer is reset to an initial state. Transputer Motherboard User Manual TMB M 711...
  • Page 17 Using Transputer Modules The transputer has to be in this state before a user program can be loaded onto it. There are two basic control architectures that are commonly used: • the host computer controls all of the processors in the system.

  • Page 18: A More Complex Example

    A More Complex Example 2.2.2.2 The Transputer Network The only thing to be done here is to put in pipe jumpers where they are needed. Some simple rules for determining when pipe jumpers are needed follow: 1. If a large TRAM (greater than size 1) is in the middle of your intended pipeline then the large TRAM will need its unused slots jumpering.

  • Page 19: Topology Aspects

    In order for the transputers to communicate their links must be connected together. In keeping with the pipeline connections made within a single motherboard, when several motherboards are wired up, all the transputers are connected into a single pipeline. TMB M 711 Transputer Motherboard User Manual...
  • Page 20 (slot n link 2) is called PipeTail . Hence you must connect the PipeTail of one board to the PipeHead of the next board. Because the PipeTail to PipeHead connection is actually a transputer link, the cable used to make this connection is a standard INMOS link cable.

  • Page 21: Network Configuration Aspects

    A subject which has not been discussed fully in this chapter is that of network configuration. This is the process of connecting up all the transputer links to meet the network topology demanded by the application. The previous section has dealt with the default pipeline, but what hasn’t been mentioned yet is how the user can connect up TRAM link...

  • Page 22: Summary

    0 of the first motherboard. Chapter 3 contains a full description of network configuration. 2.4 Summary This chapter has given a beginners overview of Transputer Modules and module motherboards. Users should understand how to construct single motherboard and multi motherboard computing systems from TRAMs.
  • Page 23 This is in keeping with a beginners introduction. For an explanation of the underlying system, read Chapter 3 which gives details of the TRAM standard and can be regarded as containing a conceptual model of TRAM equipment. TMB M 711 Transputer Motherboard User Manual...
  • Page 24 Summary Transputer Motherboard User Manual TMB M 711...

  • Page 25: Chapter 3 The Tram Standard

    In this sense, the transputer is very much a building block of large parallel computers. In keeping with the building block philosophy of transputers the Transputer Module (TRAM) standard was evolved so...

  • Page 26: The Transputer Module

    3.2 The Transputer Module 3.2.1 Overview A TRAM is a self contained computing subsystem. Physically it is small and will contain either a transputer or some other device which connects via INMOS links. TRAMs: • interface to each other via INMOS links •...
  • Page 27 Analyse Figure 18. Pinout of Size 1 TRAM (not to scale) The TRAM brings out all four of the transputer’s links for connection to other TRAMs. LinkSpeedA and LinkSpeedB control the operating speed of the transputer’s links. Asserting both of these pins high causes the links to operate at 20Mbits/sec, deasserting both these pins low causes the links to operate at 10Mbits/sec.
  • Page 28 TRAM and ensures that TRAMs fitted with subsystem pins are still plug compatible with TRAMs not fitted with subsystem pins. Details of how to program the subsystem port of a TRAM are contained in the next section. Transputer Motherboard User Manual TMB M 711...

  • Page 29: Electrical Description

    The TRAM Standard 3.2.3 Electrical Description The basic circuitry of a Transputer Module is shown in figure 20. transputer linksIn linksOut NotError Figure 20. Basic TRAM circuit An explanation of the features of this circuit follows: • Link inputs are protected from positive Electrostatic Discharge by the inclusion of a signal diode taken to the positive supply rail.

  • Page 30: Link Configuration

    (the first module requires a subsystem port) • an interface may be provided to allow non-transputer based host computers to control and communicate with the TRAMs on the motherboard. The remainder of this section discusses the above features in greater detail.
  • Page 31 64 link connections. 3.3.2.3 The Configuration Pipeline Each link switch is controlled by a 16 bit T2 transputer. Each T2 can control up to two link switches via its links 0 and 3 (figure 22).
  • Page 32 The other links are used to construct a pipeline of configuration transputers. This pipeline may extend across a number of boards to allow configuration to extend throughout a transputer system. Connection to other boards is achieved by edge connections ConfigUp and ConfigDown (figure 23) ConfigDown...

  • Page 33: System Control

    TRAM in a master network controls its own subnetwork of transputers. In order to control a transputer, only three signals are needed: a signal to reset the transputer, a signal to analyse (statically debug) the transputer and a signal from the transputer to indicate that an error has occurred.
  • Page 34 The subsystem signals are driven by a master. The master controls all downstream processors connected to these subsystem signals (i.e. a subnetwork). Normally there are two types of master in a transputer network: the host computer and modules fitted with subsystem ports. 3.3.3.1 Source of Control For control purposes the modules on a motherboard are divided into two groups: module0 and modules1 to n .
  • Page 35 Figure 26. Module motherboard Up, Down and Reset 3.3.3.3 Multi-board Control This section shows how the control ports are connected to map the subnetwork model of transputer networks onto a number of module motherboards. TMB M 711 Transputer Motherboard User Manual...
  • Page 36 The Transputer Module Motherboard The simplest relation between two motherboards is direct connection.Motherboards can be chained together by connecting the down port of one board to the up port of the next. In this case all the boards in the chain are controlled from the same source, i.e.
  • Page 37 3.3.3.4 Subsystem Registers When the source of control is a transputer module in site 0 of some motherboard then the transputer on that module has control of the subsystem via its subsystem pins. These pins are driven by subsystem registers on the TRAM which are in turn mapped into the transputer’s memory map.

  • Page 38: Host Computer Interface

    Most motherboards have an interface to a host computer. The host supplies file services and terminal IO to application programs running on the transputer network. Clearly the structure of the host interface is not generic - the remainder of this section discusses the standard PC interface for PC AT machines and clones.
  • Page 39 Reset register (write only) boardbase + #11 Analyse register (write only) boardbase + #10 Error register (read only) boardbase + #12 DMA request register boardbase + #13 Interrupt control register Table 2: IO Registers TMB M 711 Transputer Motherboard User Manual...

  • Page 40: Link Interface

    3.4.2 Link Interface The link interface employs an IMS C012 link adapter chip. This device converts between an 8 bit bidirectional port on one side and a transputer serial link on the other, see figure 28. PC IO Input data...

  • Page 41: System Control Interface

    Reading a ‘0’ from bit 0 indicates no Error. 3.4.4 Interrupts and DMA Two other registers are provided on Transtech’s range of motherboards are not part of the basic “B004” interface. The two other registers provide support for allowing DMA access to the link hardware.

  • Page 42: Dma & Interrupt Channels

    The interrupt is generated about two seconds after the last disk access. Any software using this interrupt channel, should be able to handle such interrupts (or be able to guarantee that such interrupts cannot arrive). Transputer Motherboard User Manual TMB M 711...

  • Page 43: Chapter 4 The Tmb03 Motherboard

    The TMB03 is a small PC hosted TRAM motherboard, with space to plug in up to five Transputer Modules. It has a dummy site allowing a size six TRAM to be fitted It is possible to use the TMB03 without TRAMs as a driver board (PC- to-link adapter) for external transputer systems via the master link on the edge connector.

  • Page 44: Board Configuration Jumpers

    AS0/AS1 The board’s IO address can be set to #150, #200 or #300. 10MB/s The transputer link speeds can be set to 10MHz or 20MHz. M & S Allow the board to be used as a Master or Slave board.

  • Page 45: Control Configuration

    Configuration of the board IO base address is achieved via jumpers AS0, AS1, as follows: Description Base address 150 hex (default) Base address 200 hex Base address 300 hex Table 5: Base address select jumper TMB M 711 Transputer Motherboard User Manual...

  • Page 46: Link Speed Configuration

    Board Configuration Jumpers 4.1.3 Link Speed Configuration The link speed select jumper controls the speed of all transputer links on the board. Jumper in/out Description 10MB/s 20 MBits/s (default) 10 MBits/s Table 6: Link speed selection jumper 4.1.4 Master and Slave Configuration The TMB03 can be used either as a master board or a slave board.
  • Page 47 figure 30 on page 35 for the location of the C012. Permanent damage may result if you do not remove the C012 when configuring the TMB03 as a slave, or if you use the master TMB M 711 Transputer Motherboard User Manual...

  • Page 48: Irq & Dma Selection

    Figure 34 shows the area and details the default connections. IRQ9 DMA2 (in) DMA3 (out) DMA3 (in) DMA1 (out) DMA1 (in) DMA (out) DMA (in) IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 DMA2 (out) Figure 34. Selection pins for Interrupt/DMA channel. Transputer Motherboard User Manual TMB M 711...

  • Page 49: The Edge Connector

    On the TMB03 the edge connector is used for two purposes: • connecting to other motherboards control signals (via up, down and subsystem) • connecting transputer links to construct the desired network topology. Figure 35 shows the pinout of the edge connector. downError downAnalyse downReset...
  • Page 50 Essentially, the connector brings out the three control ports, the link0s and link3s of all the transputers (for network configuration) and the ends of the default pipeline. This is summarized for reference purposes in figure 37. Transputer Motherboard User Manual TMB M 711...

  • Page 51: Use Of The Master Link

    • board set to master mode, master link connected to an external rack of transputer equipment & no TRAM in slot0 of the board - use as a link adapter card. • board set to slave mode, master link optionally connected to external transputer equipment, one or more TRAMs plugged onto the board &...
  • Page 52 Power on the PC and run check. When connecting the TMB03 to motherboards which include electronic link switching, then the TMB03’s PipeHead could be used as ConfigDown (i.e. it may be connected to ConfigUp of the configurable motherboard). Transputer Motherboard User Manual TMB M 711...

  • Page 53: Chapter 5 The Tmb04 Motherboard

    The TMB04 Motherboard Chapter 5 The TMB04 Motherboard The TMB04 is a transputer board for PCs with a single T4 or T8 transputer, up to 16 MBytes of memory in SIMMs, a B004-compatible PC link interface, and four TRAM sites.

  • Page 54: Fitting Trams

    TRAM sites, so SIL spacer strips are needed. When a TRAM is placed over the on-board transputer (in slots 0 and 1), and the TRAM has components on its underside, use of an additional set of spacers is recommended to avoid overheating the transputer, •...

  • Page 55: Board Configuration Jumpers

    On-board transputer clock speed and link speed selection. Memory speed selection. Connect transputer link 0 to host or edge connector. The source of control for the on-board transputer can be from either the host PC or from the edge connector (UP).

  • Page 56: On-Board Transputer Clock And Memory

    Board Configuration Jumpers 5.3.1 On-board transputer clock and memory The processor clock speed of the on-board transputer is selected by SW2, switches 4, 5 and 6, as follows. You may set a clock speed slower than that marked on the transputer, but not faster.

  • Page 57: Control Configuration

    5.3.2 Control Configuration The board’s control configuration jumpers, LK6 and LK12, allow the source of control for the on-board transputer and the modules in slots 0 to 3 to be determined. The control consist of the TRAM signals reset, error and analyse.

  • Page 58: Board Io Address

    Table 14: On-board transputer subsystem jumper By default, the reset line of the on-board transputer’s subsystem is asserted whenever the on-board transputer is reset. However, the TMB04 allows you to disable this behavior, so the TRAM slots are not reset when the on-board transputer is reset.

  • Page 59: Link Speed Configuration

    5 MBits/s 10 MBits/s 5 MBits/s 5 MBits/s 10 MBits/s 10 MBits/s 10 MBits/s 20 MBits/s 20 MBits/s 10 MBits/s 20 MBits/s (default) 20 MBits/s (default) Table 19: Master transputer link speed selection switch TMB M 711 Transputer Motherboard User Manual...

  • Page 60: Master And Slave Configuration

    Board Configuration Jumpers 5.3.5 Master and Slave Configuration Link 0 of the on-board transputer may be connected either to the PC interface or to the D-type connector. Jumper Position Description Left transputer link 0 connected to PC interface (default) Right...

  • Page 61: The Edge Connector

    On the TMB04 the edge connector is used for two purposes: • connecting to other motherboards control signals (via up, down and subsystem) • connecting transputer links to construct the desired network topology. Figure 40 shows the pinout of the edge connector. downError downAnalyse downReset...
  • Page 62 This is summarized for reference purposes in figure 42. Note that to connect a link of the on-board transputer to one of the TRAM slots, the link must be looped back at the D-type, or made using a link cable and the hedgehog - there are no links connecting the transputer to the TRAM sites on the board.
  • Page 63 The TMB04 Motherboard on-board transputer Host Figure 42. Summary of Network interconnect TMB M 711 Transputer Motherboard User Manual...
  • Page 64 The Edge Connector Transputer Motherboard User Manual TMB M 711...

  • Page 65: Chapter 6 The Tmb08 Motherboard

    6.1 Overview The TMB08 is a full length PC hosted TRAM motherboard, with space to plug in up to ten Transputer Modules. The TMB08 is shipped with an IMSC004 link switch, which provides for setting up user defined topologies. The switch is flexible enough to allow any TRAM’s link 0 or 3 to be connected to any other TRAM’s...

  • Page 66: Network Configuration

    The links connected to the C004 are: • link0 of all TRAM slots except module0 (module0 link0 is always connected to the host PC), • link3 of all TRAM slots, • link 0 of the T2 configuration processor, Transputer Motherboard User Manual TMB M 711...
  • Page 67 L3 link12 edge7 link27 module3 L3 link13 link28 C004 L28 module4 L3 link14 C004 L29 link29 module5 L3 link15 ConfigLink ConfigUp ConfigDown Configuration Processor IMSC004 Link 0 Figure 45. C004 Wiring TMB M 711 Transputer Motherboard User Manual...

  • Page 68: The Link Patch Area

    Figure 46 shows the links attached to the patch area and the default connections made when the board is shipped. root module0 C004 Root module can setup C004 Figure 46. The Link Patch Area for Master Board Transputer Motherboard User Manual TMB M 711...
  • Page 69 The TMB08 Motherboard edge root edge module0 C004 Figure 47. TMB08 Patch Area, connections for slave board TMB M 711 Transputer Motherboard User Manual...

  • Page 70: Summary Of Network Configuration

    In the top right hand corner of the board there is a 6 way switch bank. Switch 1 is on the right, switch 6 left is not used. The switches control the following functions: Transputer Motherboard User Manual TMB M 711...

  • Page 71: Board Address

    Modules 1-9 control source • Module 0 control source 6.3.1.1 Link Speed Switch 3 controls the transputer link speed. With the switch off/open (default) the links run at 20MHz. With the switch on/closed the links run at 10MHz. 6.3.1.2 Board Address Switches S1 and S2 select the board base address.

  • Page 72: Irq & Dma Selection

    +#14. This is a read/write register so that the programmed selection can be read back. The register coding is as shown in figure 51 and figure 52 Bit 1 Bit 0 - reset value Figure 51. IRQ Channel select. Transputer Motherboard User Manual TMB M 711...

  • Page 73: The Edge Connector

    On the TMB08 the edge connector is used for connection to other motherboards. For this purpose the following are brought out: • the three control ports and the configuration link, • twelve transputer links. TMB M 711 Transputer Motherboard User Manual...
  • Page 74 The pinout of this connector is shown in figure 54. Transputer Motherboard User Manual TMB M 711...

  • Page 75: The Link Patch Area

    ConfigUp to PipeHead , patch0 to C004 L28 , • • patch1 to C004 L29 . The patch0/1 connections allow 10 links to be brought out from the C004 to the edge connector. TMB M 711 Transputer Motherboard User Manual...

  • Page 76: Examples

    The most common stand-alone configuration for the TMB08 is for use with the Inmos Toolsets, with every TRAM reset from the PC.To achieve this configuration, set the link the link patch area as shown in figure 55, and make the following setting: Transputer Motherboard User Manual TMB M 711...

  • Page 77: Multiple Tmb08S

    (see above). Ensure that pipe-jumpers are used in empty TRAM slots, and in the inactive slots of any TRAMs larger than size 1, so that link 2 of the last TRAM on the motherboard is taken out to pipe tail. TMB M 711 Transputer Motherboard User Manual...
  • Page 78 The jumpers and links on the slave board should be set up as follows: Switches Setting Description Bus address #200 Use 20 Mbit/s links Slots 1 to 9 controlled from same source as slot 0 Slot 0 controlled from UP Table 24: Settings for slave operation Transputer Motherboard User Manual TMB M 711...
  • Page 79 Cable First board Second board Reset Cable Down (DN) Up (UP) Link Cable Pipetail (L10) Patch 1 (L9) Link Cable ConfigDown (L11) Patch 0 (L8) Table 25: Connections between TMB08s TMB M 711 Transputer Motherboard User Manual...
  • Page 80 Examples Transputer Motherboard User Manual TMB M 711...

  • Page 81: Chapter 7 The Tmb12 Motherboard

    (the Transrack) which provides mechanical stability, power and cooling services. The TMB12 has two C004 link switch chips and a controlling T222 transputer on board in order to provide for software control of network configuration. TMB M 711 Transputer Motherboard User Manual...
  • Page 82 Slot5 Slot6 Slot9 Slot10 Slot13 Slot14 Slot0 Slot3 Slot4 Slot7 Slot8 Slot11 Slot12 Slot15 Figure 57. TMB12 TRAM layout Figure 58 shows the general board layout (including configuration jumpers and switches) for reference. Transputer Motherboard User Manual TMB M 711...
  • Page 83 Figure 58. TMB12 board layout The major components outlined in the figure are described very briefly here: • P1 - carries 32 transputer links off the board, • P2 - carries power, pipeline and configuration links, and system control signals off the board, •...

  • Page 84: Description

    7.2.2 The P1 Edge Connector The TMB12 has two edge connectors called P1 and P2. Both of these connectors are standard DIN41612 96 way connectors. Ensure that when wiring to one of these connectors you do not Transputer Motherboard User Manual TMB M 711...

  • Page 85: The P2 Edge Connector

    Connector P1 carries 32 links from the electronic switches, whilst connector P2 carries a number of board and system services. The P1 edge connector brings 32 transputer links out of the TMB12 for connection to other boards. Table 27 shows the pinout of this connector.
  • Page 86 L25 IC3linkout13 IC2linkin13 edge L26 IC3linkout14 IC2linkin14 edge L27 IC3linkout11 IC2linkin11 edge L28 IC2linkout8 IC3linkin8 edge L29 IC2linkout9 IC3linkin9 edge L30 IC2linkout12 IC3linkin12 edge L31 IC2linkout15 IC3linkin15 Table 27: P1 connector pinout Transputer Motherboard User Manual TMB M 711...
  • Page 87 IC1linkout1 IC3linkout22 IC1linkout2 IC1linkin1 IC2linkin22 IC1linkin2 P4/3 P4/2 P4/4 P4/5 P4/6 notSubReset P4/7 K1/11 notSubAnalyse P4/8 K1/10 notSubError P4/9 P4/10 notUpReset notDownReset notUpAnalyse K1/3 notDownAnalyse notUpError K1/18 notDownError Table 28: P2 connector pinout TMB M 711 Transputer Motherboard User Manual...
  • Page 88 IC3linkout22 IC1linkout2 IC1linkout1 IC1linkin2 IC2linkin22 IC1linkin1 P4/3 P4/2 P4/4 P4/5 notSubReset P4/6 K1/11 notSubAnalyse P4/7 K1/10 P4/8 notSubError P4/9 P4/10 notDownReset notUpReset notUpAnalyse K1/3 notDownAnalyse K1/18 notDownError notUpError Figure 59. Mini-backplane P2 Connections Transputer Motherboard User Manual TMB M 711...

  • Page 89: Other Hardware

    Nine of the pins on edge connector P2 are wired to nine of the pins (2 through 10) of an uncommitted connector, P4, on the board. The two other pins of P4 (1 & 11) are wired to ground. P4 allows TMB M 711 Transputer Motherboard User Manual...

  • Page 90: Network Configuration

    In a similar fashion to the transputer links, there are 32 edge connector links. Edge links are divided equally into two types: • type 0: wired as per transputer link0’s, i.e., link output to IC2 and link input from IC3 •...
  • Page 91 P1 is from the perspective of the edge connector looking towards the C004s. Hence, edge L6 out is a link wire going towards the C004s, and is connected to the input of the appropriate C004. TMB M 711 Transputer Motherboard User Manual...
  • Page 92 L3Out Slot Slot L0Out L0Out L0In L0In IMSC004 (IC3) Edge Connector Links Figure 61. Connection details of the link switches Config Up config config Config Down Figure 62. Connections to the configuration processor Transputer Motherboard User Manual TMB M 711...
  • Page 93 L9 out slot 10 L3 in slot 10 L3 out edge L9 in slot 10 L0 out edge L10 in edge L10 out slot 10 L0 in Table 30: Connections to the C004s TMB M 711 Transputer Motherboard User Manual...

  • Page 94: The K1 Header Block

    PipeHead (P2) PipeTail (P2) C004switches P2 Edge connector Figure 63. K1 connection diagram K1 is a 20 pin header block organized 10 by 2 pins. Small jumpers are used to set the configuration. Transputer Motherboard User Manual TMB M 711...

  • Page 95: The P1 Edge Connector

    Clearly transputer link0s can be wired to any edge link of type3. Table 32 shows the recommended wiring to make on the break out board to achieve link0-link0 and link3-link3 connections.
  • Page 96 L19 edge L20 edge L21 edge L22 edge L23 edge L28 edge L29 edge L24 edge L25 edge L30 edge L31 edge L26 edge L27 Table 32: Default P1 link cable connections Transputer Motherboard User Manual TMB M 711...

  • Page 97: Summary

    (the “yellow plug cable”, see figure 65). slot0 link0 is brought directly to the edge connector as it allows those applications that require it to have two directly wired links to other transputer equipment, i.e., links which bypass the C004s. slot0linkout0...
  • Page 98 Figure 66 shows the main relations between P2, K1 and the link switches. C004 switches 16b/15b 1/20 L 22 L 23 10b/9b 19/2 10c/9c 9/12 13/8 7/14 15/6 5/16 17/4 10a/9a 16c/15c 16a/15a 30b/29b 3/18 23b/24b 11/10 Figure 66. Network configuration Transputer Motherboard User Manual TMB M 711...

  • Page 99: Chapter 8 The Tmb14 Motherboard

    8.1 Overview The TMB14 is a 6U (160mm) VME TRAM motherboard, with space for up to eight Transputer Modules. The link connections between the TRAMs are controlled by a pair of C004 link switches. 24 links are taken from these to edge connectors on the board.
  • Page 100 It is therefore possible to emulate the hard- wired pipeline connecting links 1 and 2 of each TRAM, as used on other motherboards. The error LEDs reflect the error status of each TRAM slot. Transputer Motherboard User Manual TMB M 711...

  • Page 101: Vmebus Interface

    SW1,2. These registers correspond to a C012 link adaptor, the subsystem port and the interrupt control logic. NB. The interface can be completely disabled, if required, by removing a jumper - see section 8.4.1 on page 102. TMB M 711 Transputer Motherboard User Manual...

  • Page 102: Link Adaptor Registers

    Register is ready for the next byte to be transmitted. Setting the Output Interrupt Enable bit will cause the C012 to generate an interrupt whenever this condition arises. Bits 2-7 are not used and must be written as zero’s. Transputer Motherboard User Manual TMB M 711...

  • Page 103: Subsystem Control Registers

    TRAM slot number, hence bit 0 reflects slot 0’s error line and so on. (These bits are active low). 8.2.3 Interrupt Control Registers Programming the interrupt control registers allows the user to determine which (if any) of three events will cause a VMEbus TMB M 711 Transputer Motherboard User Manual...

  • Page 104: Link And Control Configuration

    C004 link switches. The exceptions are made by hardware jumper settings. The subsystem connections between the TRAMs, the host computer and the edge connector are configurable by hardware jumper settings. Transputer Motherboard User Manual TMB M 711...

  • Page 105: Links

    8.3.1 Links 8.3.1.1 Configuration Processor The C004’s are configured by the on board T222 transputer. This is itself programmed by downloading code in through its link 1, which can be connected to an edge connector signal (ConfigUp on P4 or P2), to TRAM slot 0 or to VMEbusLink.
  • Page 106 Those link connections which must be made by hardware jumper settings (because they are involved in programming the connections of the other links) are detailed in figure 71. To make one of the 9 Transputer Motherboard User Manual TMB M 711...

  • Page 107: Subsystem

    The error signal from the each TRAM slot is also brought out onto eight leds on the front panel. The top left led is ERROR0, the top right is ERROR1, the bottom left is ERROR6 and the bottom right is ERROR7. TMB M 711 Transputer Motherboard User Manual...
  • Page 108 Link and Control Configuration VMEbus TRAM 0 Subsystem TRAM 0 Subsystem ServicesDown ServicesUp TRAMs 1-7 Figure 72. Subsystem Connections Transputer Motherboard User Manual TMB M 711...

  • Page 109: Board Setup

    (requiring two jumpers to be fitted side-by-side) and KA-JD are 3 pin, requiring a jumper to be fitted between the central pin and the left or right or right hand pin. SW1 and SW2 are sixteen-position rotary switches. TMB M 711 Transputer Motherboard User Manual...

  • Page 110: Vmebus Interface

    SW1 is set to X and SW2 is set to Y , on revision C and later the base address in hex is 0x XY 00 and on earlier revisions is 0x YX 00 8.4.2 Link Speed Configuration The speeds of the transputer links are set as follows: Jumper Function...

  • Page 111: Control Configuration

    Slot 0 (default) Table 40: Slot 1 to 7 control jumper Unlike most transputer motherboards, which have up, down and subsystem control ports, the TMB14 has only up and down. The up port can be switched between P2 and P4, and the down port can be switched between P2 and P5.

  • Page 112: Link Configuration

    Jumpers KA to KD allow the up and down links of the configuration pipeline to be taken to either the front or back of the board. In the left Transputer Motherboard User Manual TMB M 711...

  • Page 113: Sysreset Lengthening

    P4 and P5 may be fitted with “hedgehog” breakout boards, allowing standard link cables to be plugged into the front of the board. The resultant pinouts are shown in figure 76 and figure 77. TMB M 711 Transputer Motherboard User Manual...
  • Page 114 BERR* BG3OUT* SYSRESET* BR0* DS1* LWORD* BR1* DS0* BR2* WRITE* BR3* DTACK* IACK* SERCLK IACKIN* SERDAT IACKOUT* IRQ7* IRQ6* IRQ5* IRQ4* IRQ3* IRQ2* IRQ1* +12V +5V STDBY -12V Table 43: P1 connector pinout Transputer Motherboard User Manual TMB M 711...
  • Page 115 The TMB14 Motherboard BackConfigUpOut RESERVE BackConfigDownOut BackConfigUpIn BackConfigDownIn P2Link0Out P2Link1Out P2Link0In P2Link1In P2Link2Out P2Link3Out P2Link2In P2Link3In P2Link4Out P2Link5Out P2Link4In P2Link5In P2Link6Out P2Link7Out P2Link6In P2Link7In notBackUpReset notBackDownReset notBackUpAnalyse notBackDownAnalyse notBackUpError notBackDownError Table 44: P2 connector pinout TMB M 711 Transputer Motherboard User Manual...
  • Page 116 Connector Pinouts Description -12V Table 45: P3 User power connector pin assignments Transputer Motherboard User Manual TMB M 711...
  • Page 117 The TMB14 Motherboard ConnectorLinkIn ConnectorLinkOut FrontConfigUpIn FrontConfigUpOut P4Link7In P4Link7Out P4Link6In P4Link6Out P4Link5In P4Link5Out P4Link4In P4Link4Out P4Link3In P4Link3Out P4Link2In P4Link2Out P4Link1In P4Link1Out P4Link0In P4Link0Out notUpError notUpAnalyse notUpReset Figure 74. P4 (top) D-type pinout TMB M 711 Transputer Motherboard User Manual...
  • Page 118 Connector Pinouts notDownError notDownAnalyse notDownReset FrontConfigDownIn FrontConfigDownOut P5Link7In P5Link7Out P5Link6In P5Link6Out P5Link5In P5Link5Out P5Link4In P5Link4Out P5Link3In P5Link3Out P5Link2In P4Link2Out P5Link1In P5Link1Out P5Link0In P5Link0Out Figure 75. P5 (bottom) D-type pinout Transputer Motherboard User Manual TMB M 711...
  • Page 119 Connector link Config Up P4 link7 P4 link6 P4 link5 P4 link4 P4 link3 P4 link2 P4 link1 P4 link0 circuit board Function stencilling Figure 76. Connections on P4 (top) break out board TMB M 711 Transputer Motherboard User Manual...

  • Page 120: Programming

    8.2 on page 93. These appear at the offsets shown from a base address set by SW1,SW2. The base address is #XY00 in the short address space where X is set by SW2 and Y by SW1. Transputer Motherboard User Manual TMB M 711...
  • Page 121 TRAM error register Table 46: Register address map Slave cycles other than odd byte read and write will cause a bus error, as recommended by the VMEbus specification. TMB M 711 Transputer Motherboard User Manual...
  • Page 122 Programming Transputer Motherboard User Manual TMB M 711...

  • Page 123: Chapter 9 The Tmb16 Motherboard

    It is also possible to arrange for the board to act as a high speed interface between a PC and an external transputer network in a way which doesn’t require there to be any TRAMs on the board.

  • Page 124: Network Configuration

    This section provides an overview of network configuration on the TMB16. It describes the wiring of the electronic link switch, the patch area and shows the relationship between these and the edge connector. Transputer Motherboard User Manual TMB M 711...

  • Page 125: Electronic Link Configuration

    The connections made by the C004 are controlled by the T2 transputer acting in the role of a configuration processor. The T2 is, in turn, controlled via ConfigUp (which by default is wired to module0 link1 through the patch area for this purpose).

  • Page 126: The Link Patch Area

    (root processor is connected to another TRAM motherboard, via PipeHead) in a multi board system. To this end, six transputer links are brought out to the patch area: Transputer Motherboard User Manual TMB M 711...
  • Page 127 TMB16 as a master or slave board. root module0 C004 Root module can setup C004 Figure 81. TMB16 Patch Area, connections for master board edge root edge module0 C004 Figure 82. TMB16 Patch Area, connections for slave board TMB M 711 Transputer Motherboard User Manual...

  • Page 128: Summary Of Network Configuration

    Edge connector patch0/1 ConfigDown edge0 to 7 PipeTail ConfigUp C004 C004 L28/29 slot slot slot slot L2L1 L2L1 L2 L1 L2 L1 PC link Figure 83. Network configuration summary Transputer Motherboard User Manual TMB M 711...

  • Page 129: Board Setup

    Slots 1 to 9 are controlled from the Slot 0’s subsystem port Slots 1 to 9 are controlled from the same source as Slot 0 (default) Table 48: Slots 1 to 9 control selection TMB M 711 Transputer Motherboard User Manual...

  • Page 130: Board Address

    (default) Base address 200 hex Table 49: Board I/O address selection 9.3.3 Link speed The speed of all the transputer links of the board can be set at either 10 or 20 Mbit/s using SW2.2, as follows: SW2.2 Description All links run at 20Mbit/s...

  • Page 131: Reserved Switches

    For this purpose the following are brought out: • the three control ports and the configuration link, • eight transputer links from the C004, and • two transputer links from the link patch area. TMB M 711 Transputer Motherboard User Manual...
  • Page 132 (sometimes called a “hedgehog” or “break-out board”) which plugs into the edge connector and brings out the various links and ports onto standard connectors which accept link cables and reset cables. The pinout of this connector is shown in figure 85. Transputer Motherboard User Manual TMB M 711...

  • Page 133: Examples

    This section gives the recommended settings and cabling for use in three common configurations: stand-alone (where the TMB16 carries transputer modules and is not connected to other transputer cards), multi-board (where more than one TMB16 is used), and link- adaptor (where the TMB16 is used as an interface between the PC and an external transputer board, without any TRAMs on the TMB16).

  • Page 134: Stand-Alone

    9.5.2 Multiple TMB16s This examples shows how to connect two TMB16s together to build a larger transputer system. The first board is used as the master, is controlled from the PC, and provides the PC link interface, whilst the second board is the slave.
  • Page 135 The TMB16 Motherboard 1 2 3 4 Link patch area 1 2 3 4 Figure 87. Setup for slave in multi-board operation Config PipeHead Control Master Slave Figure 88. Connections between Master and Slave TMB M 711 Transputer Motherboard User Manual...

  • Page 136: Link Adaptor

    9.6 The Host Interface The TRAM standard defines that TRAM motherboards have on them a T2 transputer to control the board’s IMS C004 electronic link switch. In older designs the T2 was used solely for this purpose and was therefore rather under-utilized. In the TMB16, a portion of this transputer’s external memory space is mapped directly to the PC.

  • Page 137: Operation Of The Hardware

    PC to the T2 transputer (write port) and the other for communications from the T2 transputer to the PC (read port). During data transfers from the PC to the T2 transputer, the PC simply writes words to the write port as fast as it can. Using the Intel processor’s string write instruction (80286 and later), accesses to the...
  • Page 138 Figure 90. Inter processor communications (write) For communications from the transputer to the PC a similar process occurs: the transputer writes to a block of memory in its external memory space, this memory is folded by hardware to a single location in the PC’s I/O space (the read port) which the PC reads with...

  • Page 139: Memory Maps

    The TMB16 has a flags register which is used during B004 interface emulation. Essentially the register looks like a C012 as far as the PC is concerned. On the transputer side it is mapped TMB M 711 Transputer Motherboard User Manual...
  • Page 140 1 ⇒ Byte mode, 0 ⇒ string mode Table 52: TMB16 Flags register • The transputer has 32KBytes of its memory space mapped to the PC’s I/O space. The actual mapping depends on whether the transputer is reading or writing to the memory space.

  • Page 141: Operation Of The Software

    32KBytes (see the memory map). As far as the T2 transputer is concerned, access to the PC is achieved by reading/writing its external memory. During a data transfer from the PC to the transputer network the T2 is reading from its external memory and writing data to one of its links.
  • Page 142 The Host Interface instruction. Figure 92 summarizes the key software instructions used. OUTSW TMB16 Transputer network INSW Key: transputer address bus PC’s Intel processor memory Figure 92. Key software instructions Transputer Motherboard User Manual TMB M 711...

  • Page 143: Chapter 10 The Tmb17 Motherboard

    10.1 Overview The TMB17 is a full length PCI hosted TRAM motherboard, with space to plug in up to ten Transputer Modules. The TMB17 is shipped with an IMSC004 link switch, which provides for setting up user defined topologies. The switch is flexible enough to allow any TRAM’s link 0 or 3 to be connected to any other TRAM’s...

  • Page 144: Windows 95

    1. From the Start menu, show the control panel by selecting it from the Settings menu. 2. Start up the System control panel. 3. Select the Device Manager page. 4. Under Transtech devices, select the TMB17 entry. Transputer Motherboard User Manual TMB M 711...

  • Page 145: Pci Interface

    5. Select the Resources page. 10.3 PCI Interface 10.3.1 Hardware Description Figure 95 is a block diagram of the PCI to Transputer link interface. The PCI controller combines plug and play configuration capabilities with an B004/B008 compatible register map so that standard software works correctly.
  • Page 146 1Ch. The data should be written in the order to be send by the C012 link (ls byte first). To ensure data is not lost, the number of bytes of available space must first be determined by reading the Tx level register. Transputer Motherboard User Manual TMB M 711...

  • Page 147: Pci Configuration

    Writing a one to bit 0 of offset 11h will force Analyse to be sent to module 0, a 0 must be written to remove Analyse. 10.3.3 PCI Configuration Programmers should note that Transtech’s PCI SIG Vendor ID is 1278 hex. The TMB17 has a Device ID of 1001hex. 10.4 Network Configuration This section provides an overview of network configuration on the...
  • Page 148 The C004 is programmed via the T2 configuration processor on the board. This in turn is programmed via ConfigUp . The connections are shown in figure 96 for reference. Transputer Motherboard User Manual TMB M 711...

  • Page 149: The Link Patch Area

    The primary purpose of the patch area is to allow PipeHead and ConfigUp to be terminated correctly. Using the patch it is possible to TMB M 711 Transputer Motherboard User Manual...
  • Page 150 Figure 97 shows the links attached to the patch area and the default connections made when the board is shipped. root module0 C004 Root module can setup C004 Figure 97. The Link Patch Area for Master Board Transputer Motherboard User Manual TMB M 711...
  • Page 151 The TMB17 Motherboard edge root edge module0 C004 Figure 98. TMB17 Patch Area, connections for slave board TMB M 711 Transputer Motherboard User Manual...

  • Page 152: Summary Of Network Configuration

    The basic board configuration is achieved by the use of the configuration switches. In the top left hand corner of the board there is a 4 way switch bank. Switch 1 is on the top, switch 4 bottom is not used. Transputer Motherboard User Manual TMB M 711...
  • Page 153 Module 0 control source • Modules 1-9 control source 10.5.1.1 Link Speed Switch 3 controls the transputer link speed. With the switch off/open (default) the links run at 20MHz. With the switch on/closed the links run at 10MHz. 10.5.1.2 Control Configuration There are two configuration options relating to board control:...

  • Page 154: The Edge Connector

    On the TMB17 the edge connector is used for connection to other motherboards. For this purpose the following are brought out: • the three control ports and the configuration link, • twelve transputer links. Transputer Motherboard User Manual TMB M 711...
  • Page 155 The pinout of this connector is shown in figure 102. TMB M 711 Transputer Motherboard User Manual...

  • Page 156: The Link Patch Area

    ConfigUp to PipeHead , patch0 to C004 L28 , • • patch1 to C004 L29 . The patch0/1 connections allow 10 links to be brought out from the C004 to the edge connector. Transputer Motherboard User Manual TMB M 711...

  • Page 157: Examples

    TMB17s connected as a single system, configured for use with an Inmos Toolset. 10.6.1 Stand-alone TMB17 The most common stand-alone configuration for the TMB17 is for use with the Inmos Toolsets, with every TRAM reset from the PC. To TMB M 711 Transputer Motherboard User Manual...

  • Page 158: Multiple Tmb17S

    (see above). Ensure that pipe-jumpers are used in empty TRAM slots, and in the inactive slots of any TRAMs larger than size 1, so that link 2 of the last TRAM on the motherboard is taken out to pipe tail. Transputer Motherboard User Manual TMB M 711...
  • Page 159 Cable First board Second board Reset Cable Down (DN) Up (UP) Link Cable Pipetail (L10) Patch 1 (L9) Link Cable ConfigDown (L11) Patch 0 (L8) Table 57: Connections between TMB17s TMB M 711 Transputer Motherboard User Manual...
  • Page 160 Examples Transputer Motherboard User Manual TMB M 711...

  • Page 161: Chapter 11 Utilities Software

    Utilities Software Chapter 11 Utilities Software This chapter describes the software on the Transputer Utilities CD- ROM supplied with Transtech’s Transputer motherboards. The CD- ROM includes: • Transputer network test software (check, mtest, etc.) • iserver, suitable for use with the 4th generation Inmos toolset.

  • Page 162: Solaris 2 Installation

    If you are using a FORCE SPARCE CPU-3CE card, please read this section carefully when selecting a VME base address for each VME Transputer board such as a TMB14 to be installed. The FORCE SPARC CPU-3CE card maps a single window of the VME address space into its processor memory map.

  • Page 163: Force Cpu-5V

    11.2.3 Software The Transputer Utilities for Solaris 2 are supplied on CD-ROM. If the SPARC computer does not itself have a CD-ROM drive, then a networked Sun with a CD-ROM drive can be used and the CD- ROM’s contents accessed using NFS.

  • Page 164: Configuration File

    TMB14 motherboard or motherboards. Normally, for every Transtech TMB14 motherboard with an enabled VME interface an entry is required in the configuration file. Configuration file entries should not be made for TMB14s where the VME interface is disabled.

  • Page 165: Environment Variables

    The software uses some environment variables set on the host system. These are: The path of the top-level Transtech directory, where the software is installed. The name of the transputer link or board to TRANSPUTER access. The name is used to search the connection database or Aserver database to find the interface type and parameters.

  • Page 166: Connection Database

    The connection database lists the capabilities (resources) available to certain tools such as the host server utility Iserver. The actual resource that the tool is to use is specified by the TRANSPUTER environment variable or command line arguments such as the Iserver sl option.

  • Page 167: Network Test Utilities

    Descriptive comment. Description For example, to use iserver on an ISA board at IO address 150 hex to load and run the transputer executable run.btl, use the command C:\> iserver /sl 150 /sb run.btl Alternatively, set the environment variable TRANSPUTER to the required capability name.

  • Page 168: Link Switch Configuration

    Consider a TMB17 with TRAMs fitted into sites 0, 1, 2 and 3. By default, these are connected in a link 2 to link 1 pipeline as shown by check: C:\TPS>set TRANSPUTER=tmb17 C:\TPS>check Using tmb17 check 3.0.3 Transputer Motherboard User Manual TMB M 711...
  • Page 169 1 T225c-20 1.74 1 [ 2:C ] 2 C004b [ -ABC---- --123--- -------- -------- ] 3 T805b-25 1.75 1 [ ... ] 4 T805b-25 1.75 1 [ ... ] 5 T805b-25 1.75 1 [ ... ] C:\TPS>check TMB M 711 Transputer Motherboard User Manual...

  • Page 170: The Inmos Server Program

    11.6 The Inmos server program The Inmos server, iserver, is used to load programs on the transputer network, and provide host services to the program. iserver is normally invoked on a PC as follows, to load and run a program.

  • Page 171: Inmos Aserver Support

    1. Add the following line to the ASERVDB database: | tmb17 | txcs wtmb17 0 | 1 | 2. Set the TRANSPUTER variable to tmb17 either in autoexec.bat or using iLaunch, or specify the option /sl tmb17 when starting the utilities.

  • Page 172: Solaris 2 Device Driver

    The IMS_IO structure and related constants are defined in the include file ims_bcmd.h. For example, the following code fragment opens and resets the TMB14: #include <ims_bcmd.h> union IMS_IO io; int fd; Transputer Motherboard User Manual TMB M 711...
  • Page 173 (ioctl( fd, SETFLAGS, &io )) exit( 1 ); The function ioctl() can also be called with a request argument of READFLAGS with the third argument set to a pointer to an IMS_IO structure. This returns status information. TMB M 711 Transputer Motherboard User Manual...

  • Page 174: Reference Manual

    [ /i ] [ /l name ] [ /m filename ] [ /n ] [ /r ] [ /v ] [ /x ] [ < filename ] DESCRIPTION check is a utility which tests a network of Transputer pro- cessors.
  • Page 175 Use filename as a toolset map file. Do not reset the root transputer. Reset the root transputer subsystem. Leave network in virgin reset state. Ignores any file piped in to check. BUGS check does not work with T450 processors.

  • Page 176: Ckmon(1)

    | ckmon /0 [ /h ] [ /l name ] [ /a ] ckmon /f filename /n [ /h ] [ /l name ] [ /a ] DESCRIPTION ckmon is a Transputer monitor program. The first Transputer network monitored by using the 0 option.

  • Page 177: Ftest(1)

    Utilities Software ftest(1) NAME ftest - Test processors in a Transputer network SYNOPSIS Unix: check | ftest [ -t2 ] [ -t4 ] [ -t8 ] [ -l ] DOS: check | ftest [ /t2 ] [ /t4 ] [ /t8 ] [ /l ]...

  • Page 178: Iserver(1)

    Inmos host server program. used load programs onto Transtech systems and allow them access to the host workstation’s keyboard, screen, file system other services. The list of available systems (resources) which iserver kept in a file called the connection database.
  • Page 179 Utilities Software sl linkname Use the named resource. Reset the root transputer. Analyse and peek the root transputer. sc filename Copy the named file to the link. sp n Set peek size to n Kchars. Serve the link. Enter the session shell.

  • Page 180: Load(1)

    DESCRIPTION load is a utility used in conjunction with check which loads a file or files onto a processor in a Transputer network. The host link connection to use is specified by the l option or the TRANSPUTER environment variable.

  • Page 181: Mtest(1)

    Transputers. The host link connection to use is specified by the l option or the TRANSPUTER environment variable. This corresponds to an entry in connection database pointed environment variable ICONDB.
  • Page 182 Reference Manual Pages Do not include root processor in tests. Display help page. Transputer Motherboard User Manual TMB M 711...

  • Page 183: Linked Process Units

    (which cause the iserver to terminate) receive special treatment: a termination message is not passed host until total “n” termination messages are received from clients. Hence the iserver will not terminate until all clients have terminated. TMB M 711 Transputer Motherboard User Manual...
  • Page 184 “[1].860 “; val len_2 size(boot_2); val boot_3 “[2].860 “; val len_3 size(boot_3); process ( interface ( input HostInput, output HostOutput, int flags = NORUN, char boot_file[len_1]=boot_1) ) driver_1; Transputer Motherboard User Manual TMB M 711...
  • Page 185 /* placement */ use “hostmux.lku” for mult_1; use “hostmux.lku” for mult_2; use “run860.lku” for driver_1; use “run860.lku” for driver_2; use “run860.lku” for driver_3; place driver_1 on TTM100_1; place driver_2 on TTM100_2; place driver_3 on TTM100_3; TMB M 711 Transputer Motherboard User Manual...
  • Page 186 Reference Manual Pages place mult_1 on TTM100_1; place mult_2 on TTM100_2; place HostInput on host; place HostOutput on host; FILES hostmux.lku SEE ALSO iserver(1) Transputer Motherboard User Manual TMB M 711...

  • Page 187: Iocache(2)

    “iocache.lku” for cache; DESCRIPTION The file cache process improves I/O performance by cacheing recently accessed data. The size of I/O blocks is converted up or down to the optimum, depending on the host server TMB M 711 Transputer Motherboard User Manual...
  • Page 188 In general, as much heap as possible should be given to this process. If the host is a PC running DOS, then text mode files opened by Transputer processes are not cached. This does not apply to files opened by i860s.

  • Page 189: Program Function Calls

    On multi-processor systems, the server channels should multiplexed using hostmux.lku and not the occam procedure so.multiplexor. This routine should also be used instead of so.buffer. TMB M 711 Transputer Motherboard User Manual...
  • Page 190 FILES genio.h genio.lib SEE ALSO hostmux(2) RESTRICTIONS File descriptors used by routines in the genio library can- used with the standard file I/O routines and vice- versa. Transputer Motherboard User Manual TMB M 711...
  • Page 191 If TMB16-optimized I/O is enabled, the calling process must have host channels connected DIRECTLY to the TMB16 interface link. multiplexors buffers allowed between the library and the host link. The hostmux process can handle enlarged iserver packets. TMB M 711 Transputer Motherboard User Manual...
  • Page 192 Reference Manual Pages Transputer Motherboard User Manual TMB M 711...

  • Page 193: Chapter 12 Trouble-Shooting

    Trouble-shooting Chapter 12 Trouble-shooting In the event of a problem with your transputer equipment, the following sections give some hints for tracking down the cause. 12.1 TRAM checklist It check reports some, but not all of the transputers, then it is best to draw a picture of the processors and links that are detected.

  • Page 194: Reset

    Using a continuity tester or resistance meter, check the connection of the link. There should be a 56 Ohm series resistance. If a transputer cannot be booted from one link, even if the link is correctly connected, it may be because its other links are not held low, but are disconnected and floating high.

  • Page 195: Pc Host Interface

    Then re-introduce other devices one at a time, resolving any clashes that occur. If you are using more than one transputer card, start with just one card, then introduce the others.
  • Page 196 PC Host Interface Transputer Motherboard User Manual TMB M 711...

  • Page 197: Index

    ConfigUp 13 Configuration File 156 ftest 159 configuration pipeline 13 Functional test 159 Connection database 158 control architecture 9 Control configuration genio 162 TMB03 37 TMB04 49 crossbar switches 13 Hedgehog TMB03 42 TMB M 711 Transputer Motherboard User Manual...
  • Page 198 29 TMB17 141 RESET 164 Link speed reset cable 11 TMB03 38 reset signal 19 TMB12 76 rspy 163 TMB14 102 link switches 13 load 172 Server 162 SETFLAGS 164 SETTIMEOUT 164 Transputer Motherboard User Manual TMB M 711...
  • Page 199 Control configuration 63 P4 D-type pinout 109 Edge connector 65 P5 D-type pinout 110 Example slave setup 70 Register address map 113 Hardwired links 62 Subsystem control registers 95 Hedgehog 67 User power connector 108 TMB M 711 Transputer Motherboard User Manual...
  • Page 200 Example slave setup 151 Hardwired links 144 Hedgehog 148 Link configuration 139 Link patch area 141 TRAM circuit diagram 21 pinout 19 registers 29 TRANSPUTER 158 Trouble-shooting 185 vme-a32map 154 VMEbus interface TMB14 93 Transputer Motherboard User Manual TMB M 711...

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