Sony Mz-G750 Service Manual page 30

MZ-G750/R700
• IC801 CXD2671-204GA (SYSTEM CONTROLLER, DIGITAL SIGNAL PROCESSOR, 16M BIT D-RAM)
Pin No. Pin Name
1 PAUSE KEY
2 MIC SENSE
3 XTEST
4, 5 NC
6 MCUVDD0
7 MIFVSS3
8 XRST
9 S MON
10 VB MON
11 CHG MON
12 VREF MON
SET KEY 1,
13, 14
SET KEY 2
15 VL MON
16 HIDC MON
17 WK DET
18 REC KEY
19 HALF LOCK SW
20 RMC KEY
21 AVDD
22 AVSS
23 VDIOSC
24 OSCI
25 OSCO
26 VSIOSC
27 DAVDD
28 VREFL
29 AOUTL
30 AOUTR
31 VREFR
32 DAVSS
33 ASYO
34 ASYI
35 AVD1
36 BIAS
37 RFI
38 AVS1
39 PCO
40 PDO
41 FILI
42 FILO
43 CLTV
44 PEAK
45 BOTM
46 ABCD
47 FE
48 AUX1
49 VC
50 ADIO
51 ADRT
30
I/O
I Set key input terminal (X key input)
Control signal output to the microphone amp
O
"H": HIGH, "L": LOW, normally: "H"
I Input terminal for the test mode set up
O Not used (open)
— Power supply terminal (for microcomputer block) (+1.5 V)
— Ground terminal (for microcomputer I/F)
I System reset signal input terminal from the power control (IC901) "L": reset
I Servo signal monitor input terminal (A/D input) from RF amp (IC501)
I Voltage monitor input terminal of UNREG power supply (A/D input)
I Charge voltage monitor input terminal (A/D input) from XPC18A22FCR2 (IC601)
I Clear reference voltage input terminal (A/D input) from RF amp (IC501)
I Set key input terminal (A/D input)
I VL voltage monitor input terminal (A/D input) (G750 only)
I HIGH DC voltage monitor input terminal (A/D input)
I Set key start switching detection signal input terminal (A/D input)
I REC key input terminal (A/D input)
Open button detection switch (S805) input terminal (A/D input)
I
"L": when normal position, "H": when locked
I Key input terminal (A/D input) of the remote commander attached headphone
— Power supply terminal (for the analog circuit block) (+2.8 V)
— Ground terminal (for the analog circuit block)
— Power supply terminal (for OSC cell) (+2.4 V)
I System clock (45.1584 MHz) input terminal
O System clock (45.1584 MHz) output terminal
— Ground terminal (for OSC cell)
— Power supply terminal (for the built-in D/A converter) (+2.4 V)
I Reference voltage input terminal (for the internal D/A converter L-CH)
O Built-in D/A converter (L-CH) output terminal
O Built-in D/A converter (R-CH) output terminal
I Reference voltage input terminal (for the built-in D/A converter R-CH)
— Ground terminal (for the built-in D/A converter)
O Playback EFM duplex signal output terminal
I Playback EFM comparison slice level input terminal
— Ground terminal (for the analog) (+2.4 V)
I Bias input for the playback EFM comparison
I Playback EFM RF signal input from RF amp (IC501)
— Ground terminal (for the analog)
O Phase comparison output for the master clock of playback EFM system master PLL
O Phase comparison output for the analog PLL Not used (open)
I Filter input for the master clock of the playback EFM system master PLL
O Filter output for the master clock of the playback EFM system master PLL
I Internal VCO control voltage input for the playback EFM system master PLL
I Peak hold signal input of the light amount signal (RF/ABCD) from RF amp (IC501)
I Bottom hold signal input of the light amount signal (RF/ABCD) from RF amp (IC501)
I Light amount signal (ABCD) input from RF amp (IC501)
I Focus error signal input from RF amp (IC501)
I Support signal (I signal/temperature signal) input terminal (A/D input)
3
I Middle point voltage (+1.2 V) input terminal
O Monitor output of A/D converter input signal Not used (open)
I A/D converter the upper limit voltage input (fixed at "H" in this set)
Description
(Not used)
"L": test mode (normally fixed at "H")