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Avago AFBR-83CDZ Datasheet

12 channel × 12.5 gbps transceiver cxp pluggable, parallel fiber-optics module

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AFBR-83CDZ
12 Channel × 12.5 Gbps Transceiver
CXP Pluggable, Parallel Fiber-Optics Module
Data Sheet
Description
The Avago Technologies AFBR-83CDZ is a Twelve-Chan-
nel, Pluggable, Parallel, Fiber-Optic CXP Transceiver for
12 × 12.5G proprietary application. This transceiver is a
high performance module for short-range multi-lane
data communication and interconnect applications. It
integrates twelve data lanes in each direction with 150
Gbps aggregate bandwidth. Each lane can operate at
12.5 Gbps up to 50 m using OM3 fiber and 65 m using
OM4 fiber. These modules are designed to operate over
multimode fiber systems using a nominal wavelength of
850 nm. The electrical interface uses an 84-contact edge
type connector. The optical interface uses a 24-fiber MTP
(MPO) connector. This module incorporates Avago Tech-
nologies proven integrated circuit and VCSEL technology
to provide reliable long life, high performance, and con-
sistent service.
Applications
• 12 × 12.5G proprietary interconnects
• Data Aggregation, Backplane and Proprietary Protocol
and Density Applications
• Datacom/Telecom switch & router connections
Part Number Ordering Options
AFBR-83CDZ
12x 12.5 Gbps with Full Diagnostic Monitoring
AFBR-83EVB
CXP Evaluation Board
AFBR-83EVK*
CXP Evaluation Kit
*
Includes GUI, User Guide, i-Port and Power Supply
Patent -
www.avagotech.com/patents
Features
• Compliant to SFF-8642: Mini Multilane Series: Shielded
Integrated Connector, and InfiniBand Architecture
Specification V2 R1.3 for CXP Interface
• Multi-rate capable from 11 Gbps to 12.5 Gbps
• High Channel Capacity: 150 Gbps per module, bi-
directional, with twelve independent Transmitters and
Receivers each
• Operates at 12.5 Gbps per channel with 64b/66b
encoded data for proprietary application
• Hot Pluggable
• Links up to 50 m using OM3 fiber and 65 m using OM4
fiber
• 0 to 70 °C case temperature operating range
• 3.3 V power supply only
• Low power dissipation of < 3.5 W
• Proven High Reliability 850 nm technology: Avago
VCSEL array transmitter and Avago PIN array receiver
• Two Wire Serial (TWS) interface with maskable interrupt
for expanded functionality including:
– Individual channel functions: channel/output dis-
able, squelch disable, and lane polarity inversion
– Diagnostic Monitoring functions: module tempera-
ture and supply voltages, per channel laser current
and laser power, and input receiver power
– Status per channel: Tx fault, electrical (transmitter)
and optical (receiver) LOS, and alarm flags
• Utilizes a standard 24 lane optical fiber with MTP
(MPO) optical connector for high density and thin,
light-weight cable management
Avago Technologies Confidential

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Summary of Contents for Avago AFBR-83CDZ

  • Page 1 Data Sheet Description Features • Compliant to SFF-8642: Mini Multilane Series: Shielded The Avago Technologies AFBR-83CDZ is a Twelve-Chan- nel, Pluggable, Parallel, Fiber-Optic CXP Transceiver for Integrated Connector, and InfiniBand Architecture 12 × 12.5G proprietary application. This transceiver is a Specification V2 R1.3 for CXP Interface...
  • Page 2 Status, alarm and fault information are available via the TWS interface. To reduce the need for polling, the hardware interrupt signal is provided to inform hosts of an assertion of an alarm, LOS and/or Tx fault. Avago Technologies Confidential...
  • Page 3 7-4 or 3-0) are assigned to each channel. • Codes 1xxxb are reserved. • Writing 0111b calls for full-scale de-emphasis. • Writing 0000b calls for minimum de-emphasis. Writing intermediate code values calls for intermediate levels of de-emphasis. Avago Technologies Confidential...
  • Page 4: Absolute Maximum Ratings

    Absolute Maximum Case Temperature for extended periods may adversely affect reliability. 2. This is the maximum voltage that can be applied across the differential inputs without damaging the input circuitry. 3. The maximum limit is the lesser of Vcc33 + 0.5 V or 4.0 V Avago Technologies Confidential...
  • Page 5: Recommended Operating Conditions

    Receiver Differential Data Output Load Note: 1. For applications other than 12.5 Gbps per channel, please contact Avago Sales. 2. Per IEEE 802.3ba-2010 TP1a and TP4 CPPI specifications for host except for jitter. 3. 1.5dB allocated for connection and splice loss.
  • Page 6 ƒ ƒ Return_loss( ) is the return loss at frequency ƒ is the frequency in GHz. 1-X2 1-X1 Time (UI) Figure 2. Tx Electrical Eye Mask Coordinates (TP1a) at Hit ratio 5 x 10 hits per sample Avago Technologies Confidential...
  • Page 7 Return_loss ( ≥ 7 – 1.6 0.01 ≤ ƒ < 11.1 GHz ≥ 3 2.5 ≤ 1-X1 Normalized Time [UI] Figure 3. Rx Electrical Eye Mask Coordinates (TP4) at Hit ratio 5 x 10 hits per sample Avago Technologies Confidential...
  • Page 8 X3 = 0.43 1-Y1 Y1 = 0.27 1-Y2 Y2 = 0.35 Y3 = 0.40 X3 1-X3 1-X2 1-X1 Normalized Time (Unit Interval Figure 4. Transmitter eye mask definitions (TP2) at Hit ratio 5 x 10 hits per sample Avago Technologies Confidential...
  • Page 9 Approximate OMA (difference of (at time-center of eye) average, may not be at waist) means of histograms) Figure 5. Required characteristics of the conformance test signal at TP3 – definitions of the conditions of stressed receiver sensitivity Avago Technologies Confidential...
  • Page 10: Pin Assignment

    Chromium. EPA Method 3540C/3550B by GC/MS for PPB and PBDE BS EN method by ICP and EPA methods by ICP, UV/Vis Spectrophotometry and GC/MS. Pin Assignment Figure 6. CXP module and host board connector pin assignments Avago Technologies Confidential...
  • Page 11 Rx10n PRSNT_L Vcc3.3-Rx Int_L/Reset_L Not used Transmitter -- Bottom Card Tx1p Tx0p Tx1n Tx0n Tx3p Tx2p Tx3n Tx2n Tx5p Tx4p Tx5n Tx4n Tx7p Tx6p Tx7n Tx6n Tx9p Tx8p Tx9n Tx8n Tx11p Tx10p Tx11n Tx10n Vcc3.3-Tx Not used Avago Technologies Confidential...
  • Page 12 TX10n Transmitter Inverted Data Input CML-I Ground VCC3.3-TX +3.3 V Power supply Transmitter Not used Not used , 3.3 V only Note: 1. Host shall use a pull up of 1.5 kohm – 10 kohm to Vcc3.3. Avago Technologies Confidential...
  • Page 13 2. Int_L/Reset_L is a bidirectional contact. When driven from the host, it operates logically as a Reset signal (input). When driven from the module, it operates logically as an Interrupt signal (output). Signal levels are per specified in Low Speed Logic section. Host shall use a pull up of 1.5 kohm – 10 kohm to Vcc3.3 for this pin. Avago Technologies Confidential...
  • Page 14 – a shorter assertion, driven by the module indicates an interrupt and a longer assertion of the signal driven by the host indicates a reset as per “I/O Timing for Control and Status Functions” Table below. Avago Technologies Confidential...
  • Page 15 15. Time from mask bit cleared (value = 0b) until associated Int_L operation resumes. 16. Time from change of state of Application or Rate Select bit until transmitter or receiver bandwidth is in conformance with appropriate specification. Avago Technologies Confidential...
  • Page 16 Total bus capacitive load, SCL, SDA 3.0 kW Pullup resistor, max and Int_L/Reset_L I/O pin 1.6 kW Pullup resistor, max Management Interface Timing Specification HIGH HD,STA HD,DAT SU,STA SU,DAT SU,STO START ReSTART STOP Figure 7. Two-wire Serial Interface Timing Diagram Avago Technologies Confidential...
  • Page 17: Memory Specifications

    2. Complete up to 4 Byte write. Timing should start from Stop bit at the end of the sequential write operation and continue until the module responds to another operation. 3. 50 K write cycles at 70°C. Avago Technologies Confidential...
  • Page 18 This applies to Rx and Tx Squelch and is the time from bit set (value = 1b) until squelch functionality is disabled. 10. This applies to Rx and Tx Squelch and is the time from bit cleared (value = 0b) until squelch functionality is enabled. Avago Technologies Confidential...
  • Page 19: Memory Map

    Channel Internal (Power High/Low) and 180-181 Checksum Module (Temp, Voltage) 206-229 Per-Channel Monitors: Rx Input 110-118 Vendor Specific Area – Read/Write Power 119-126 Password 230-255 Reserved – Vendor-Specific Rx Upper Page Select Byte (00h or 01h or 02h) Functions Avago Technologies Confidential...
  • Page 20 Figure 8. 24-fiber MPO Receptacle Recommended Power Supply Filter CXP Module 1 µH Vcc3.3-Rx 10 µF 0.1 µF Vcc_host = 3.3 V 1 µH Vcc3.3-Tx 10 µF 0.1 µF 10 µF 0.1 µF Figure 9. Recommended Power Supply Filter Avago Technologies Confidential...
  • Page 21 Mechanical Dimensions, Package Outline 34.93 28.45 67.92 21.2 19.21 23.9 48.62 13.73 9.81 7.69 23.9 All dimensions in millimeters Figure 10. Transceiver package dimensions Avago Technologies Confidential...
  • Page 22 AD14 Lower Card Slot to Upper Card Slot 4.50 0.10 Centerline AD07 Shell Width at screw attach features 27.00 0.25 AD15 Card Slot Rib to Rib 17.18 0.10 AD08 EMI Shell Base to Back 46.22 0.25 AD16 Peg Centerline to Peg Centerline 24.00 0.08 Avago Technologies Confidential...
  • Page 23 AE04 Datum to Bottom of Receptacle 2.09 0.10 AE10 Receptacle Body Width 19.94 0.08 Housing AE05 Snout Opening Width 21.60 0.05 AE11 Card Slot Width 18.20 0.05 AE06 Snout Width 23.10 0.08 AE12 Orientation Key Width 1.25 0.13 Avago Technologies Confidential...
  • Page 24 Row A to Row C 8.00 Basic AK05 Column to Column Pitch 1.60 Basic AK11 Row A to Row D 12.00 Basic AK06 Column to Column Pitch 0.80 Basic AK12 Locating Hole Diameter (Finished 2.20 0.05 PTH) Avago Technologies Confidential...
  • Page 25 Basic AH03 Bottom of Cutout to Peg 0.28 Basic AH02 Cutout Length 23.50 Basic AH04 Heat Sink interface and Case Temperature Measurement point on the Connector Plug Case Temperature Measurement Point Figure 16. Case Temperature Measurement point Avago Technologies Confidential...
  • Page 26 For product information and a complete list of distributors, please go to our web site: Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries. Data subject to change. Copyright © 2005-2013 Avago Technologies. All rights reserved.