Carbon Cortex-M3 User Manual

User guide for soc designer plus

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Carbon Cortex-M3 Model

User Guide for

SoC Designer Plus

Carbon Model Version 4.0.0

For the ARM Cortex-M3 Processor

Silicon Version: r2p0

Accuracy

The Trusted Path to

™

The information contained in this document is confidential information of Carbon Design Systems, Inc.,

and may not be duplicated or disclosed to unauthorized and/or third parties.

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Summary of Contents for Carbon Cortex-M3

Page 1 For the ARM Cortex-M3 Processor Silicon Version: r2p0 Accuracy The Trusted Path to ™ The information contained in this document is confidential information of Carbon Design Systems, Inc., and may not be duplicated or disclosed to unauthorized and/or third parties.
Page 2: Disclaimer Of Warranty
References to corporations, their services and products, are provided “as is” without warranty of any kind, either expressed or implied. In no event shall Carbon Design Systems be liable for any special, incidental, indirect or conse- quential damages of any kind, or any damages whatsoever, including, without limitation, those resulting from loss of use, data or profits, whether or not advised of the possibility of damage, and on any theory of liability, arising out of or in connection with the use or performance of this information.
Page 3: Technical Support
Technical Support If you have questions or problems concerning Carbon software, contact Technical Support. Phone Support Hours: Monday–Friday 9:00 am–5:00 pm EST Carbon Design Systems, Inc. 125 Nagog Park Acton, MA 01720 Voice: +1-978-264-7399 Asia: +81-3-5524-1288 Fax: +1-978-264-9990 Email: support@carbondesignsystems.com Web: www.carbondesignsystems.com...
Page 4 Carbon Design Systems, Inc. Confidential...
Page 5: Table Of Contents
Adding and Configuring the SoC Designer Plus Component ......1-4 Carbon SoC Designer Plus Component Files ....... . .1-4 Adding the Carbon Model to the Component Library .
Page 6 Contents Carbon Design Systems, Inc. Confidential...
Page 7: About This Guide
Preface A Carbon Model component is a library developed from ARM intellectual property (IP) that is generated through Carbon Model Studio™. The model then can be used within a virtual platform tool, for example, Carbon SoC Designer Plus. About This Guide This guide provides all the information needed to configure and use the Carbon Cortex- M3 Model in Carbon SoC Designer Plus.
Page 8 2. Also note the following references: • References to C code implicitly apply to C++ as well. • File names ending in .cc, .cpp, or .cxx indicate a C++ source file. Carbon Design Systems, Inc. Confidential...
Page 9 Preface Further reading This section lists related publications by Carbon and by third parties. Carbon SoC Designer Plus Documentation The following publications provide information that relate directly to SoC Designer Plus: • Carbon SoC Designer Plus Installation Guide • Carbon SoC Designer Plus User Guide •...
Page 10 Carbon’s graphical tool for generating, validating, and executing hardware- Studio accurate software models. It creates a Carbon Model, and it also takes a Car- bon Model as input and generates a Carbon component that can be used in SoC Designer Plus, Platform Architect, or OSCI SystemC for simulation.
Page 11: Using The Model Kit Component In Soc Designer Plus
Available Profiling Data 1.1 Cortex-M3 Functionality The Cortex-M3 processor is a low-power processor that features low gate count, low inter- rupt latency, and low-cost debug. It is intended for deeply embedded applications that require fast interrupt response features. The processor implements the ARMv7-M archi- tecture.
Page 12: Fully Functional And Accurate Features
Using the Model Kit Component in SoC Designer Plus 1.1.1 Fully Functional and Accurate Features The following features of the Cortex-M3 hardware are fully implemented in the Cortex- M3 model: • Cortex-M3 Integer Core • NVIC – Nested Vectored Interrupt Controller •...
Page 13: Differences From The Arm Rvml Model
The following differences exist between the Carbon Model and the older ARM® Real- View® Model Library model. • The Carbon model uses the AHB-Lite v2 port interface instead of the AHB v1 inter- face used by the RVML model. •...
Page 14: Features Additional To The Hardware
Adding the Component to the SoC Designer Canvas 1.2.1 Carbon SoC Designer Plus Component Files The component files are the final output from the Carbon Model Studio compile and are the input to SoC Designer Plus. There are two versions of the component; an optimized release version for normal operation, and a debug version.
Page 15: Adding The Carbon Model To The Component Library
1.2.2 Adding the Carbon Model to the Component Library The compiled Carbon Model component is provided as a configuration file (.conf). To make the component available in the Component Window in SoC Designer Canvas, per- form the following steps: 1.
Page 16: Adding The Component To The Soc Designer Canvas
Locate the component in the Component Window and drag it out to the Canvas. It will appear as shown in Figure 1-1. Figure 1-1 Cortex-M3 Components in SoC Designer Plus Additional ports are provided depending on the model RTL configuration file, default.conf, used to create the Model.
Page 17 PMU. extSemi Semihosting can be enabled by connecting this Output Transaction mas- port to the SoC Designer Plus semihost compo- nent, contained in the Carbon SoC Designer Plus Standard Model Library (v3.0 or greater). Carbon Design Systems, Inc. Confidential...
Page 18: Transaction Ports
PL301 in between. See the SoC Designer Plus AHBv2 Protocol Bundle User Guide for more information. There are a few AHBv2 sideband signals defined specifically for the Cortex-M3. See the AHBv2 Protocol Bundle User Guide for details on AHB Cortex-M3 extension signals.
Page 19: Clock Ports
1.4 Setting Component Parameters You can change the settings of all the component parameters in SoC Designer Canvas, and of some of the parameters in SoC Designer Simulator. To modify the Carbon component’s parameters: 1. In the Canvas, right-click on the Carbon component and select Component Informa- tion.
Page 20 When set to true, configures the proces- true, false false sor in big endian mode. Otherwise it works in little endian mode (default). Carbon DB Path Sets the directory path to the Carbon Not Used empty database file. DNOTITRANS When set to true, it disallows transac-...
Page 21 2. When enabled, SoC Designer Plus writes accumulated waveforms to the waveform file in the following sit- uations: when the waveform buffer fills, when validation is paused and when validation finishes, and at the end of each validation run. Carbon Design Systems, Inc. Confidential...
Page 22: Debug Features
Using the Model Kit Component in SoC Designer Plus 1.5 Debug Features The Cortex-M3 model has a debug interface (CADI) that allows the user to view, manipu- late, and control the registers and memory, and display disassembly for programs running on the model in the SoC Designer Plus simulator or any debugger that supports CADI, for example Model Debugger.
Page 23 R13_MAIN_MSP register read-write R13_PROCESS R13_PROCESS_PSP register read-write R13_ALT R13_ALT register read-write R14/Link Register (LR) read-write R15/PC (Program Counter) Register read-write XPSR Program Status Register read-write 1. Writeable at debuggable point only. Otherwise, a warning is printed. Carbon Design Systems, Inc. Confidential...
Page 24 Clear Enable96_127 register 0xE000E18C read-write (write does a ClearEnable96_127 clear enable) Clear Enable128_159 register 0xE000E190 read-write (write does a ClearEnable128_159 clear enable) Clear Enable160_191 register 0xE000E194 read-write (write does a ClearEnable160_191 clear enable) Carbon Design Systems, Inc. Confidential...
Page 25 (write does a ClearPend192_223 clear pend) Clear Pend224_239 register 0xE000E29C read-write (write does a ClearPend224_239 clear pend) ActiveBit0_31 Active Bit0_31 register 0xE000E300 read-only Active Bit32_63 register 0xE000E304 read-only ActiveBit32_63 Active Bit64_95 register 0xE000E308 read-only ActiveBit64_95 Carbon Design Systems, Inc. Confidential...
Page 26 ProcessorFeature1 Processor Feature 1 register 0xE000ED44 read-only DebugFeature Debug Feature register 0xE000ED48 read-only AuxiliaryFeature Auxiliary Feature register 0xE000ED4C read-only MemoryModelFeature0 Memory Model Feature 0 register 0xE000ED50 read-only MemoryModelFeature1 Memory Model Feature 1 register 0xE000ED54 read-only Carbon Design Systems, Inc. Confidential...
Page 27: Debug Registers
Table 1-7 MPU Registers Name Description Type MPUType MPU Type register read-only MPUControl MPU Control register read-write MPURegionNumber MPU Region Number register read-write MPUBaseAddr MPU Base Address register read-write MPURegionAtribute MPU Region Attribute register read-write Carbon Design Systems, Inc. Confidential...
Page 28 DWT Comparator 2 register read-write DWT_MASK2 DWT Mask 2 register read-write DWT_FUNCTION2 DWT Function 2 register read-write DWT_COMP3 DWT Comparator 3 register read-write DWT_MASK3 DWT Mask 3 register read-write DWT_FUNCTION3 DWT Function 3 register read-write Carbon Design Systems, Inc. Confidential...
Page 29: Run To Debug Point Feature
DWT_PCELLID3 register read-write The values shown for the DWT registers will only be valid if the Cortex-M3 is configured with the DEBUG_LEVEL and TRACE_LEVEL values set to the highest value (3). These values are set in the default.conf file when the Model was generated. Also, the DWT must be enabled via the debug exception and monitor control register (TRCENA).
Page 30: Memory Information
Figure 1-4 Cortex-M3 Memory View 1.5.4 Disassembly View Figure 1-5 shows the disassembly view of a program running on the Cortex-M3 model in SoC Designer Simulator. To display the disassembly view in the SoC Designer Simulator, right-click on the Cortex-M3 model and select View Disassembly… from the context menu.
Page 31: Available Profiling Data
Debug menu in the SoC Designer Simulator. Both hardware and software based profiling is available. 1.6.1 Hardware Profiling Hardware profiling includes just the Core Events stream. The buckets supported by this stream are shown in Table 1-10. Table 1-10 Cortex-M3 Profiling Events Stream Buckets Core Events Exception...
Page 32 1-22 Using the Model Kit Component in SoC Designer Plus Carbon Design Systems, Inc. Confidential...
Page 33 Third Party Software Acknowledgement Carbon acknowledges and thanks the respective owners for the following software that is used by our product: • ELF (Executable and Linking Format) Tool Chain Product Copyright (c) 2006, 2008-2012 Joseph Koshy All rights reserved. Redistribution and use in source and binary forms, with or without modification, are per- mitted provided that the following conditions are met: 1.
Page 34 Carbon Design Systems, Inc. Confidential...