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DRS4 Evaluation Board User's Manual
DRS4 Evaluation Board
User's Manual

Board Revision 1.1

as of Dec. 2008
Last revised: Dec. 15, 08
Stefan Ritt
Paul Scherrer Institute
CH-5232 Villigen PSI
Switzerland
Email:
stefan.ritt@psi.ch
Phone: +41 56 310 3728
Please check for possible updates of this manual under http://drs.web.psi.ch/datasheets

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Summary of Contents for PSI DRS4

  • Page 1: Board Revision

    User’s Manual Board Revision 1.1 as of Dec. 2008 Last revised: Dec. 15, 08 Stefan Ritt Paul Scherrer Institute CH-5232 Villigen PSI Switzerland Email: stefan.ritt@psi.ch Phone: +41 56 310 3728 Please check for possible updates of this manual under http://drs.web.psi.ch/datasheets...
  • Page 2: Revision History

    DRS4 Evaluation Board User’s Manual Revision History Date Modification 12 Dec. 08 Initial Revision 15 Dec. 08 Added firmware register mapping Page 2 of 21...
  • Page 3: Table Of Contents

    2.2. Linux ........................11 Development Hints......................14 3.1. Power Supply ......................14 3.2. Analog Input......................15 3.3. Control Voltages ....................15 3.4. ADC Clock......................15 DRS4 Evaluation Board Schematics................16 Please check for possible updates of this manual under http://drs.web.psi.ch/datasheets...
  • Page 4: Introduction

    DRS4 Evaluation Board User’s Manual 1. Introduction The DRS4 chip, which has been designed at the Paul Scherrer Institute, Switzerland by Stefan Ritt and Roberto Dinapoli is a Switched Capacitor Array (SCA) capable of digitizing eight channels at sampling speeds up to 6 GSPS. This chip is available through the PSI technology transfer program for other institutes and organizations.
  • Page 5: Firmware Description

    Both the Windows and the Linux distribution contain a subdirectory “firmware” which contains the FPGA and Microcontroller firmware for the DRS4 Evaluation Board. The FPGA firmware is written in pure VHDL, thus making it easy to port it to other FPGA devices such ®...
  • Page 6: While The Mapping Of The Status Registers Is Like This

    CY7C68014A/* Remaining files are standard files from EZ-USB development The FPGA firmware implements a set of control and status registers, through which the DRS4 can be controlled and read out. The mapping of the control registers is as follows: Ofs.
  • Page 7: Installation

    DRS4 Evaluation Board User’s Manual All registers are implemented as 32-bit registers, so they can be mapped easily into some VME address space for example if one decides to build a VME board containing the DRS4. 2. Installation 2.1. Windows XP ®...
  • Page 8 DRS4 Evaluation Board User’s Manual Then you can select the installation directory: After the installer has finished, you can connect the DRS4 Evaluation Board to the Computer: Now you will see the “Found New Hardware” dialog: Where you can click “Install the software automatically” and then click “Next”.
  • Page 9 And a new group in your Start Menu: Clicking on „DRS Command Line Interface“ will start a simple application which connects to the DRS4 Evaluation Board. If it finds the board, it displays the board serial number and the firmware revision as on the following screen shot: Now you are ready to issue your first command “info”...
  • Page 10 You can select the trigger mode, trigger level and trigger source. On Rev. 1.1 of the DRS4 evaluation board, only CH1 can be selected as trigger source. You enable a channel by clicking on the number “1” to “4”. There are two cursors and a few utilities.
  • Page 11: Linux

    If this package is present, you can change to the drs directory and issue a make: [/usr/local]$ cd drs-1.0 [/usr/local/drs-1.0]$ make g++ -g -O2 -Wall -Wuninitialized -fno-strict-aliasing -Iinclude -DOS_LINUX Please check for possible updates of this manual under http://drs.web.psi.ch/datasheets...
  • Page 12 -DHAVE_LIBUSB -c src/mxml.c . . . Now you can connect the DRS4 board to the PC. On systems where the “lsusb” tool is installed, one should be able to find the DRS4 evaluation board after connecting it with following command: [/usr/local/drs-1.0]$ /sbin/lsusb -d 04b4:1175 –v...
  • Page 13 DMODE single shot Frequency: 0.000 GHz If this works, the oscilloscope application “drsosc” can be started. It will open a X window and show exactly the same functionality as its Windows counterpart: Please check for possible updates of this manual under http://drs.web.psi.ch/datasheets...
  • Page 14: Development Hints

    DRS4 Evaluation Board User’s Manual 3. Development Hints The idea behind the evaluation board is to make first steps in using the DRS4 chip, but then develop your own custom electronics around the chip. The first thing to do there is to study carefully the DRS4 data sheet, which can be obtained from http://drs.web.psi.ch/datasheets.
  • Page 15: Analog Input

    750 MHz. The peaking can be reduced by adding a series resistor of a few Ohm between the buffer output and the DRS4 input. The usual design rules like proper termination and matched impedance PCB traces apply as in any high frequency analog design.
  • Page 16: Drs4 Evaluation Board Schematics

    DRS4 Evaluation Board User’s Manual 4. DRS4 Evaluation Board Schematics Page 16 of 21...
  • Page 17 DRS4 Evaluation Board User’s Manual Please check for possible updates of this manual under http://drs.web.psi.ch/datasheets...
  • Page 18 DRS4 Evaluation Board User’s Manual Page 18 of 21...
  • Page 19 DRS4 Evaluation Board User’s Manual Please check for possible updates of this manual under http://drs.web.psi.ch/datasheets...
  • Page 20 DRS4 Evaluation Board User’s Manual PROG_B HSWAP_EN VCCO VCCO VCCAUX VCCAUX VCCINT VCCINT 51 I/O 52 I/O-CLK2 53 I/O-CLK3 I/O-CLK7 54 VCCO I/O-CLK6 55 I/O-CLK0 VCCO 125 56 I/O-CLK1 I/O-CLK5 57 I/O I/O-CLK4 58 I/O/INIT_B 59 I/O 60 I/O VCCINT...
  • Page 21 DRS4 Evaluation Board User’s Manual Please check for possible updates of this manual under http://drs.web.psi.ch/datasheets...

Table of Contents