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AK - 44
CHASSIS
Furthermore, pilot levels and identification signals can be evaluated internally with subsequent switching between
mono/ stereo/bilingual; no I2C interaction is necessary (Automatic Sound Selection). The MSP 34x0G can handle very
high FM deviations even in conjunction with NICAM processing. This is especially important for the introduction of
NICAM in China. The ICs are produced in submicron CMOS technology.
Sound IF1
Sound IF2
2
I
S1
2
I
S2
SCART1
SCART2
SCART3
SCART4
MONO
Figure 3. Simplified functional block diagram of the MSP 34x0G.
24C08
General description
The 24C08 is a 8 Kbit electrically erasable programmable memory (EEPROM), organized as 4 blocks of 256 * 08 bits.
The memory operates with a power supply value as low as 2.5 V.
Features
Minimum 1 million ERASE / WRITE cycles with over 10 years data retention
Single supply voltage: 4.5 to 5.5 V
Two wire serial interface, fully I²C-bus compatible
Byte and Multi-byte write (up to 8 bytes)
Page write (up to 16 bytes)
Byte, random and sequential read modes
Self timed programming cycle
Pinning, Pin Value
1. Write protect enable: 0 V
2. Not connected: 0 V
3. Chip enable input: 0 V
4. Ground: 0 V
5. Serial data address input/output: Input LOW voltage: Min: -0.3 V, Max: 0.3 * Vcc: Input HIGH voltage: Min:
0.7* Vcc, Max: Vcc+1
6. Serial clock: Input LOW voltage: Min: -0.3 V, Max: 0.3 * Vcc: Input HIGH voltage: Min: 0.7 * Vcc, Max: Vcc+1
7. Multibyte/Page write mode: Input LOW voltage: Min: -0.3 V, Max: 0.5 V: Input HIGH voltage: Min: Vcc - 0.5,
Max: Vcc + 1
8. Supply voltage: Min: 2.5 V, Max: 5.5 V
De-
Pre-
ADC
modulator
processing
Prescale
SCART
DSP
Input
ADC
Prescale
Select
Loud-
speaker
DAC
Sound
Processing
Headphone
Sound
DAC
Processing
DAC
SCART
DAC
Output
Select
20
Loud-
speaker
Subwoofer
Headphone
2
I
S
SCART1
SCART2
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