Circuit Description - Toshiba CN27E90 Technical Training Manual

N5ss (tg-1, c) chassis
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3-3. Circuit Description

In the N5SS chassis, the off drive system is employed.
(1) When Q1 inside Q501 is turned on, Q402 base is
forward biased through 9 V
VCC)
pin 23 of Q501 (H. Out)
divider, and then, Q402 collector current flows through
125V
R416
T401. In this case, the H output
transistor Q404 turns on with the base-emitter reverse
biased because of the off drive system employed.
(2) On the contrary, when Q1 inside IC501 is off (pin 8 is
0V), base-emitter bias of Q402 becomes 0V and Q402
turns off, and a collector pulse as shown in Fig. 11-5
develops at the collector.
The voltage is stepped down and Q404 is forward
biased with this voltage, thus turning on Q404.
(3) In this way, by stepping down the voltage developed at
primary winding of the drive transformer and by
applying it to Q404, a sufficient base current flows into
Q404 base, thereby switching the Q404.
Q501
22
Q1
23
pin 22 of Q501 (H.
R411/R410 resistor
H. Vcc
D490 C431
R411
R410
H drive
transistor
9V
T401
H drive
transistor
C417
1
R415
2
C43
Q402
+
R416
C416
+125V
Fig. 11-5
73
3
Q404
H output
transistor
4
V1
V2
VCP
Q402
Q402
ON
OFF
0V
0V

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