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NuDAQ PCI-8554 User Manual

Multi-functions counter / timer card
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PCI-8554
Multi-functions
Counter / Timer Card
User s Guide
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  • Page 1 NuDAQ PCI-8554 Multi-functions Counter / Timer Card User s Guide Recycled Paper...
  • Page 3 Trademarks NuDAQ, DAQBench are registered trademarks of ADLINK Inc., Other product names mentioned herein are used for identificati on purposes only and may be trademarks and/or registered trademarks...
  • Page 4 Customer Satisfaction is always the most important thing for ADLINK Tech Inc. If you need any help or service, please contact us and get it. ADLINK Technology Inc. http://www.adlink.com.tw Web Site http://www.adlinktechnology.com Sales & Service service@adlink.com.tw NuDAQ nudaq@adlink.com.tw NuDAM nudam@adlink.com.tw Technical NuIPC nuipc@adlink.com.tw...

  • Page 5: Table Of Contents

    1.4.4 DAQBenchTM: ActiveX Controls ............7 Chapter 2 Installation .............8 What You Have ..............8 Unpacking ................8 PCB Layout of PCI-8554 ............9 Default Jumper Setting............10 PCI-8554 Installation Outline..........10 Device Installation for Windows Systems....... 11 Pin Assignment of Connector ..........12 Clock System ..............
  • Page 6 Timer / Counter Clock Mode Control........29 Digital Input Registers ............29 Digital Output Register............29 Chapter 4 Signal Connections & Applications....30 Connectors Pin Assignment ..........30 Digital I/O Connection ............31 Timer / Counter Connection ..........32 Frequency Generator ............33 Pulse Width Measurement ...........

  • Page 7: How To Use This Guide

    How to Use This Guide This manual is designed to help you use the PCI-8554. The manual describes how to modify various settings on the PCI-8554 card to meet your requirements. It is divided into 5 chapters: Chapter 1, "Introduction," gives an overview of the product features, applications, and specifications.

  • Page 9: Chapter 1 Introduction

    Introduction PCI-8554 is a general-purpose counter / timer and digital I/O card. This card have four 8254 chips on board, so it provides twelve 16 bits down counter or frequency dividers. This card has multi -configurations. The counters can be set as independent counter or cascaded counter.

  • Page 10: Features

    E _ I N T system Figure 1.1. Block diagram of the PCI-8554 Features The PCI-8554 Counter / Timer and digital I/O Card provides t h e following advanced features: Four 8254 chips provide twelve 16 bits down counters Multi-configurations of counters / timers: Flexible setting for each independent counter, the clock source could be external, internal or cascaded.
  • Page 11 The second interrupt source comes from external source. 100-pin SCSI-II female connector. PCI-Bus Introduction...

  • Page 12: Applications

    Applications Event counter Frequency generator Frequency synthesizer Pulse width measurement Low level pulse generator Time delay Industry automation Watchdog timer Specifications Programmable Counter / Timer Device : 82C54x4 Number of Counters /timers: 10 independent timers / counters Cascaded 32-bit counters with fixed 8MHz internal clock Counter mode: 16-bit down counter Maximum input frequency: 10MHz Clock sources of independent counters:...
  • Page 13 Humidity: 5 ~ 95%, non-condensing Power Consumption: +5 V @ 350 mA typical Dimension: 134mm(L) X 107mm(W) Introduction...

  • Page 14: Software Supporting

    Software Supporting ADLINK provides versatile software drivers and packages for users’ different approach to built-up a system. We not only provide programming library such as DLL for many Windows systems, but ® also provide drivers for many software package such as LabVIEW HP VEE , DASYLab , InTouch...

  • Page 15: Pcis-Lview: Labview® Driver

    ® 1.4.2 PCIS-LVIEW: LabVIEW Driver PCIS-LVIEW contains the VIs, which are used to interface with NI’s ® LabVIEW software package. The PCIS-LVIEW supports Windows ® 95/98/NT/2000. The LabVIEW drivers are free shipped with the board. You can install and use them without license. For detail information about PCIS-LVIEW, please refer to the user’s guide in the CD.(\\Manual_PDF\Software\PCIS-LVIEW) 1.4.3...

  • Page 16: Chapter 2 Installation

    Installation This chapter describes the configurations and multi -functions of the PCI-8554 and teach user to install PCI-8554. At first, the contents in the package and unpacking information that you should care about are described, then versatile configurations of PCI-8554 are introduced so that you can configure it according to your applications.

  • Page 17: Pcb Layout Of Pci-8554

    Note: DO NOT APPLY POWER TO THE CARD IF IT HAS BEEN DAMAGED. You are now ready to install your PCI-8554. PCB Layout of PCI-8554 This layout will be modified after jumper layout finished.

  • Page 18: Default Jumper Setting

    To operate the PCI-8554 correctly, users should understand the structure of PCI-8554 and details of the possible configurations. The block diagram of the PCI-8554 is shown in chapter 1. It contains the clock system, counters confederation, interrupt system and PCI controller.

  • Page 19: Device Installation For Windows Systems

    Device Installation for Windows Systems Once Windows 95/98/2000 has started, the Plug and Play function of Windows system will find the new NuDAQ/NuIPC cards. If this is the first time to install NuDAQ/NuIPC cards in your Windows system, you will be informed to input the device information source. Please refer to the “Software Installation Guide”...

  • Page 20: Pin Assignment Of Connector

    Pin Assignment of Connector (51) (1) +12V (26) GND (51) GND (76) ECLK9 (52) (53) (2) +12V (27) GND (52) GOUT2 (77) COUT8 (3) +12V (28) GND (53) GIN2 (78) GATE8 (4) Vcc (29) GND (54) GND (79) ECLK8 (5) Vcc (30) GND (55) GOUT1 (80) COUT7...

  • Page 21: Clock System

    Clock System The clock system of PCI-8554 provides the internal clock source for the 8254 chips. The clock of counter / timer #1 ~ #10 can be one of the 4 sources: external clock source or cascaded source from the ‘last’...

  • Page 22: Counters Architecture

    Counters Architecture There are four 8254 chips on PCI-8554 card. The counters on chip #1 ~ #4 are labeled from counter #1 to counter #12. Counters #11 and #12 are cascaded counters, and counter #1~ #10 can be programming to independent or cascaded counters. Table 2.2 illustrates the relationship between the reference number of chips and the counters number.
  • Page 23 8254 Chip #2 8254 Chip #1 CLK4 CLK1 COUT4 COUT1 Counter #4 Counter #1 GATE4 GATE1 CLK2 CLK5 COUT2 COUT5 Counter #5 Counter #2 GATE2 GATE5 CLK3 CLK6 COUT6 COUT3 Counter #6 Counter #3 GATE6 GATE3 8254 Chip #4 8254 Chip #3 CLK10 CLK7 COUT10...
  • Page 24 Cascaded Counters The connection of Counter #11 and #12 are different from other independent counters. These two counters are named as cascaded counters because the clock sources of counter #11 come from fixed 8 MHz and its output are cascaded to counter #12. In fact, counter #11and #12 are designed for frequency divider by using 8254's square wave generator mode.
  • Page 25 8254 Chip #1 CLK1 COUT1 Counter #1 GATE1 CLK2 COUT2 Counter #2 GATE2 Cascaded Counters Output selectable by function "_SET_cntCLK_ " Figure 2.7 Example of ‘user programmable cascaded counters’ Installation...

  • Page 26: Clock Source Configurations

    2.10 Clock Source Configurations For every independent counter, four signals can be chosen as clock source by software . The clock source of counter #n comes from either external clock source (ECLK n) or the cascaded counter output (COUTn-1) or CK1 or COUT10. ( Note: 1.The clock source of the cascaded counters #11 is fixed to C8M and counter #12 is fixed to COUT11 2.
  • Page 27 The internal clock sources CK1 comes from the clock system C8M or COUT11, selected by function “_8554_SET_CK1”, and counters can be set to cascaded mode, then clock source comes from the output of the counter with smaller channel number. For example, the COUT1 is cascaded to CLK2, the COUT3 is cascaded to CLK4.

  • Page 28: Gate Control Configurations

    2.11 Gate Control Configurations The gate control signals of the independent counters are internally pulled high hence they are default enable if no external gate used. When the external gate signals are used, the counters can be used to measure pulse width. Therefore, the time interval of the counter gate can be precisely controlled and frequency measurement is possible.

  • Page 29: Debounce System

    2.13 Debounce System Debounce system is used to eliminate bounce phenomenon. If external clock is used, user can set jumper JP1 ~ JP11 to select if debounce system is used or not used. If debounce system is used, the debounce output signal will be the same state as the input only if the input signal keep the same state for four DB_CLK, otherwise the input signal will be treated as glitch and the debounce output signal will keep previous state, figure 2.11 show you the how to set these...
  • Page 30 DB_CLK input signal output signal glitch is eliminated Figure 2.13 Basic theorem of debounce system Installation...

  • Page 31: Interrupt System

    2.14 Interrupt System The PCI-8554‘s interrupt system is a powerful and flexible system, which is suitable for many applications. The system is a Dual Interrupt System. The dual interrupt means the hardware can generate two interrupt request signals at the same time and the software can service these two request signals by ISR.
  • Page 32 PCI bus, the two IRQ sources must be distinguished by ISR of the application software if the two IRQ are all used. The application software can use the “_8554_GET_IRQ_Status” function to distinguish which interrupt is inserted and servicing that IRQ then users must clear current IRQ to allow the next IRQ coming in.

  • Page 33: Digital Input And Output

    2.15 Digital Input and Output To program digital I/O operation is fairly straight forward. The digital input operation is just to read data from the corresponding registers, and the digital output operation is to write data to the corresponding registers. The digital I/O registers‘ format are shown in section 3.4 and 3.5.

  • Page 34: Chapter 3 Registers Format

    Registers Format The detailed descriptions of the registers format are specified in this chapter. This information is quite useful for the programmers who wish to handle the card by low-level programming. However, we suggest user have to understand more about the PCI interface then start any low-level programming.

  • Page 35: I/O Address Map

    PCI PnP BIOS, it may cause resource confliction in your system. I/O Address Map All the PCI-8554 registers are 8 bits. The users can access these registers by 8 bits I/O instructions. The following table shows the registers map, including descriptions and their offset addresses relative to the base address.

  • Page 36: Timer/Counter Registers

    Timer/Counter Registers The 8254 occupies 4 I/O address locations in PCI-8554 as shown blow. Users can refer to Tundra's or Intel's data sheet for a full description of the 8254 features. You can download the data sheet for a full description of the 8254 features on the following web site: “http://support.intel.com/support/controllers/peripheral/231164.htm”...

  • Page 37: Timer / Counter Clock Mode Control

    Timer / Counter Clock Mode Control There are total twenty two bits on PCI-8554 to select clock source of Timer / Counter #1 ~ #10 and CK1 and debounce clock. Address : BASE + 0x10 ~ 0x12 Attribute : write only...

  • Page 38: Chapter 4 Signal Connections & Applications

    PCI-8554. including the signal connection between the PCI-8554 and external devices Connectors Pin Assignment The PCI-8554 comes equipped with a 100 pin SCSI-II female connector (CN1). The CN1 is located at the rear plate. The pin assignment of the connector is illustrated in the Figure 2.1. . Refer to section 2.1 for details of pin assignment.

  • Page 39: Digital I/O Connection

    Digital I/O Connection The PCI-8554 provides 8 digital input and 8 digital output channels through the connector CN1. The digital I/O signals are fully TTL compatible. Digital Input(DI) From TTL Devices Digital Output (DO) To TTL Devices Outside Device ACL-8454 PCI-8554 Figure 4.1 Digital I/O Connection...

  • Page 40: Timer / Counter Connection

    Timer / Counter Connection The PCI-8554 has four 8254 chips on board. It can offer 10 independent 16-bit programmable down counters and cascaded counters. To implement your application, you can following the procedure to design your application and connect the signals.

  • Page 41: Frequency Generator

    Frequency Generator Example 1: To generate a 250 K Hz Square Wave. step 1: To use fixed clock source because the output is a fixed frequency. step 2: Internal 8M Hz is suitable to generate 250K Hz frequency. Use Counter #1 for this application. 250 KHz = 8 M Hz / 32 step 3: Skip these steps.
  • Page 42 set by function "_8554_SET_CK1" set by function "8554_SET_cntCLK" ECK1 8254 Chip #1 8MHz COUT1 Counter #1 COUT11 COUT10 set by function "8554_SET_cntCLK" ECK2 8254 Chip #1 COUT1 COUT2 Counter #2 COUT10 set by function "8554_SET_cntCLK" ECK3 8254 Chip #1 COUT2 COUT3 Counter #3 COUT10...

  • Page 43: Pulse Width Measurement

    Pulse Width Measurement Example : To measure pulse width step 1: To use fixed clock source as base time interval (or base frequency). step 2: Assume Internal 2M Hz clock is used. The time base is t = 1/2M=5x10e-7 sec The count range for measuring pulse width is: t <...

  • Page 44: Frequency Measurement

    Frequency Measurement Example: To measure frequency around 1~100 K Hz step 1: This application need two counters. One counter is used to generate a pulse whose time interval is very precise. The pulse is used to enable the other counter (counting counter) by gate control.
  • Page 45 set by function set by function "_8554_SET_cntCLK" "_8554_SET_CK1" Precise ECK2 Time 8254 Chip #1 Interval COUT1 8MHz COUT2 Counter #2 COUT11 COUT10 ECLK1 set by function ( frequency to "_8554_SET_cntCLK" be measured ) ECK1 debounce 8254 Chip #1 system COUT1 Counter #1 COUT10 DB_CLK...

  • Page 46: Event Counter

    Event Counter Example: To count external event in 1 sec step 1: This application needs one counter to generate a time base of 1 sec and the second counter to count the event. The cascaded counter #11, #12. can perform the watchdog timer.

  • Page 47: Dual Interrupt System

    Dual Interrupt System One Internal plus one external interrupt sources The PCI-8554 provides double interrupt sources which is very useful in some application. For example, most of the application needs a watchdog timer to monitor the system periodically, hence, an IRQ channel is used.

  • Page 48: Chapter 5 C/C++ Library

    C/C++ Library This chapter describes the software library for operating this card. Only the functions in DOS library and Windows 95 DLL are described. Please refer to the PCIS-DASK function reference manual, which included in ADLINK CD, for the descriptions of the Windows 98/NT/2000 DLL functions.

  • Page 49: Programming Guide

    Programming Guide 5.2.1 Naming Convention The functions of the NuDAQ PCI cards or NuIPC CompactPCI cards’ software driver are using full-names to represent the functions' real meaning. The naming convention rules are: In DOS Environment: _{hardware_model}_{action_name}. e.g. _8554_Initial() . In order to recognize the difference between DOS library and Windows 95 library, a capital "...

  • Page 50: 8554_Initial

    The PCI-8554 cards are initialized by this function. The software library could be used to control multiple PCI-8554 cards. Because PCI-8554 is in PCI bus architecture and meets the plug and play specifications, the IRQ and I/O address are assigned by system BIOS directly.

  • Page 51: 8554_Write_Counter

    _8554_Write_Counter @ Description User can directly write command to counter #1 ~ #12 by this function. Using this function, user can assign the counter number 1~12 directly without care about the chips number and other details. @ Syntax C/C++ (DOS) U16 _8554_Write_Counter (U16 cardNo, U16 cntNo, U16 mode, U16 cntrVal) C/C++ (Windows 95)

  • Page 52: 8554_Read_Counter

    _8554_Read_Counter @ Description User can directly read counter information by this function. @ Syntax C/C++ (DOS) U16 _8554_Read_Counter (U16 cardNo,U16 cntNo,U16 *mode,U16 *cntrVal) C/C++ (Windows 95) U16 W_8554_Read_Counter (U16 cardNo,U16 cntNo,U16 *mode,U16 *cntrVal) Visual Basic (Windows 95) W_8554_Read_Counter (ByVal cardNo As Integer, ByVal cntNo As Integer, mode As Integer, cntrVal As Integer) As Integer @ Arguments cardNo:...

  • Page 53: 8554_Stop_Counter

    _8554_Stop_Counter @ Description User can directly stop counter by this function. This function will stop counter by setting counter to mode 5. @ Syntax C/C++ (DOS) U16 _8554_Stop_Counter (U16 cardNo,U16 cntNo,U16 *cntrVal) C/C++ (Windows 95) U16 W_8554_Stop_Counter (U16 cardNo,U16 cntNo,U16 *cntrVal) Visual Basic (Windows 95) W_8554_Stop_Counter (ByVal cardNo As Integer, ByVal cntNo As Integer, cntrVal As Integer) As Integer...

  • Page 54: 8554_Read_Status

    _8554_Read_Status @ Description User can directly read current counter status by this function. @ Syntax C/C++ (DOS) U16 _8554_Read_Status (U16 cardNo, U16 cntNo, U16 * cntrVal, U16 *status) C/C++ (Windows 95) U16 W_8554_ Read_Status (U16 cardNo, U16 cntNo, U16 * cntrVal, U16 *status) Visual Basic (Windows 95) W_8554_Read_Status (ByVal cardNo As Integer, ByVal cntNo As...
  • Page 55 _8554_DO @ Description To write a 8 bits data to the digital output port. @ Syntax C/C++ (DOS) U16 _8554_DO (U16 cardNo, U16 doData) C/C++ (Windows 95) U16 W_8554_DO (U16 cardNo, U16 doData) Visual Basic (Windows 95) W_8554_DO (ByVal cardNo As Integer, ByVal doData As Integer) As Integer @ Arguments cardNo:...

  • Page 56: 8554_Set_Cntclk

    5.10 _8554_SET_cntCLK @ Description To select 8254 counter #1 ~ #10 clock source.( Clock source of counter #11 is 8MHz and clock source of counter #12 is from COUT11, both clock source are fixed. ) @ Syntax C/C++ (DOS) U16 _8554_DI (U16 cardNo, U16 cntNo, U16 clkMODE) C/C++ (Windows 95) U16 W_8554_DI (U16 cardNo, U16 cntNo, U16 clkMODE) Visual Basic (Windows 95)

  • Page 57: 8554_Set_Ck1

    5.11 _8554_SET_CK1 @ Description To select source of CK1. @ Syntax C/C++ (DOS) U16 _8554_SET_CK1 (U16 cardNo, U16 selCK1) C/C++ (Windows 95) U16 W_8554_SET_CK1 (U16 cardNo, U16 selCK1) Visual Basic (Windows 95) W_8554_SET_CK1 (ByVal cardNo As Integer, ByVal selCK1 As Integer) As Integer @ Arguments cardNo:...

  • Page 58: 8554_Set_Int_Control

    5.13 _8554_Set_INT_Control @ Description The PCI-8554 has dual interrupts system. Two interrupt sources can be generated and be checked by the software. This function is used to select and control PCI-8554 interrupt sources. The interrupt source can be set as from counter #12 output COUT12 (INT1) or external interrupt signal EXTINT (INT2).

  • Page 59: 8554_Get_Irq_Status

    5.14 _8554_Get_IRQ_Status @ Description The PCI-8554 has dual interrupts system. Two interrupt sources can be generated and be checked by the software. This function is used to distinguish which interrupt is inserted if both INT1 and INT2 interrupts are used.

  • Page 60: 8554_Int_Enable

    5.15 _8554_INT_Enable @ Description This function is only available in Windows 95 driver. This function is used to start up the interrupt control. After calling this function, every time an interrupt request signal generated, a software event is signaled. So that in your program, you can use wait operation to wait for the event.

  • Page 61: 8554_Clr_Irq1

    5.17 _8554_CLR_IRQ1 @ Description This function is only needed in DOS driver. It is used to clear interrupt request which is requested by INT1. You should use this function to clear interrupt request status, otherwise the new coming interrupt will not be generated. @ Syntax C/C++ (Windows 95) U16 _8554_CLR_IRQ1 (U16 cardNo)

  • Page 62: Product Warranty/Service

    Product Warranty/Service Seller warrants that equipment furnished will be free form defects in material and workmanship for a period of one year from the confirmed date of purchase of the original buyer and that upon written notice of any such defect, Seller will, at its option, repair or replace the defective item under the terms of this warranty, subject to the provisions and specific exclusions listed herein.

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