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2.1.7 SUB (CHASSIS) CPU PIN FUNCTION (IC7001 : MN102H60KPA) [DIGITAL SIGNAL PWB ASS'Y]
Pin
Port
Pin name I/O
1 P60
LB PRO
O Not use
2 P61
P MU
O Picture muting [Muting = H]
3 P62/FUNC LED JP_CSB
O Not use (NC)
4 P63
A MU
O Audio muting [Muting = H]
5 P50
M MU
O Audio muting (for AUDIO OUT) [Muting = H]
6 P51/PC SW
PC SEL
O Not use : RGB(PC) INPUT select
7 P52/DIMMER
ON_TIMER
O POWER INDICATOR (LED) brightness
LED
8 P53/BL ON
ILA0
O Not use : LCD back light lighting
9 P54/BL 5060
ILA1
O Not use : LCD panel overshoot refresh timing
10 P55
ILA2
O Not use
11 P56
POW LED
O POWER LED lighting [ON = H]
12 P57
WORD
O Not use
13 SBT2
MI_CK
I
14 SBI2
MI_TX
I
15 SBO2
MI_RX
O Data transmission for SUB (OSD) CPU
16 P23/REQ
MI_REQ
O Data request for SUB (OSD) CPU communication
17 VDD
3.3V
I
18 PB0
FOSC
O Not use (NC)
19 VSS
GND
20 XI
3.3V
I
21 XO
O Not use : Low speed oscillatior
22 VDD
3.3V
I
23 OSCI
OSCI
I
24 OSCO
OSCO
O System clock osillation (crystal) : 16MHz
25 MODE
3.3V
I
26 P24
BS1.5CTL
O Not use : Digital tuner power / reset control
27 P25
A92 RST
O Reset for IC1001(3D YC SEP / COLOR
28 P26
BS RST
O Not use: Reset for Digital tuner power / reset
29 P27
LIP RST
O Not use: Reset for Sound delay (Lip sync)
30 KI0
SOFT_OFF
O Not use
31 KI1
VMUTE
I
32 KI2
VOUTENB
O No use : Video cutoff for digital tuner
33 P33
MDR CON
I
34 AVDD
3.3V
I
35 P34
O Not use : Digital tuner power control
36 P35
DSYNC SW2 O Sync select for DIGITAL-IN [Cotrolled with 99-pin]
37 P36
LB_POW
O Not use : Power control for low bias line
38 P37
O Not use (NC)
39 P40
HOTPLUG
I
40 P41
MECA SW
I
41 P42
MAIN POW
O Main power control [ON = L]
42 P43
VARI/FIX
O AUDIO OUT output mode select [VARI ABLE = L]
43 VREF-
I
44 AN4/EE
AFT2
I
45 AN5
AFT1
I
46 AN6
KEY2
I
47 AN7
KEY1
I
48 P80
O Not use (NC)
49 P81
O Not use (NC)
50 TM0IO
AC IN
I
Function
[LOW = L]
Clock for SUB (OSD) CPU communication
Data receive for SUB (OSD) CPU communication
communication
[Request = L]
3.3V power supply
Ground
Not use : Low speed oscillatior
3.3V power supply
System clock osillation (crystal) : 16MHz
Single chip mode
DEMODULAT) [Reset = H]
control
No use : Picture muting request from digital tuner
No use : System cable connection monitor for PDP
3.3V power supply
Not use : Video communiation monitor for receiver
unit (PDP)
Mechanical monitor for POWER switch
[Push = L]
Not use
Not use : AFT voltage for sub tuner
AFT voltage for VHF/UHF tuner
Key scan data for front switc (MENU/CH+/CH-)
Key scan data for front switch (VOL+/VOL-)
AC power pulse for timer clock
Pin
Port
Pin name
I/O
51 SBI3
BS TXD
O Not use : Data transmission for digital tuner
52 SBO3
BS RXD
I
53 P85
O Not use (NC)
54 VREF+
3.3V
I
55 SBI4
PDP TX
O Data transmission for SUB (DRIVE) CPU
56 SBO4
PDP RX
I
57 P90
SDA0
I/O Data for Inter IC (serial) bus : EEP-ROM (IC7002)
58 P91
SCL0
O Clock for Inter IC (serial) bus : EEP-ROM (IC7002)
59 P92
SDA DVI
I/O Not use : Data for Inter IC (serial) bus for panel
60 P93
SCL DVI
O Not use : Clock for Inter IC (serial) bus for panel
61 AVSS
GND
62 AN0/DIN PH DIGII_PHOT
I
63 AN1
ATSC REC
I
64 AN2
I
65 AN3
I
66 VDD
3.3V
I
67 P70/DIN PRO DIGI_PRO
O
68 P71
O Not use (NC)
69 P72
O Not use (NC)
70 P73
SYNC SEL
O Not use : Sync select for digital tuner
71 SBI1
O Not use (NC)
72 SBO1
O Not use (NC)
73 *
SBD5
I/O Not use : Data for writing on board
74 *
SBT5
I
75 NMI
3.3V
I
76 IRQ0
COMP
I
77 IRQ1
REMOCON
I
78 IRQ2
V SYNC
I
79 IRQ3
WAKEUP SHM
I
80 IRQ4
POWERGOOD
I
81 PA5/REC
LAMP LED
O LAMP LED lighting [Lighting = H]
LED
82 VDD
RST
I
83 RST
3.3V
I
84 P00
SCL3A
O Clock for Inter IC (serial) bus control :
85 P01
SDA3A
I/O Data for Inter IC (serial) bus control :
86 P02
SCL3B
O Clock for Inter IC (serial) bus control :
87 P03
SDA3B
I/O Data for Inter IC (serial) bus control :
88 P04/DIN SEL DIGI_SYNCSEL O Not use
89 P05
LR SW
O
90 P06/DIN INT DIGI_INT
I
91 P07
DVI RST
O Not use : Reset for DVI format conversion
92 VSS
GND
93 P10
SCL5055
O Clock for Inter IC (serial) bus :
94 P11/BS CLK
VFORMATSEL
O Not use : Digital tuner clock control
SEL
95 P12
SDA5055
I/O Data for Inter IC (serial) bus :
96 P13
OSD MODE SEL O Not use : OSD mode select
97 P14
O Not use (NC)
98 P15
15K/OTH
O Main video select [Fixed H]
99 P16
DSYNC SW1
O Sync select for DIGITAL-IN [Cotrolled with 36-pin]
100 P17
JCC5057 BUSY
I
Function
communication
Not use : Data receive for digital tuner
communication
3.3V power supply
communication
Data receive for SUB (DRIVE) CPU
communication
communication
communication
Ground
Photo sensor for DIGITAL-IN illegal copy
protection
Not use
Not use
Not use
3.3V power supply
for DIGITAL-IN (HDMI)
(connect CN01P : for Frash ROM type)
Not use : Clock for writing on board
(connect CN01P : for Frash ROM type)
3.3V power supply
AV COMPULINK áV control
Remote control
V. sync pulse
Reset for sub(chassis) CPU
Power error detection [NG = H]
Reset for MAIN CPU [Reset = L]
3.3V power supply
for DIGITAL-IN (HDMI)
Reset for HDMI process [Reset = ]
Ground
JCC5055 (DIST process)
JCC5055 (DIST process)
Busy monitor for JCC5057 (New DIST process)
(No.YA092B)1-9
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