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Formosa Industrial Computing MBM-530NS User Manual

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MBM-530NS
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Summary of Contents for Formosa Industrial Computing MBM-530NS

  • Page 1 MBM-530NS User’s Manual...

  • Page 2: Copyright Notice

    Formosa Industrial Computing, Inc. (“FIC”). Copyright 2001 Formosa Industrial Computing, Inc. All rights reserved. No part of this manual, including the products and software described in it. Trademarks Products and corporate names appearing in this manual may or may not be registered trademarks or copyrights of their respective companies, and are used only for identification or explanation and to the owners’...

  • Page 3: Safety Precautions

    MBM-530NS Product Name: English, 1 edition (E0301-R01) Manual Version: C251-530NS-FIC Document Part No.: March 2001 Release Date: Printed in Taiwan MBM-530NS User’s Manual...
  • Page 4 MBM-530NS User’s Manual...
  • Page 5 Web site: www.formosa21.com Formosa Industrial Computing, Inc. Sales: Address: 8F-6, No. 351, Sec. 2, Chung Shan Rd., Chung Ho City, Taipei, Taiwan 235 Telephone: +886-2-3234-7000 Fax: +886-2-2226-9623 E-mail: ipcsales@nfic.com.tw Technical Support: Address: 8F-6, No. 351, Sec. 2, Chung Shan Rd., Chung Ho City, Taipei,...

  • Page 6: Table Of Contents

    JP2: CMOS Clear ................45 JP3: LCD Connector ..............46 JP4: LCD Power VDD Select ............47 JP5: External Reset Switch ............48 JP6: COM2 Power Select ............. 49 S1: COM2 RS-232, RS-422, RS-485 Selection ......50 MBM-530NS User’s Manual...
  • Page 7 4.12 Save & Exit Setup ................93 4.13 Exit Without Save ................93 4.14 Flash BIOS Writer Utility..............94 4.14.1 Backup BIOS to file ............94 4.14.2 Update BIOS from file ............95 SPECIFICATION ..................97 PROGRAMMING RS-485............... 99 SUPPORT FACILITATION..............102 MBM-530NS User’s Manual...

  • Page 9: Overview

    Features 0.1 Introduction The MBM-530NS is new generation half-size CPU board. This card offers much greater performance than the older cards, such as support for four RS-232C ports and one 168-pin DIMM socket for up to 128MB of extended memory SDRAM.

  • Page 10: Packing List

    0.2 Packing List Some accessories are included with the system. Before you begin installing your MBM-530NS board, take a moment to make sure that the following items have been included inside the MBM-530NS package. n MBM-530NS all-in-one single CPU board...

  • Page 11: Features

    Programmable watchdog timer n AWARD Flash BIOS n Multi-layer PCB for noise reduction n 2 COM ports: 1 of the 2 is switchable to RS-485/ RS-422/RS-232 n Supports IrDA compatible transmissions n Dimensions: 140mm X 145mm MBM-530NS User’s Manual -11-...

  • Page 13: System Controller

    Serial Port n Parallel Port 1.1 Microprocessor The MBM-530NS uses the NS GX1-300 CPU (or other GX1 CPUs); it is an advanced 64-bit x86 compatible processor offering high performance, fully accelerated 2D graphics, a 64-synchronous DRAM controller and a PCI bus controller, all on a single chip.

  • Page 14: Dma Controller

    1.2 DMA Controller The equivalent of two 8237A DMA controllers are implemented on the MBM-530NS board. Each controller is a four -channel DMA device that will generate the memory addresses and control signals necessary to transfer information directly between a peripheral device and memory. This allows high speed information transfer with less CPU intervention.

  • Page 15: Keyboard Controller

    Therefore, another byte of data will not be sent to keyboard controller until acknowledgment is received for the previous byte sent. The “output buffer full” interruption may be used for both send and receive routines. MBM-530NS User’s Manual -15-...

  • Page 16: Interrupt Controller

    1.4 Interrupt Controller The equivalent of two 8259 Programmable Interrupt Controllers (P IC) are included on the MBM-530NS board. They accept requests from peripherals, resolve priorities on pending interrupts in service, issue interrupt requests to the CPU, and provide vectors which are used as acceptance indices by the CPU to determine which interrupt service routine to execute.

  • Page 17: I/O Port Address Map

    380-38F SDLC, bisynchronous 3A0-3AF Bisynchronous 3B0-3BF Monochrome display and printer port 3 (LPT 3) 3C0-3CF EGA/VGA adapter 3D0-3DF Color/graphics monitor adapter 3E8-3EF Serial port 3 (COM 3) 3F0-3F7 Diskette controller 3F8-3FF Serial port 1 (COM 1) MBM-530NS User’s Manual -17-...

  • Page 18: Real-Time Clock And Non-Volatile Ram

    1.4.2 Real-Time Clock and Non-Volatile RAM The MBM-530NS contains a real-time clock compartment that maintains the date and time in addition to storing configuration information about the computer system. It contains 14 bytes of clock and control registers and 114 bytes of general purpose RAM.

  • Page 19: Timer

    Web site: www.formosa21.com 1.4.3 Timer The MBM-530NS provides three programmable timers, each with a timing frequency of 1.19 MHz. Timer 0 The output of this timer is tied to interrupt request 0. (IRQ 0) Timer 1 This timer is used to trigger memory refresh cycles.

  • Page 20: Serial Port

    Divisor latch (least significant byte) base + 1 Divisor latch (most significant byte) (1) Receiver Buffer Register (RBR) Bit 0-7: Received data byte (Read Only) (2) Transmitter Holding Register (THR) Bit 0-7: Transmitter holding data byte (Write Only) -20- MBM-530NS User’s Manual...
  • Page 21 7 Bits 8 Bits Bit 2: Number of Stop Bit (STB) Bit 3: Parity Enable (PEN) Bit 4: Even Parity Select (EPS) Bit 5: Stick Parity Bit 6: Set Break Bit 7: Divisor Latch Access Bit (DLAB) MBM-530NS User’s Manual -21-...
  • Page 22 Bit 2: Training Edge Ring Indicator (TERI) Bit 3: Delta Receive Line Signal Detect (DSLSD) Bit 4: Clear to Send (CTS) Bit 5: Data Set Ready (DSR) Bit 6: Ring Indicator (RI) Bit 7: Received Line Signal Detect (RSLD) -22- MBM-530NS User’s Manual...
  • Page 23 Bit 5 Bit 13 Bit 6: Bit 6 Bit 14 Bit 7: Bit 7 Bit 15 Desired Divisor Used to Baud Rate Generate 16x Clock 1200 1800 2400 3600 4800 9600 14400 19200 28800 38400 57600 115200 MBM-530NS User’s Manual -23-...

  • Page 24: Parallel Port

    Latch through the Data Swapper by reading the Data Swapper address. (4) Printer Status Buffer The system microprocessor can read the printer status by reading the address of the Printer Status Buffer. The bit definitions are described as follows: -ERROR SLCT -ACK -BUSY -24- MBM-530NS User’s Manual...
  • Page 25 The system microprocessor can read the contents of the printer control latch by reading the address of printer control swapper. Bit definitions are as follows: STROBE AUTO FD XT INIT SLDC IN IRQ ENABLE DIR(write only) MBM-530NS User’s Manual -25-...
  • Page 26 Bit 1: A1 causes the printer to line-feed after a line is printed. Bit 0: A0.5 microsecond minimum highly active pulse clocks data into the printer. Valid data must be present for a minimum of 0.5 microseconds before and after the strobe pulse. -26- MBM-530NS User’s Manual...

  • Page 27: Hardware Configuration

    Place the jumper over the two pins designated for the desired setting. Press the jumper evenly onto the pins. Be careful not to bend the pins. We will show the locations of the MBM-530NS jumper pins, and the factory-default settings as below.

  • Page 28: Jumper & Connector Quick Reference Table

    CMOS Clear ..................JP2 LCD Connector ................JP3 LCD Power VDD Select ..............JP4 External Reset Switch ..............JP5 PS2 Keyboard / Mouse ...............CN1 Printer Port ..................CN2 COM2 ...................CN3 Multi Sound Panel Connector.............CN4 Hard Disk Connector ..............CN5 PC/104 Connector................CN6 & 7 -28- MBM-530NS User’s Manual...

  • Page 29: Block Diagram

    Geode USB1 CS5530A USB2 AC97 CODEC ISA BUS BIOS PC/104 PARALLEL NS PC97317 MOUSE PORT KEYBOARD SUPER I/O COM1 COM2 TTLI/O FLOPPY IrDA Title BLOCK DIAGRAM Size Document Number <Doc> Date: Monday, February 05, 2001 Sheet MBM-530NS User’s Manual -29-...

  • Page 30: Component Locations

    2.3 Component Locations The MBM-530NS is an all-in-one Cyrix GXM-200 CPU board. This section provides the hardware’s jumper settings, the connectors’ locations, and the pin assignments. The #1 pin assignments have all been designed on the right side of the board with a “block” indication on the diagram.

  • Page 31: How To Set The Jumper

    If a jumper has three pins, for example, labeled PIN1, PIN2, and PIN3, you can either connect PIN1 & PIN2 to create one setting and shorting or connect PIN2 & PIN3 to create another setting. The jumper setting rules are applied throughout this manual. MBM-530NS User’s Manual -31-...

  • Page 32: System Clock Select And Cpu Setting

    2.5 System Clock Select and CPU Setting Table 1: CPU Core versus Core Frequency Characteristics Core System Freq. Core Freq. GX1 Series Voltage Clock Multiplier 300B-85-2.0 2.0V 33MHz 300MHz -32- MBM-530NS User’s Manual...

  • Page 33: Jumper Setting

    Web site: www.formosa21.com 2.6 Jumper Setting J1: Power Connector The J1 is a 4-pin power connector; it connects the power +5V and +12V to apply MBM-530NS power. 8 7 6 5 4 3 2 1 1: 12V 2: GND 3: GND 4: 5V MBM-530NS User’s Manual...

  • Page 34: J2: Ttl I/O

    1: TTL Output Port 1 2: TTL Output Port 2 3: TTL Input Port 1 4: TTL Input Port 2 5: GND TTL Input Demo Program #include <stdio.h> #include <stdlib.h> #include <dos.h> #define GPIO20 0x01 //GPIO20 -34- MBM-530NS User’s Manual...
  • Page 35 = inportb(Data_Reg); PMBAR = ((unsigned)mBAR <<8) + ((unsigned)lBAR); PM_Index_Reg = inportb(PMBAR + 0x00); //GPIO ports function enable PM_Data_Reg = inportb(PMBAR + 0x01); outportb(PM_Index_Reg, 0x01); GPIO_En = inportb(PM_Data_Reg); outportb(PM_Index_Reg, 0x01); outportb(PM_Data_Reg, (GPI O _En | 0x80)); MBM-530NS User’s Manual -35-...
  • Page 36 (port_Select & 0x7F)); // outportb((GPIOBAR + 0x05), 0x80); //set port2 input direction tmpData = inportb(GPIOBAR + 0x04) & GPIO20; if (tmpData == GPIO20) printf("GPIO20 is at HIGH state \n"); else printf("GPIO20 is at LOW state.\n"); -36- MBM-530NS User’s Manual...
  • Page 37 Dev_Index = 0x07, GPIO_Num = 0x07, PM_Num = 0x08; unsigned char tmpData; void main(void) { unsigned char mBAR,lBAR,PM_Index_Reg,PM_Data_Reg,GPIO_En,port_Select,CFGDAT; unsigned PMBAR,GPIOBAR; outportb(Index_Reg, Dev_Index); //Choose Logical Dev. PM outportb(Data_Reg, PM_Num); outportb(Index_Reg, 0x30); //Enable PM register access outportb(Data_Reg, 0x01); MBM-530NS User’s Manual -37-...
  • Page 38 0x01); outportb(PM_Data_Reg, (GPIO_En | 0x80)); outportb(Index_Reg, Dev_Index); //Choose Logical Dev. GPIO outportb(Data_Reg, GPIO_Num); outportb(Index_Reg, 0x30); //Enable GPIO register access outportb(Data_Reg, 0x01); outportb(Index_Reg, 0x60); //GPIO Base address MSB mBAR = inportb(Data_Reg); outportb(Index_Reg, 0x61); //GPIO Base address LSB -38- MBM-530NS User’s Manual...
  • Page 39 //set port3 output direction tmpData = inportb(GPIOBAR + 0x04); outportb((GPIOBAR + 0x04),(tmpData | GPIO37));//GPIO37 = 1 tmpData = inportb(GPIOBAR + 0x04) & GPIO37; if (tmpData != GPIO37) printf("GPIO37 is at LOW status.\n"); else printf("GPIO37 is at HIGH status.\n"); MBM-530NS User’s Manual -39-...

  • Page 40: J3: Cd Audio In Connector

    The J3 is used to connect to a multi sound panel connector .It consist of a line in, a line out, and a microphone 8 7 6 5 4 3 2 1 1: CD In (L) 2: GND 3: GND 4: CD In (R) -40- MBM-530NS User’s Manual...

  • Page 41: J4: Floppy Connector

    -STEP OUTPUT CURRENT PULSE NOT USED -WRITE DATA NOT USED -WRITE ENABLE -INDEX -TRACK 0 -MOTOR ENABLE A -WROTE PROTECT -DRIVE SELECT B -READ DATA -DRIVE SELECT A -SIDE 1 SELECT -MOTOR ENABLE B -DISK CHANGE MBM-530NS User’s Manual -41-...

  • Page 42: J5: Vga Connector D-Sub

    DB1 (CRT Connector) Green Blue 13 Horizontial Sync 14 Vertical Sync 4, 9, 11, 12, & 15 Not used 5 & 10 Ground 6, 7 & 8 AGND 8 7 6 5 4 3 2 1 -42- MBM-530NS User’s Manual...

  • Page 43: J6: Irda Connector

    This selection should be selected in the BIOS (The best setting is to use “Standard”). 1: 5V 1 2 3 4 5 2: NC 3: RXD 4: GND 5: TXD 8 7 6 5 4 3 2 1 MBM-530NS User’s Manual -43-...

  • Page 44: Jp1: Lcd Backlight Control

    JP1: LCD Backlight Control 8 7 6 5 4 3 2 1 1: Backlight 3 2 1 2: GND 3. 12V Output -44- MBM-530NS User’s Manual...

  • Page 45: Jp2: Cmos Clear

    Web site: www.formosa21.com JP2: CMOS Clear 8 7 6 5 4 3 2 1 3 2 1 3 2 1 Clear CMOS Normal MBM-530NS User’s Manual -45-...

  • Page 46: Jp3: Lcd Connector

    13: GND 33: GND 14: NC 34: D4 15: NC 35: D5 16: NC 36: D6 17: NC 37: D7 18: GND 38: LCD Power VDD 19: D8 39: Output Enable 20: D9 40: LCD Power VDD -46- MBM-530NS User’s Manual...

  • Page 47: Jp4: Lcd Power Vdd Select

    Web site: www.formosa21.com JP4: LCD Power VDD Select 8 7 6 5 4 3 2 1 1 2 3 1 2 3 3.3V MBM-530NS User’s Manual -47-...

  • Page 48: Jp5: External Reset Switch

    JP5: External Reset Switch The switch is act as the MBM-530NS system reset control. The extra reset control can be done by JP5, which connect to an external reset switch. Shorting these two pins will reset the system. 8 7 6 5 4 3 2 1...

  • Page 49: Jp6: Com2 Power Select

    Web site: www.formosa21.com JP6: COM2 Power Select 8 7 6 5 4 3 2 1 1 2 3 1 2 3 MBM-530NS User’s Manual -49-...

  • Page 50: S1: Com2 Rs-232, Rs-422, Rs-485 Selection

    S1: COM2 RS-232, RS-422, RS-485 Selection The RS-232C interface on the MBM-530NS is used DSUB-9 COM port connector (COM1). COM2 uses on-board 10-pin pinhead connectors (CN3). To configure them, use the BIOS Setup program (covered later section). The switch S1 for choosing between RS-232, RS-422 and RS-485 can adjust COM 2.

  • Page 51: Cn2: Printer Port

    To use the parallel port, an adapter cable has been connected to the CN2 (26-pin header type) connector. This adapter cable is mounted on a bracket and is included in your MBM-530NS package. The connector for the parallel port is a 25-pin D-type female connector.

  • Page 52: Cn3: Com2 Connector

    CN3: COM2 Connector The RS -232C interface on the MBM-530NS is used DSUB-9 COM port connector (COM1). COM2 uses on-board 10-pin pinhead connectors (CN3). To configure them, use the BIOS Setup program (covered later section). The switch S1 for choosing between RS-485, RS-422 and RS-232C can adjust COM 2.

  • Page 53: Cn4: Multi Sound Panel Connector

    8 7 6 5 4 3 2 1 1: GND 6: Line In (R) 2: MIC In 7: Line Out (L) 3: Line Out (R) 8: GND 4: GND 9: GND 5: GND 10: Line in (L) MBM-530NS User’s Manual -53-...

  • Page 54: Cn5: Hard Disk Connector

    16 DATA 14 37 CS 0 38 SA1 17 DATA 0 18 DATA 15 39 HD LED A 40 NOT USED 19 GROUND 20 NOT USED 41 VCC 42 VCC 21 IDEDRQA 22 GROUND 43 GROUND 44 GROUND -54- MBM-530NS User’s Manual...

  • Page 55: Cn6 & Cn7: Pc-104 Connector

    The Unlatched Address line The DMA Acknowledges 0 to 5-7 [Output] [Input/Output] run from bit 17 to 23 3, 5 to 7 are the corresponding acknowledge signals for DRQ 0 to 3 and 5 to 7 MBM-530NS User’s Manual -55-...
  • Page 56 The Memory Read signal is The Zero Wait State indicates [Input/Output] low while any memory location [Input, Open to the microprocessor that the is being read collector] present bus cycle can be completed without inserting additional wait cycle -56- MBM-530NS User’s Manual...

  • Page 57: U11: Diskonchip Socket

    8 7 6 5 4 3 2 1 DiskOnChip Socket DOC Memory Address Select This section provides the information about how to use the DOC (DiskOnChip). 1. The address of DiskOnChip is DC000H. 2. Insert programmed DiskOnChip into socket U11 setting as DOC. MBM-530NS User’s Manual -57-...

  • Page 59: Software Utility

    Web site: www.formosa21.com 3. SOFTWARE UTILITY 3.1 Driver File List There are three directories in the MBM-530NS Driver CD. Following is the details of every directory. RSET8139 [DIR] 8139c.cfg pg8139.exe rset8139.exe VGAAUDIO [DIR] cryix.exe license.pdf RTL8139 [DIR] Brom[DIR] Client32[DIR] Dmi[DIR]...

  • Page 60: Install Vga And Audio Driver

    3.2 Install VGA and Audio Driver The MBM-530NS provides video and audio function drivers for the WIN95 and WIN98, the driver can auto -setup in the WIN95 or WIN98 mode. 1. Change directory to the [VgaAudio]. 2. Execute the file Cryix.exe, the system will auto setup the video and audio functions.

  • Page 61: Bios Setup

    Load BIOS Defaults n Load Setup Defaults n Integrated Peripherals Features Setup n Supervisor/User Password Setting n IDE HDD Auto Detection n Save & Exit Setup n Exit Without Saving n Flash BIOS Writer Utility MBM-530NS User’s Manual -61-...

  • Page 62: Bios Configuration

    4.1.1 Award BIOS The MBM-530NS SBC is equipped with an AWARD BIOS (Basic Input and Output System). The BIOS setup utility is a segment of codes/routines residing in the BIOS Flash ROM. (The SBC supports a programmable Flash ROM chip, 3 Volt.

  • Page 63: Entering The Award Bios Setup Menu

    CMOS SETUP UTILITY main program screen will appear with the following options. This Main Menu contains several setup options and two exit choices. Use the arrow keys to select among the items and press <Enter> to accept and enter the sub-menu. BIOS Setup Main Menu MBM-530NS User’s Manual -63-...

  • Page 64: Bios Configuration

    • IDE HDD auto detection Automatically configure hard disk parameters. • Save & exit setup Save CMOS value settings to CMOS and exit setup. • Exit without saving Abandon all CMOS value changes and exit setup. -64- MBM-530NS User’s Manual...

  • Page 65: Control Keys

    Option Page Setup Menu. Load the default CMOS value from BIOS default table, <F6> only for Option Page Setup menu. <F7> Load the default <F8> Reserved <F9> Reserved <F10> Save all the CMOS changes, only for Main menu MBM-530NS User’s Manual -65-...
  • Page 66 These defaults have been carefully chosen to provide the absolute maximum performance and reliability. Even a slightest change to the chipset setup may jeopardize the booting of your system. -66- MBM-530NS User’s Manual...

  • Page 67: Standard Cmos Setup

    User-configurable fields appear in a different color. If you need information in the selected field, press <F1>. The help menu will then appear to provide you with the information you need. The memory display at the lower right of the screen is read-only and automatically adjusts accordingly. MBM-530NS User’s Manual -67-...
  • Page 68 Secondary channels for connecting up to four IDE hard disks or other IDE devices. Each channel can support up to two hard disks; the first of which is the “master” and the second is the “slave”. -68- MBM-530NS User’s Manual...
  • Page 69 MS-DOS and is very uncommon. Most IDE drives over 528MB support the LBA mode. Type Drive Type CYLS Number of Cylinders HEADS Number of Heads PRECOMP Write Pre-Compensation LANDOZONE Landing Zone SECTORS Number of Sectors MODE Mode Type MBM-530NS User’s Manual -69-...
  • Page 70 EGA, VGA, SEGA, SVGA or PGA monitor adapters. CGA 40 Color Graphics Adapter, power up in 40 column mode CGA 80 Color Graphics Adapter, power up in 80 column mode Monochrome adapter includes high-resolution MONO monochrome adapters. -70- MBM-530NS User’s Manual...
  • Page 71 The BIOS is the most frequent user of this RAM area since this is where it shadows RAM MBM-530NS User’s Manual -71-...

  • Page 72: Bios Features Setup

    BIOS will halt the system and the following message will display. If this occurs, you can either allow the operation to continue or use a bootable anti-virus floppy disk to restart and investigate the system. -72- MBM-530NS User’s Manual...
  • Page 73 A complete test of the system is done on each test. If this field is Enable, BIOS will shorten or skip some check items during POST. Enabled Enabled quick POST Disabled Normal POST MBM-530NS User’s Manual -73-...
  • Page 74 360K. Boot Up NumLock Status (On) This allows you to determine the default status of the numeric keypad. By default, the System boots with NumLock on. Keypad is number keys Keypad is arrow keys -74- MBM-530NS User’s Manual...
  • Page 75 6; other settings are 8, 10, 12, 15, 20, 24 and 30. 6 characters per second 8 characters per second 10 characters per second 12 characters per second 15 characters per second 20 characters per second 24 characters per second 30 characters per second MBM-530NS User’s Manual -75-...
  • Page 76 To disable security, select “PASSWORD SETTING” at BIOS Setup “Main Menu” and then just type nothing but press <Enter> for the password. Once the security is disabled, you can boot the system and enter the Setup freely. -76- MBM-530NS User’s Manual...
  • Page 77 This item allows the system to locate video BIOS from ROM to RAM for better video performance. However, it is an optional feature depending on the chipset and video BIOS design. Enabled Video shadow is enabled Disabled Video shadow is disabled MBM-530NS User’s Manual -77-...
  • Page 78 RAM. To enable this feature, a specific shadowing address is necessary. An example of such ROM shadowing would be the support of onboard SCSI. Enabled Optional shadow is enabled Disabled Optional shadow is disabled Cyrix 6x86/MII CPUID (Enabled). -78- MBM-530NS User’s Manual...

  • Page 79: Chipset Features Setup

    This field controls the CAS latency time in HCLK of 2/2 or 3/3. The value in this field is set according to the DRAM installed. Do not change the value in this field unless you change specification of the installed DRAM or CPU. The Choice: 2, 3. MBM-530NS User’s Manual -79-...
  • Page 80 These options specify the length of the delay (in BUSCLK) inserted between consecutive 8-bit/16-bit I/O operations. USB Controller (Disabled) If you do not use the onboard USB feature, it allows you to disable it. The options are: Enabled, Disabled (Default). -80- MBM-530NS User’s Manual...

  • Page 81: Power Management Setup

    Allow you to set each mode individually. When not User Defined disabled, each of the ranges is from 1 min. to 1 hr. except for HDD Power Down, which ranges from 1 min to 15 min. and disable. MBM-530NS User’s Manual -81-...
  • Page 82 When the system enters Doze mode, the CPU clock runs only part of the time. You may select the percentage of time that the clock runs. The Choices: 12.5%, 25.0%, 37.5%, 50.0%, 62.5%, and 75.0% Ring Power On LAN Control (Disabled) Net Power On Controller (Disabled) RTC Alarm Controller (Disabled) -82- MBM-530NS User’s Manual...

  • Page 83: Pnp/Pci Configuration

    The Plug-and-Play BIOS can automatically configure all the boot and Plug-and-Play compatible devices. If you select “Auto”, all the interrupt request (IRQ) and DMA assignment fields disappear, when the BIOS automatically arrange the assignments. The Choice: Auto and Manual. MBM-530NS User’s Manual -83-...
  • Page 84 The Choice: Enabled and Disabled. PCI IRQ Actived By (Level) We suggest that you set this to its default configuration unless you are a qualified technician. The options are: Level (Default), Edge. -84- MBM-530NS User’s Manual...

  • Page 85: Load Bios Defaults

    To load the “BIOS defaults”, highlight “Load BIOS Defaults” on the main menu and then press <Enter>. The system displays a confirmation message on the screen. Press <Y> and then <Enter> to load BIOS defaults. Press <N> and then <Enter> to abort. Load BIOS Default MBM-530NS User’s Manual -85-...

  • Page 86: Load Setup Defaults

    To load the “Setup defaults”, highlight “Load Setup Defaults” on the main menu and then press <Enter>. The system displays a confirmation message on the screen. Press <Y> a nd then <Enter> to load Setup defaults. Press <N> and then <Enter> to abort. Load Setup Default -86- MBM-530NS User’s Manual...

  • Page 87: Integrated Peripherals Features Setup

    These four fields allow you to set PIO mode for each IDE device according to their different mode timing. Modes 0 through 4 provide successively increased performance. Choosing “Auto” mode will enable auto-detection to ensure optimal performance. MBM-530NS User’s Manual -87-...
  • Page 88 This item sets the I/O address and IRQ line for the on-board parallel port connector. You can install an I/O card to support extra parallel port, if there is no conflict in the address assignments. The Choice: 378H/IRQ7, 278H/IRQ5, 3BCH/IRQ7, Disabled. -88- MBM-530NS User’s Manual...
  • Page 89 This item allows you to determine which display mode of VGA adapter. The Choice: M/B First, PCI First, No onboard Flat Panel Resolution Caution: The BIOS setup for integrated peripherals, it is supported flat panel resolution either 640x480 or 800x600 mode at DOS mode. MBM-530NS User’s Manual -89-...
  • Page 90 “Security Option” in “3-7 BIOS Features Setup. If the “Security Option” is set to “System”, the password will be required both at “boot” and at “entry to Setup”. If this is adjusted to “Setup”, “Password Prompt” only occurs -90- MBM-530NS User’s Manual...
  • Page 91 Web site: www.formosa21.com when user tries to enter Setup utility. MBM-530NS User’s Manual -91-...

  • Page 92: Ide Hdd Auto Detection

    Press <N> to reject the presented settings and enter the correct ones manually from the Standard CMOS Setup screen. -92- MBM-530NS User’s Manual...

  • Page 93: Save & Exit Setup

    4.13 Exit Without Save Abandon all CMOS value changes and exit setup. To exit without saving, highlight the “Exit Without Saving” option on the main menu and then press <Enter>. BIOS CMOS will retain the original setting. MBM-530NS User’s Manual -93-...

  • Page 94: Flash Bios Writer Utility

    4.14 Flash BIOS Writer Utility Use AWDFLASH.EXE file in the “FIC SBC Driver & Utility CD for MBM-530NS” to update your system BIOS. Please follow the procedure below to backup and update your system BIOS. 4.14.1 Backup BIOS to file 1.

  • Page 95: Update Bios From File

    “Programming Flash Memory – 1FF00 ok” will be shown on the screen. 9. Take the “BIOS Update Diskette” out of floppy drive and then re-boot your system. 10. You may hold down <Delete> to adjust the new BIOS setup now. MBM-530NS User’s Manual -95-...

  • Page 97: Specification

    * KB + Mouse: PS/2 Keyboard and Mouse with On board connector. * BIOS: Award BIOS (256KB, including VGA BIOS). * Real Time Clock: Built-in RTC with Backup Battery * Power Management: Supports I/O Peripherals Power Saving / Doze / Standby / Suspend Modes satisfying APM1.2 Compliant. MBM-530NS User’s Manual -97-...
  • Page 98 * Power Req.: +5V/2A and 12V/0.5A (Max) * CE Design-In: Add EMI Components to COM ports, Parallel Port, Keyboard, and PS/2 Mouse. * PC Board: 6 layers. * Dimensions: PC/104 Bus and PCI Slot, 140mm x 145mm -98- MBM-530NS User’s Manual...

  • Page 99: Programming Rs-485

    RS-485 are the same.) Step 2: Disable TXC (transmitter control), the bit 0 of the address of offset+4 just sets at “0”. NOTE: This is to control the MBM-530NS CPU card’s DTR signal to the RS-485’s TXC communication. MBM-530NS User’s Manual...
  • Page 100 “0”. Step 4: Disabled the TXC signal, and the bit 0 of the address of offset+4 sets at “0”. (4) Receive data The RS-485’s operation of receiving data is the same as the RS-232’s. -100- MBM-530NS User’s Manual...
  • Page 101 OUT &H3FC, (INP(&H3FC) AND &HEF) RETURN c.) Receive one character from COM2 REM Check COM2: receiver buffer IF LOF(1)<256 THEN 70 REM Receiver buffer is empty INPSTR$” RETURN REM Read one character from COM2: buffer INPSTR$=INPUT$(1,#1) RETURN MBM-530NS User’s Manual -101-...

  • Page 102: Support Facilitation

    //GPIO11 #define Count03 0x04 //GPIO12 #define WDT_EN_IO 0x443 //IO for Enable WDT #define WDT_DIS_IO0x441 //IO for Disable WDT unsigned Index_Reg = 0x002E, Data_Reg = 0x002F; unsigned char Dev_Index = 0x07, GPIO_Num = 0x07, PM_Num = 0x08; -102- MBM-530NS User’s Manual...
  • Page 103 PMBAR = ((unsigned)mBAR <<8) + ((unsigned)lBAR); PM_Index_Reg = inportb(PMBAR + 0x00); //GPIO ports function enable PM_Data_Reg = inportb(PMBAR + 0x01); // outportb(PM_Index_Reg, 0x01); GPIO_En = inportb(PM_Data_Reg); // outportb(PM_Index_Reg, 0x01); outportb(PM_Data_Reg, (GPIO_En | 0x80));// outportb(Index_Reg, Dev_Index); //Choose Logical Dev. GPIO MBM-530NS User’s Manual -103-...
  • Page 104 //GPIO Base address MSB mBAR = inportb(Data_Reg); outportb(Index_Reg, 0x61); //GPIO Base address LSB lBAR = inportb(Data_Reg); GPIOBAR = ((unsigned)mBAR <<8) + ((unsigned)lBAR); outportb((GPIOBAR + 0x01), 0x0f); //set output direction CFGDAT=i; outportb(GPIOBAR,CFGDAT); //Setting WDT count outportb(WDT_EN_IO,0xFF); //Enable WDT -104- MBM-530NS User’s Manual...

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