1. Manuals
  2. Brands
  3. Diamond Systems Manuals
  4. Processor
  5. HERCULES-EBX HRC400-5A128
  6. User manual

Diamond Systems HERCULES-EBX HRC400-5A128 User Manual

High integration ebx cpu with ethernet and data acquisition
Hide thumbs
Table of Contents

Advertisement

Quick Links

GF
HERCULES-EBX™
High Integration EBX CPU
with Ethernet and Data Acquisition
Models HRC400-5A128, HRC550-5A128, HRC550-5N128, HRC750-5A256
User Manual
Document # 765800
Revision 1.02
 Copyright 2003
Diamond Systems Corporation
8430-D Central Ave.
Newark, CA 94560
Tel (510) 456-7800
www.diamondsystems.com

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the HERCULES-EBX HRC400-5A128 and is the answer not in the manual?

Questions and answers

Summary of Contents for Diamond Systems HERCULES-EBX HRC400-5A128

  • Page 1 HERCULES-EBX™ High Integration EBX CPU with Ethernet and Data Acquisition Models HRC400-5A128, HRC550-5A128, HRC550-5N128, HRC750-5A256 User Manual Document # 765800 Revision 1.02  Copyright 2003 Diamond Systems Corporation 8430-D Central Ave. Newark, CA 94560 Tel (510) 456-7800 www.diamondsystems.com...

  • Page 2: Table Of Contents

    HERCULES-EBX High-Integration EBX CPU with Ethernet and Data Acquisition TABLE OF CONTENTS ..........................6 ESCRIPTION ............................. 7 EATURES ......................9 ERCULES OARD RAWING I/O H ..........................11 EADERS PC/104 Bus Connectors ......................11 PC/104+ Bus Connector ......................12 PS/2 Connector – J6........................ 14 Utility Connector –...
  • Page 3 8.2.1 RS-232 Mode ............................51 8.2.2 RS-485 Mode ............................51 PS/2 Ports..........................52 USB Ports..........................52 ..........53 OTES ON PERATING YSTEMS AND OOTING ROCEDURES Windows Operating Systems Installation Issues ..............53 9.1.1 Driver installation ...........................53 9.1.2 BIOS Settings for Windows ........................53 9.1.3 CompactFlash Under Windows.......................54 DOS Operating Systems Installation Issues ................
  • Page 4 ......................... 108 LASH ODULE 18.1 Installing the Flashdisk Module .................... 108 18.2 Configuration ........................108 18.3 Using the Flashdisk with Another IDE Drive ............... 108 18.4 Power Supply ........................108 “U ” B ........................109 TILITY OARD ....................110 CQUISITION OARD 20.1 Connecting the DAQ Test Board ..................
  • Page 5 Table 23: J28 – LCD Backlight Connector Pinout ................29 Table 24: J29 – Main Power Input Connector Pinout ..............30 Table 25: J30 – Optional High-Voltage Power Input Pinout ............31 Table 26: J19 – PC/104+ (PCI) VIO Power Selection ..............36 Table 27: J33 – DAQ Test Point Pinout..................38 Table 28: System Resources ......................39 Table 29: I/O COM3/4 Control Register Definition .................40 Table 30: Crisis Recovery Loopback....................47...

  • Page 6: Description

    Both the ISA and PCI buses are brought out to expansion connectors for the connection of add-on boards. Diamond Systems manufactures a wide variety of compatible PC/104 add-on boards for analog I/O, digital I/O, counter/timer functions, serial ports, and power supplies.

  • Page 7: Features

    2. FEATURES System Features Processor Section ♦ Via Eden Processor running at 400MHz with integrated math co-processor ♦ Pentium-class platform including SDRAM and PCI-based IDE controller and USB Core System ♦ 128MB SDRAM system memory (standard) ♦ 100MHz memory bus ♦...
  • Page 8 Data Acquisition Subsystem Analog Input ♦ 32 single-ended / 16 differential inputs, 16-bit resolution ♦ 250KHz maximum aggregate A/D sampling rate ♦ Programmable input ranges/gains with maximum range of ±10V / 0-10V ♦ Both bipolar and unipolar input ranges ♦ 5 ppm/ C drift accuracy ♦...

  • Page 9: Hercules Board Drawing

    3. HERCULES BOARD DRAWING Hercules-EBX CPU User Manual V1.02 Page 9...
  • Page 10 I/O Connectors with locations (pin 1 relative to upper-left mounting hole) PC/104 8-bit bus connector (2.700, -5.050 in) PC/104 16-bit bus connector (3.500, -5.250 in) PC/1-4+ PCI bus connector (3.100, -2.112 in) PS/2 Header (6.945, -5.015 in) Utility Header (7.240, -5.320 in) Data Acquisition Digital I/O Header (7.570, -2.620 in) Data Acquisition (Analog) Header...

  • Page 11: I/O Headers

    4. I/O HEADERS All cables mentioned in this chapter are included in Diamond Systems’ cable kit C-HRCEBX-KIT. These cables are further described in chapter 22. Some cables are also available individually. 4.1 PC/104 Bus Connectors The PC/104 bus is essentially identical to the ISA Bus except for the physical design. It specifies two pin and socket connectors for the bus signals.

  • Page 12: Pc/104+ Bus Connector

    4.2 PC/104+ Bus Connector J3/P3 GND/5.0V KEY Reserved AD00 VI/O AD02 AD01 AD05 AD04 AD03 C/BE0* AD07 AD06 AD09 AD08 AD11 VI/O AD10 M66EN AD14 AD13 AD12 +3.3V C/BE1* AD15 +3.3V SERR* SB0* PERR* +3.3V SDONE STOP* +3.3V LOCK* +3.3V TRDY* DEVSEL* FRAME*...
  • Page 13 The PC/104+ bus is essentially identical to the PCI Bus except for the physical design. It specifies a single pin and socket connector for the bus signals. A 120-pin header J3, arranged as 4 30-pin rows, incorporates a full 32-bit, 33MHz PCI Bus. The additional pins on the PC/104+ connectors are used as ground or key pins.

  • Page 14: Ps/2 Connector - J6

    4.3 PS/2 Connector – J6 An 8-pin connector is provided for PS/2 Mouse and keyboard. This connector mates with Diamond Systems’ cable no. 698022, which terminates the cable to two PS/2 Female connectors. The connections are: +5V In Keyboard PS/2 : pin 4...
  • Page 15 • If the system is currently powered up and active, then toggling (i.e., tie to ground briefly, then release) this button will cause a system power-down event to be initiated. Typically, this will power-down the monitor, hard drive, and any other non-essential functions. The system must be operating for this to function;...
  • Page 16 Speaker The signal on this pin is referenced to +5V Out. Connect a speaker between this pin and +5V Out. IR Receive / Transmit These pins are used for IrDA functions. They should be connected to an external IrDA transceiver, when needed. IR communications require that COM PORT 2 be set for “IR”...

  • Page 17: Data Acquisition (Digital I/O) Connector - J8 (For Models With Data Acquisition)

    I/O. This header is located on the right side of the board. Pin 1 is the lower right pin and is marked on the board. Diamond Systems’ cable no. C-50-18 provides a standard 50-pin connector at each end and mates with this header.

  • Page 18: Data Acquisition (Analog I/O) Connector - J9 (Models With Data Acquisition Only)

    FXA, FXB These lines should be left unconnected NOTE: The watchdog timer circuit is described on page 42 of this manual. It may be programmed directly or with Diamond Systems’ Universal Driver software. Connector Part Numbers J8 plug on CPU board:...

  • Page 19: Ethernet - J10 / J11

    Common Table 7: J11 – Ethernet Header Pinout J11 is a 1x6 pin header. It mates with Diamond Systems’ cable no. 698002, which provides a panel-mount RJ-45 jack for connection to standard CAT5 network cables. J10, which may be used instead of J11, provides an on-board RJ45. For development, J10 may be more useful, but it is anticipated that most embedded applications will make the J11 connection more useful (for panel-mount network connection).

  • Page 20: Speaker Connector - J13

    Signal Name Definition Headphone / Line Out Line Level output, capable of driving headphones Referred to as “Headphone Out” in most sound documentation Line Input Line-Level input; referred to as “Line In” in most sound documentation Auxiliary Input Line-Level input; referred to as “AUX In” in most sound documentation Microphone Input Microphone-level mono input;...

  • Page 21: Cd Input Connector - J14

    • Speakers: The speakers are driven using a Bridged-Tied Load (BTL) amplifier configuration. This is a differential speaker connection. As such, each speaker should be wired directly to the appropriate pair of connections for that speaker: Do not connect the speaker low sides (-) to ground; and Do not short the speaker low connections together.

  • Page 22: Primary Ide (44-Pin) - J16

    Table 12 : J16 – Primary IDE Connector Pinout J16 is a 2x22 (44-pin) 2mm-pitch pin header. It mates with Diamond Systems’ cable no. 698004, and may be used to connect up to 2 IDE drives (hard disks, CD-ROMs, or flash disk modules).

  • Page 23: Secondary Ide (40-Pin) - J17

    Table 13: J17 – Secondary IDE Connector Pinout J17 is an IDE standard 2x20 (40-pin) 0.1-pitch pin header. It mates with Diamond Systems’ UDMA cable no. 698026, and may be used to connect up to 2 IDE drives (hard disks, CD-ROMs or other IDE/ATAPI devices).

  • Page 24: Serial Port I/O Connector - J18

    4.14 Serial Port I/O Connector – J18 J18 is 40-pin header that provides access to the 4 on-board serial ports for Hercules-EBX. The first two serial ports are always configured to meet RS232 standards; the last two serial ports are software configurable as either RS232 or RS485.

  • Page 25: External Battery Connector - J20

    RS-485 Configuration: Port 1 Port 2 Port 3 TXD/RXD+ 3 TXD/RXD- 3 DIO C Port 4 TXD/RXD+ 4 TXD/RXD- 4 DIO D Table 15: J18 – RS485 Serial Port Connector Pinout Signal Name Definition DE-9 Pin Direction RS-485: TXD/RXD+, Differential Transceiver Data (HIGH) pin 2 Bi-directional TXD/RXD-...

  • Page 26: Usb 2/3 And 0/1 Headers - J21, J22

    Table 17: J21 and J22 – USB Header Pinout J21 and J22 are 2x5 pin headers. They mates with Diamond Systems’ cable no. 698012, which provides 2 standard USB type A jacks in a panel-mount housing. These headers support USB 1.1 support (10Mbps maximum transfer rates).

  • Page 27: Lcd Panel (Lvds Interface) Connector - J24

    4.18 LCD Panel (LVDS Interface) Connector – J24 Ground Ground Y CLOCK - Z CLOCK - Y CLOCK + Z CLOCK + Ground Ground Y Data 0 - Z Data 0 - Y Data 0 + Z Data 0 + Ground Ground Y Data 2 -...

  • Page 28: Video / Tv Out Connector - J26

    R-Ground Ground return for RED signal GREEN GREEN signal (positive, 0.7Vpp into 75 Ohm load) G-Ground Ground return for GREEN signal BLUE BLUE signal (positive, 0.7Vpp into 75 Ohm load) B-Ground Ground return for BLUE signal DDC-CLOCK/DATA Digital serial I/O signals used for monitor detection (DDC1 specification) J25 provides a connection for VGA monitors.

  • Page 29: Cpu Fan Connector - J27

    4.21 CPU Fan Connector – J27 Fan RPM Ground Table 22: J27 – CPU Fan Connector Pinout Signal Name Definition Fan-RPM TTL signal input that pulses with each revolution of the fan +5V, Ground Power Supply for optional CPU Fan (if necessary) Connector Part Numbers J27 Connector on CPU board: Heilind Electronics...

  • Page 30: Low-Voltage Power Input Connector - J29

    4.23 Low-Voltage Power Input Connector – J29 +Vin +Vin Ground Ground +12V Ground +Vin -12V Power Supply ON Table 24: J29 – Main Power Input Connector Pinout Signal Name Definition +Vin Main Input Power (+5V - +28V input range * : see below) Ground 0-V (Ground) power return path +12V...

  • Page 31: Optional> High-Voltage Power Input Connector - J30

    A short press on the switch will turn on power, and holding the switch on for 4 seconds or longer will turn off power (See Utility Header description for J7 above). Diamond Systems’ cable no. 698015 mates with J29. It provides 10 color-coded wires with stripped and tinned leads for connection to user-supplied power sources.

  • Page 32: Optional> Compact Flash Slot - J34

    4.25 <OPTIONAL> Compact Flash Slot – J34 An optional Compact Flash Socket may be located under the board, immediately under J17. If this socket is to be used, it will occupy the entire secondary IDE channel. To set the CompactFlash card as an IDE MASTER (so that the BIOS detects it), place a jumper on J5, as detail on page 35.

  • Page 33: Jumper Configuration

    5. JUMPER CONFIGURATION Refer to the Hercules board drawing on page 9 for locations of the configuration items mentioned here. 5.1 J4: System Configuration Jumper block J10 is used for configuration of IRQ levels, ATX power control, and CMOS RAM. DAQ IRQ RS485 COM3 IRQ...

  • Page 34: Figure 3 : J4 -Irq Jumper Setting Examples

    The different configurations for J4 are shown below. Each illustration shows only the jumper of interest. An asterisk (*) indicates the default setting. COM3 = IRQ3 COM3 = IRQ4 COM3 = IRQ9 * COM4 = IRQ3 COM4 = IRQ15 AD = IRQ5 * AD = IRQ5 AD = IRQ4 AD = IRQ7...

  • Page 35: J5: Data Acquisition Configuration

    5.2 J5: Data Acquisition Configuration Jumper block J5 is used for configuration of DIO pull-ups/pull-downs, DIO control signal pull- ups/downs, CompactFlash mode, Flash Write Protect (for boot sector), and COM3/4 Address Selection. DIO Data Lines: Pull-down (left)* or J5 CONFIG Pull-up (right) COM PORT Address Selection: "B"...

  • Page 36: J19 : Pci Vi/O Voltage Setting

    A : COM3 = 0x3E8, J5 CONFIG B : COM4 = 0x2E8, Default CF : CompactFlash = SLAVE, Settings: FW : No WriteProtect for BIOS, DIO's Pulled-up, CF FW DIO Control Pulled up DIO LINES <PE4,5,6,7 Figure 6 : J5 – Default Jumper Settings J5 CONFIG DIO Data Lines : pulled-up (data = "1"...

  • Page 37: J33: Data Acquisition Calibration Test Points

    Signal Name Definition Main +5V Power supply on Hercules-EBX board +3.3V Main +3.3V Power supply on Hercules-EBX board PCI VIO “V I/O” pins on J3 No Setting - No power (BAD) Set to 5V Set to 3.3V PCI VIO PCI VIO PCI VIO Figure 8 : Possible VIO Settings for J19 PC/104+ cards are supposed to be keyed to identify the correct voltage setting –...

  • Page 38: Crisis Recovery: System Recovery Contacts

    AD IN (+) Ground AD VIN UNIADJ +5V (ADC power) -5V Reference +15V (ADC Power) + Dref Voltage -15V (ADC Power) - Dref Voltage Table 27: J33 – DAQ Test Point Pinout 5.5 CRISIS RECOVERY: System Recovery Contacts Just below J18 is a small square labeled “Crisis Recovery” which encircles two metal pads on the PCB.

  • Page 39: System Features

    6. SYSTEM FEATURES 6.1 System Resources The table below lists the default system resources utilized by the circuits on Hercules-EBX. Device Address (Hex) ISA IRQ ISA DMA Serial Port COM1 I/O 3F8-3FF Serial Port COM2 I/O 2F8 – 2FF Serial Port COM3 I/O 3E8 –...

  • Page 40: Com Port / Fpga Control Registers

    6.2 COM Port / FPGA Control Registers A set of registers is located at Address 0xA50-0xA5F for the purposes of controlling the enhanced Serial Port features, as well as some FPGA control capability. Only two registers from this range should be accessed by the user: Address Read - Write Functional Description...
  • Page 41 board and use a keyboard and terminal or erase the CMOS RAM, which will return the BIOS to its default settings. CMOS RAM may be erased by moving a jumper. See page 33 for instructions. Before erasing CMOS RAM, write down any custom BIOS settings you have made! If you erase the CMOS RAM, the next time the CPU powers up COM2 will return to the default settings of 115.2Kbaud, N, 8, 1 and operate only during POST.

  • Page 42: Watchdog Timer

    6.4 Watchdog Timer Hercules-EBX contains a watchdog timer circuit consisting of two programmable timers, WD1 and WD2, cascaded together. The input to the circuit is WDI, and the output is WDO. Both signals appear on Digital I/O connector J8. WDI may be triggered in hardware or in software. A special “early”...

  • Page 43: Failsafe Mode / Bios Recovery

    USB floppy device on any of the 4 USB ports. Once a drive is found, it will immediately search for a special “Crisis Recovery” disk (provided by Diamond Systems). If the correct data is found, then the board will immediately begin loading and updating the code.

  • Page 44: System Reset

    6.8 System Reset Hercules-EBX contains a chip to control system reset operation. Reset will occur under the following conditions: ♦ User causes reset with a ground contact on the Reset input ♦ Input voltage drops below 4.75V ♦ Over current condition on output power line The ISA Reset signal is an active high pulse with a duration of 200ms.

  • Page 45: Bios

    7. BIOS 7.1 BIOS Settings Hercules-EBX uses a BIOS from Phoenix Technologies modified to support the custom features of the Hercules-EBX board. Some of these features are described here. To enter the BIOS during system startup (POST – power on self-test), press F2. Serial Ports -The address and interrupt settings for serial ports COM1 –...
  • Page 46 Miscellaneous -Memory Cache Settings: Unless there is a specific reason to change these settings, it is best to keep these settings as-is. Certain system functions (such as USB keyboard support under BIOS menus) may be adversely affected by changes to these settings, due mainly to a heavy reduction in performance. These cache settings can make a huge difference for low-level BIOS calls and, as such, can severely limit performance if they are disabled.

  • Page 47: Bios Download / Crisis Recovery

    CPU chip on Hercules-EBX contains a special failsafe section of ROM code that can be activated on power-up. A Diamond Systems software utility is provided to enable system recovery by downloading the BIOS to the flash memory through a USB floppy drive when the CPU is booted up to the BUR.
  • Page 48 • COM 1 has the following options: ISA I/O Address : 0x3F8 (default), 0x2F8, 0x3E8, or 0x2E8 ISA IRQ : IRQ4 (default) or IRQ3 • COM 2 has the following options: ISA I/O Address : 0x2F8 (default), 0x3F8, 0x3E8, or 0x2E8 ISA IRQ : IRQ3 (default) or IRQ4 Mode : Normal (default), IrDA, ASK_IR Note that the two IR modes require an external IR transceiver, connected to...

  • Page 49: Bios Console Redirection Settings

    7.4 BIOS Console Redirection Settings For applications where the Video interfaces will not be used, the textual feedback typically sent to the monitor can be redirected to a COM PORT. In this manner, a system can be managed and booted without the need for any video connection.

  • Page 50: System I/O

    8. SYSTEM I/O 8.1 Ethernet Hercules-EBX includes a 10/100Mbps Ethernet connection using Cat-5 (100BaseT) wiring. The signals are provided on two connectors: a vertical RJ45 connection (J10) or 6-pin header (J11) on the right edge of the board. For applications where the on-board RJ45 might be inaccessibly or inconvenient, Diamond Systems’...

  • Page 51: Mode

    The settings of COM1 and COM2 may be changed in the system BIOS. Select the Advanced menu, then I/O Device Configuration. The base address and interrupt level may be modified on this page. The settings of COM3 and COM4 may be changed using a different procedure: The addresses of these two ports are selected with jumpers on J5 –...

  • Page 52: Ps/2 Ports

    8.3 PS/2 Ports Hercules-EBX supports 2 PS/2 ports: one dedicated for keyboard and the other dedicated for mouse function. The two PS/2 ports are accessible via a cable assembly (DSC#698022) attached to J6. Support for these ports is independent of, and in addition to, mouse and keyboard support via the USB ports.

  • Page 53: Notes On Operating Systems And Booting Procedures

    9. NOTES ON OPERATING SYSTEMS AND BOOTING PROCEDURES 9.1 Windows Operating Systems Installation Issues Installation of Windows operating systems ( Win98/2000/XP ) should follow the sequence below. If the sequence is not followed certain drivers might not work and may prevent the device from functioning properly under Windows.

  • Page 54: Compactflash Under Windows

    9.1.3 COMPACTFLASH UNDER WINDOWS CompactFlash is not directly supported by Windows 98. A special driver may be available - – see the vendor of your specific CompactFlash card for details. Without special drivers, Windows 98 will not recognize the CompactFlash at all. CompactFlash support is automatic under Windows 2000 and XP.

  • Page 55: Data Acquisition Circuit - I/O Map And Register Descriptions

    10. DATA ACQUISITION CIRCUIT – I/O MAP AND REGISTER DESCRIPTIONS Hercules-EBX Models with Data Acquisition contain a data acquisition subsystem consisting of A/D, D/A, digital I/O, and counter/timer features. This subsystem is equivalent to a complete add- on data acquisition module. The A/D section includes a 16-bit A/D converter, 32 input channels, and a 2048-sample (4kByte) FIFO.

  • Page 56: Data Acquisition Circuitry I/O Map

    10.1 Data Acquisition Circuitry I/O Map 10.1.1 BASE ADDRESS The data acquisition circuitry on Hercules-EBX occupies a block of 32 bytes in I/O memory space. The default address range for this block is 240h – 24Fh (base address 240). A functional list of registers is provided below, and detailed bit definitions are provided on the next page and in the following chapter.
  • Page 57 Page 1 Base + Write Function Read Function PWM data register LSB PWM data register LSB PWM data register CSB PWM data register CSB PWM data register MSB PWM data register MSB PWM configuration register (Autocal) EEPROM / TrimDAC Data (Autocal) EEPROM / TrimDAC Data (Autocal) EEPROM / TrimDAC Address) (Autocal) EEPROM / TrimDAC Address...

  • Page 58: Register Map Bit Assignments

    REGISTER MAP BIT ASSIGNMENTS PAGE 0 WRITE Blank bits are unused and have no effect. Offset HOLDOFF RESET PAGE1 PAGE0 DABU SEDIFF ADBU LDAD DACH1 DACH0 DA11 DA10 FT11 FT10 SINGLE DIOCTR1 DIOCTR0 SCINT CLKSRC1 CLKFRQ1 CLKFRQ0 TINTE DINTE AINTE FIFOEN SCANEN CLKSEL...
  • Page 59 PAGE 0 READ Blank bits are unused and read back as 0. Offset AD15 AD14 AD13 AD12 AD11 AD10 ADBUSY WAIT DABUSY DABU SEDIFF ADBU FT11 FT10 FD12 FD11 FD10 SINGLE DIOCTR1 DIOCTR0 SCINT CLKSRC1 CLKFRQ1 CLKFRQ0 TINTE DINTE AINTE FIFOEN SCANEN CLKSEL...
  • Page 60 PAGE 1 WRITE Blank bits are unused and have no effect. Note that offsets 28, 29, and 31 refer to EEPROM Data, Address, and unlock command registers for Autocalibration Offset HOLDOFF RESET PAGE1 PAGE0 EE_EN EE_RW RUNCAL CMUXEN TDACEN PAGE 1 READ Blank bits are unused and read back as 0.
  • Page 61 PAGE 2 WRITE Blank bits are unused and have no effect. Write registers 24-31 in this page are reserved for a future D/A waveform generator circuit. Offset HOLDOFF RESET PAGE1 PAGE0 PAGE 2 READ Blank bits are unused and read back as 0. Offset ADQ7 ADQ6...

  • Page 62: Register Definitions

    10.1.2 PAGE 0 REGISTER DEFINITIONS Base + 0 Write Page Register + Reset Command Bit No. Name HOLDOFF RESET PAGE1 PAGE0 HOLDOFF When this bit is 1 the chip ignores any data written to this register. This bit is provided to enable shadowing this register with another device at the same address. RESET Reset the entire data acquisition circuit.
  • Page 63 Base + 1 Write Analog Configuration Register Bit No. Name DABU SEDIFF ADBU The analog configuration register is typically written to once at the start of an application and then remains unchanged. DABU 0 = bipolar, 1 = unipolar D/A output range (Default on reset is unipolar mode) SEDIFF 0 = single-ended, 1 = differential A/D mode ADBU...
  • Page 64 Base + 4 Write A/D Input Range Control Register Bit No. Name LDAD LDAD The FPGA contains a global input range setting as well as a 32x4 table for all 32 input channels that can be used for individual input ranges for each channel. The chip will use either the global input range setting or the individual range table based on the setting of the SINGLE bit in Base + 12.
  • Page 65 Base + 5 Write D/A Channel Register Bit No. Name DACH1 DACH0 Simultaneous Update 0 = Transparent (written directly to the DAC’s) / Simultaneous Write 1 = Latch and hold data (DAC output not updated until “0” is written later) DACH1-0 D/A channel number Writing to this register updates the selected D/A channel with the data currently stored in Base +...
  • Page 66 Base + 10 Read FIFO Depth Register LSB Bit No. Name FD7-0 Current FIFO depth LSB Base + 11 Read FIFO Depth Register MSB Bit No. Name FD12 FD11 FD10 FD12-8 Current FIFO depth MSB The FIFO depth register indicates the current depth, or no. of bytes, in the FIFO. The depth is reset to 0 when a FIFORST command occurs.
  • Page 67 Base + 13 Read/Write Operation Control Register Bit No. Name TINTE DINTE AINTE FIFOEN SCANEN CLKSEL CLKEN TINTE Timer interrupt enable: 0 = disabled, 1 = enabled DINTE Digital I/O interrupt enable: 0 = disabled, 1 = enabled AINTE A/D interrupt enable: 0 = disabled, 1 = enabled Only one of the above three interrupts may be enabled at a time.
  • Page 68 Base + 15 Write Command Register Bit No. Name FIFORST DARST CLRT CLRD CLRA ADSTART Each bit in this register represents a command. Writing a 1 to any bit executes the command specified by that bit. Only one bit may be written to at a time. FIFORST Reset the FIFO;...
  • Page 69 Base + 18 Read/Write Digital I/O Port C Bit No. Name DIOC7 DIOC6 DIOC5 DIOC4 DIOC3 DIOC2 DIOC1 DIOC0 Base + 19 Read/Write Digital I/O Port D Bit No. Name DIOD7 DIOD6 DIOD5 DIOD4 DIOD3 DIOD2 DIOD1 DIOD0 Base + 20 Read/Write Digital I/O Port E Bit No.
  • Page 70 Base + 24 Read/Write Counter/Timer Data Register Byte 1 Bit No. Name CTRD7 CTRD6 CTRD5 CTRD4 CTRD3 CTRD2 CTRD1 CTRD0 CTRD7-0 LSB for counter/timers 0 and 1 Base + 25 Read/Write Counter/Timer Data Register Byte 2 Bit No. Name CTRD15 CTRD14 CTRD13 CTRD12...
  • Page 71 Base + 28 Read/Write Watchdog Timer A LSB Data Register Bit No. Name WDA7 WDA6 WDA5 WDA4 WDA3 WDA2 WDA1 WDA0 WDA7-0 LSB of timer A divisor; loading occurs for both bytes when the MSB is written Base + 29 Read/Write Watchdog Timer A MSB Data Register Bit No.

  • Page 72: Register Definitions

    10.1.3 PAGE 1 REGISTER DEFINITIONS Base + 0 Write Page Register + Reset Command Bit No. Name HOLDOFF RESET PAGE1 PAGE0 See page 0 for the definition of this register. Base + 24 Write PWM Data Register LSB Bit No. Name PWMD7 PWMD6...
  • Page 73 Base + 27 Write PWM Command Register This register serves two purposes based on the value of bit 7, PCMD. Bit 7 = 0 indicates a PWM command, and bit 7 = 1 indicates a configuration command. Bit No. Name PWM1 PWM0 Indicates a PWM command...
  • Page 74 Base + 29 Read/Write EEPROM / TrimDAC Address Register Bit No. Name A7-A0 EEPROM / TrimDAC address. The EEPROM recognizes address 0 – 255 using address bits A7 – A0. The TrimDAC recognizes addresses 0 – 7 using bits A2 – A0. In each case remaining address bits will be ignored.
  • Page 75 Base + 30 Read Calibration Status Register Bit No. Name TDBUSY EEBUSY CMUXEN TDBUSY TrimDAC busy indicator User may access TrimDAC TrimDAC is being accessed or reload operation is in progress EEBUSY EEPROM busy indicator User may access EEPROM EEPROM is being accessed When either signal is 1, do not access the data and address registers at base + 12 and base + Base + 31 Write...

  • Page 76: Register Definitions

    10.1.4 PAGE 2 REGISTER DEFINITIONS Base + 0 Write Page Register + Reset Command Bit No. Name HOLDOFF RESET PAGE1 PAGE0 See page 0 for the definition of this register. Base + 24 Read A/D Feature ID Register Bit No. Name ADQ7 ADQ6...

  • Page 77: Register Definitions

    Base + 28 Read Chip ID LSB Bit No. Name Base + 29 Read CHIP ID MSB Bit No. Name ID15 ID14 ID13 ID12 ID11 ID10 ID15-0 Indicates the unique chip ID according to a format TBD. Each revision of the chip, whether prototype or production, standard or custom, contains a unique 16-bit ID to enable software to distinguish between different versions.

  • Page 78: Data Acquisition Circuit Configuration

    11. DATA ACQUISITION CIRCUIT CONFIGURATION There are three primary configuration options for the Data Acquisition circuitry on the Hercules- EBX board: • (A/D) : single-ended versus differential • (A/D) : unipolar or bipolar • (D/A) : unipolar or bipolar These settings are all configured in software – no jumper configurations are required for these options.

  • Page 79: Analog-To-Digital Input Ranges And Resolution

    12. ANALOG-TO-DIGITAL INPUT RANGES AND RESOLUTION 12.1.1 OVERVIEW Hercules-EBX uses a 16-bit A/D converter. The full range of numerical values for a 16-bit number is 0 - 65535. However the A/D converter uses twos complement notation, so the A/D value is interpreted as a signed integer ranging from –32768 to +32767.

  • Page 80: Performing An A/D Conversion

    12.2 Performing an A/D Conversion This chapter describes the steps involved in performing an A/D conversion on a selected input channel using direct programming (not with the driver software). There are seven steps involved in performing an A/D conversion: 1. Select the input channel 2.

  • Page 81: Perform An A/D Conversion On The Current Channel

    12.2.4 PERFORM AN A/D CONVERSION ON THE CURRENT CHANNEL After the above steps are completed, start the A/D conversion by writing to Base + 15, bit 0. This write operation only triggers the A/D if AINTE = 0 (interrupts are disabled). When AINTE = 1, the A/D can only be triggered by the on-board counter/timer or an external signal.
  • Page 82 The final data is interpreted as a 16-bit signed integer ranging from –32768 to +32767. The “A/D LSB Register” and “A/D LSB Register” can be combined into one 16-bit read. These two registers fully support 16-bit I/O reads (in hardware), so the most efficient I/O method would be to read the two bytes as a single 16-bit word.

  • Page 83: Convert The Numerical Data To A Meaningful Value

    12.2.7 CONVERT THE NUMERICAL DATA TO A MEANINGFUL VALUE Once you have the A/D value, you need to convert it to a meaningful value. The first step is to convert it back to the actual measured voltage. Afterwards you may need to convert the voltage to some other engineering units (for example, the voltage may come from a temperature sensor, and then you would need to convert the voltage to the corresponding temperature according to the temperature sensor’s characteristics).

  • Page 84: A/D Scan, Interrupt, And Fifo Operation

    12.3 A/D Scan, Interrupt, and FIFO Operation The control bits SCANEN (scan enable) and AINTE (A/D interrupt enable) in conjunction with the FIFO determine the behavior of the board during A/D conversions and interrupts. At the end of an A/D conversion, the 16-bit A/D data is latched into the 8-bit FIFO in an interleaved fashion, first LSB, and then MSB.

  • Page 85: Hercules-Ebx A/D Operating Modes

    The table on the next page describes the board’s behavior for each of the 4 possible cases of AINTE and SCANEN. The given interrupt software behavior describes the operation of the Diamond Systems Universal Driver software. If you write your own software or interrupt routine you should conform to the described behavior for optimum results.

  • Page 86: Table 34: A/D Operating Modes

    AINTE FIFOEN SCANEN Operation Single A/D conversions are triggered by write to Base+15, bit 0. ADBUSY = ADSTS (from A/D) No interrupt occurs. The user program monitors ADBUSY and reads A/D data when it goes low. A/D Scans are triggered by write to Base+15, bit 0. All channels between LOW and HIGH will be sampled.

  • Page 87: Digital-To-Analog Output Ranges And Resolution

    13. DIGITAL-TO-ANALOG OUTPUT RANGES AND RESOLUTION 13.1 Description Hercules-EBX uses a 4-channel 12-bit D/A converter (DAC) to provide 4 analog outputs. A 12-bit DAC can generate output voltages with the precision of a 12-bit binary number. The maximum value of a 12-bit binary number is 2 - 1, or 4095, so the full range of numerical values that the DACs support is 0 - 4095.

  • Page 88: D/A Conversion Formulas And Tables

    13.4 D/A Conversion Formulas and Tables The formulas below explain how to convert between D/A codes and output voltages. D/A Conversion Formulas for Unipolar Output Ranges Output voltage = (D/A code / 4096) * Reference voltage D/A code = (Output voltage / Reference voltage) * 4096 Example: Output range in unipolar mode = 0 –...
  • Page 89 D/A Conversion Formulas for Bipolar Output Ranges Output voltage = ((D/A code – 2048) / 2048) * Output reference D/A code = (Output voltage / Output reference) * 2048 + 2048 Output range in bipolar mode = ±10V Example: Full-scale range = 10V – (-10V) = 20V Desired output voltage = 2.000V D/A code = 2V / 10V * 2048 + 2048 = 2457.6 =>...

  • Page 90: Generating An Analog Output

    13.4.1 GENERATING AN ANALOG OUTPUT This chapter describes the steps involved in generating an analog output (also called performing a D/A conversion) on a selected output channel using direct programming (not with the driver software). There are three steps involved in performing a D/A conversion: 1.

  • Page 91: Wait For The D/A To Update

    be configured and then updated simultaneously. This allows for a uniform transition time for all A/D outputs. To send the data to the D/A immediately, write the channel number to Page 0: Base+5 bits 1-0. For Transparent mode, bit 8 should be set to “0”: outp(Base + 5, Channel Number);...

  • Page 92: Analog Circuit Calibration Resources

    13.5 Analog Circuit Calibration Resources For a board with the Data Acquisition option, the Hercules-EBX Data Acquisition circuitry incorporates some advanced calibration features to allow the system to calibrate both the A/D and D/A signal conversion pathways. The registers involved in controlling these calibration features are listed below: Register Register location...

  • Page 93: Analog Circuit Calibration Procedures

    OUTPUT (TrimDAC Address) NAME FUNCTION POLARITY A/D offset, all modes, The same for bipolar, ADCOFF coarse coarse Inversed for unipolar The same for bipolar, ADCOFF fine A/D offset, fine Inversed for unipolar A/D full scale, all modes, ADCFUL coarse coarse Inversed ADCFUL fine A/D full scale, fine...

  • Page 94: Using Eeprom

    13.7 Using EEPROM There is an EEPROM used to store all TrimDAC adjustment values. These values are loaded on reset or power-up, so it is critical that these values be correct in order to maintain accurate A/D measurements. These settings are configured to defaults during manufacturing test – be sure that you know what you are doing before changing these settings.

  • Page 95: Digital I/O Operation

    13.8 Digital I/O Operation Hercules-EBX contains 40 digital I/O lines organized as four 8-bit I/O ports, A, B, C, D, and E. The direction for each port is independently programmable. The ports are accessed at registers Base + 16 through Base + 20 respectively, and the direction register is at Base + 22 (all on Page Offset SINGLE DIOCTR1...

  • Page 96: Special Digital I/O Operation - Port E

    Port B is output; ports A,C,D,E all inputs BYTE Mode : For byte-mode operation, the data for a given byte is read or written to the appropriate DIO byte register: DIO ports A-E are located at Base+16 – Base+20, respectively. As an example, the following illustrates setting port A to output (B-E to input), writing a value of “AA”...

  • Page 97: Dio Handshaking Operation

    See sections on “Counter / Timer Operation” on page 99 and “DIO Handshaking Mode” (below) for details on these special functions (available only when DIOCTR1 is set to “1”). 13.9.1 DIO HANDSHAKING OPERATION Normally, the DIO data is transferred through the data registers with each read. If a handshaking method is desired, two signals are provided to allow this type of transfer: •...

  • Page 98: Table 41: Dio Pull-Up/Down Configuration

    This is particularly useful for signals such as the DIOLATCH and EXTTRIG signals, for example, where a floating input could cause erratic or erroneous results (latch/counter edge trigger could occur randomly). To set DIO signal pull-ups or pull-downs, a jumper must be added across signals on header J5, as indicated here: DIO Signal (Range) Pull-up Pull-down Notes...

  • Page 99: Counter/Timer Operation

    14. COUNTER/TIMER OPERATION Hercules-EBX models with Data Acquisition contain two counter/timers that provide various timing functions on the board for A/D timing and user functions. These counters are controlled with registers in the on-board data acquisition controller FPGA. See pages 67 and 70 for information on the counter/timer control register bits and how to perform various functions using these counters.

  • Page 100: Command Sequences

    14.3 Command Sequences Diamond Systems provides driver software to control the counter/timers on Hercules-EBX. The information here is intended as a guide for programmers writing their own code in place of the driver and also to give a better understanding of the counter/timer operation.
  • Page 101 Reading a counter a. Latch the counter: Counter 0 Counter 1 outp(base+27,0x40); outp(base+27,0xC0); b. Read the data: The value is returned in 3 bytes, low, middle, and high (2 bytes for counter 1) Counter 0 Counter 1 low=inp(base+24); low=inp(base+24); middle=inp(base+25); high=inp(base+25);...

  • Page 102: Pulse-Width Modulation Operation

    15. PULSE-WIDTH MODULATION OPERATION Hercules-EBX models that include Data Acquisition contain four PWM generators for automatic generation of a regular pulse with independently-configurable duty cycle and frequency. These output signals are present on DIO Header J8 pins 33-36 (PWM output channel 0-3) when DIOCTR0 = 1.

  • Page 103: Pulse-Width Modulation Example

    15.1 Pulse-Width Modulation Example The following is a programming example to output a 1KHz signal with a 25% high duty cycle on PWM output 2: a) Note that, for 1KHz output, either reference clock (10MHz or 100KHz) is suitable. For this example we are going to use the 10MHz reference clock.
  • Page 104 BIT7 = 1; Indicates PWM configuration byte PWM0-1 = 2; Program PWM output 2 CLK = 0; Use the 10MHz reference clock POL = 1; Active state = high (PWM will be high for the 25% duty cycle) OUTEN = 1; Enable PWM output ENAB = 1;...

  • Page 105: Watchdog Timer Programming

    16. WATCHDOG TIMER PROGRAMMING 16.1 Example : Watchdog Timer With Software Trigger Software trigger relies on a thread of execution to constantly trigger watchdog timer A. If the thread is ever halted, timer A will reach zero and start timer B. Once timer B reaches 0, the board will reset.

  • Page 106: Example : Watchdog Timer With Hardware Trigger

    16.2 Example : Watchdog Timer With Hardware Trigger Hardware trigger relies on an external pulse to constantly trigger watchdog timer A. If the external stream of pulses is ever halted, timer A will reach zero and start timer B. Once timer B reaches 0, the board will reset.

  • Page 107: Data Acquisition Specifications

    17. DATA ACQUISITION SPECIFICATIONS These specifications apply to units with Data Acquisition Only Analog Inputs No. of inputs 16 differential or 32 single-ended (user selectable) A/D resolution 16 bits (1/65,536 of full scale) ±10V, ±5V, ±2.5V, ±1.25V Input ranges Bipolar: Unipolar: 0-10V, 0-5V, 0-2.5V Input bias current...

  • Page 108: Flashdisk Module

    The power may be provided from the CPU’s power out connector (J12) or from one of the two 4-pin headers on the ACC-IDEEXT board. Diamond Systems’ cable no. 698006 may be used with either power connector to bring power to the drive.

  • Page 109: Utility" Board

    19. “UTILITY” BOARD A small “Utility” board (DSC# 861002) has been designed for test and development with the Hercules-EBX. It is included with the Hercules-EBX development system (DSC# DK-HRCEBX- 01). This small board plugs onto the “Utility” connector J7and provides a simple interface for various buttons / LED’s: •...

  • Page 110: Data Acquisition Test Board

    20. DATA ACQUISITION TEST BOARD The Data Acquisition Test Board (DSC# ACC-HRCDAQ) is provided with the Hercules-EBX development system as a means to do simple tests and verification of the onboard Data Acquisition system (both digital and analog I/O). The DAQ test board consists of two connectors for ribbon cables (one for digital I/O, the other for analog I/O), A sequence of LEDs (for visual display of one byte of DIO loopback), a bank of DIP switches, and 3 sets of test points.

  • Page 111: Daq Board Dio Interface

    20.2 DAQ Board DIO interface The Data Acquisition Test Board provides a complete loopback capability for each DIO bit: each DIO signal can potentially be driven and read back by at least one other DIO channel. The details of this loopback are user-configurable for many DIO bits – see details below. 20.2.1 DIO A –...

  • Page 112: Special Functions

    appropriate signal can be driven into test point TP1 – pin 4. This test point can be used for “GATE1” probing and assertion. • Channel E, bit 5 is wired to an LED on-board, as well as to SW1 – switch 2. To loopback DIO E bit 5 to DIO C/D bit 5, set SW1-switch 2 to the “ON”...
  • Page 113 Channel C bit 5 as well as to an LED. If “TOUT1” function is required, then the two attached DIO signals (D bit 5 and C bit 5) must be configured as inputs. “TOUT1” is also tied to a test point (TP1-pin6) for probing. •...

  • Page 114: Daq Board Analog Testing

    20.3 DAQ Board Analog Testing 20.3.1 ANALOG OUTPUT CONNECTIONS There are 4 output channels (VOUT3-0) from the main Hercules board. All of these are capable of full-rail (+/- 10V) output, and are looped back to input channels for testing. These connections are like so: •...
  • Page 115 look correct, you get a reading of +9.5V for VIN5, but VIN6 is reading 0V), this is a good indication that the inputs are configured for unipolar mode (i.e., negative differential voltage not being reported). Similarly, voltage readings for channels VIN8 and VIN11 would also be incorrect and readings for VIN9, VIN10, VIN12, VIN13, VIN14, and VIN15 may not be correct (depending on whether the output voltage is higher than the associated “low-side”...

  • Page 116: Flash Disk Programmer Board

    21. FLASH DISK PROGRAMMER BOARD The Flash Disk Programmer Board accessory model no. ACC-IDEEXT may be used for several purposes. Its primary purpose is to enable the simultaneous connection of both a flashdisk module and a standard IDE hard drive or CD-ROM drive to allow file transfers to/from the flashdisk.

  • Page 117: I/O Cables

    22. I/O CABLES For custom installations as well as development, Diamond Systems offers a cable kit no. <DSC# C-HRCEBX-KIT> with 18 types of cables to connect to all I/O headers on the board. Some cables are also available separately. The mating cable for each I/O connector is listed in Chapter 4.

  • Page 118: Figure 14 : Hercules-Ebx Cable Kit

    Figure 14 : Hercules-EBX Cable Kit Hercules-EBX CPU User Manual V1.02 Page 118...

  • Page 119: Mounting Pc/104(+) Cards Onto A Hercules-Ebx Baseboard

    23. MOUNTING PC/104(+) CARDS ONTO A HERCULES-EBX BASEBOARD Hercules-EBX is designed to serve as a baseboard for a stack of PC/104 or PC/104+ boards. Up to 4 PC/104+ boards are supported with the top-most board only supporting slave-mode PCI – no bus mastering supported for that board.
  • Page 120 • Alternative heatsinks for low air-flow and dusty environments • Conformal Coating • Jumperless configuration (all settings made on-board with no jumper headers required) See your sales representative for details on these special-order options. Hercules-EBX CPU User Manual V1.02 Page 120...
  • Page 121 Hercules-EBX CPU User Manual V1.02 Page 121...
  • Page 122 PC/104 Mechanical Drawing The following drawing is from the PC/104 specification. This document may be downloaded from www.pc104.org or from www.diamondsystems.com/support/techliterature. Hercules-EBX CPU User Manual V1.02 Page 122...
  • Page 123 Hercules-EBX CPU User Manual V1.02 Page 123...

This manual is also suitable for:

Hercules-ebx hrc550-5a128Hercules-ebx hrc550-5n128Hercules-ebx hrc750-5a256

Table of Contents