Table of Contents
Advertisement
Circuit description
SDU5600 Brief circuit description
The RF signal is fed by BNC socket into the SDU at a selected frequency of either 10.7MHz or 45.05MHz depending on the radio IF
frequency being used. This signal is split into two different signal paths depending upon which input frequency is selected. Both paths
are buffered and have Band Pass Filters with a bandwidth of +/-5kHz to eliminate unwanted signals outside of this range.
After the BPF, both signal paths join and are amplified by a single LNA (Low Noise Amplifier). The output signal feeds a pair of Dual
Balanced Mixers.
Here the input RF signal is mixed with two orthogonal sinusoidal signals produced by the DDS (Direct Digital Synthesis) section to
give two resultant signals at audio frequencies (one used as real, one as imaginary). The gain of both signal paths is also controlled at
this point.
The audio level signals are fed through 80kHz LPFs (Low Pass Filters) and finally converted from Analogue into Digital signals before
being fed to the FPGA (Field Programmable Gate Array).
The digital signal is now processed by the DSP (Digital Signal Processor) to give an RGB Video output via the FPGA which drives a
colour TFT LCD display.
The DSP is controlled by the main CPU and its EEPROM memory. The front panel keypad switches and rotary encoder are fed to the
main CPU via a separate slave microprocessor on the front panel.
RS232 control and Receiver control ports connect (indirectly) to the main CPU.
A comprehensive power supply section has been used in the unit to give the required supply levels of 2.5v, 3.3v, 5v, 6v, 9.5v, 17v, -5v,
-7v and -15v. The input is protected for reverse current & unwanted RF and is internally fused.
LCD resolution
The LCD provides high resolution of 320 horizontal dots from the left to right edges of screen. As a result, there are about 40 steps
per graticule division with eight divisions making up the total width. The minimum displayed bandwidth is 160kHz and the maximum
displayed width is 10000 kHz (10 MHz) representing ± 5 MHz.
To calculate the LCD-step, divide the SPAN bandwidth in kHz by 320. Examples are as follows:
10000 kHz (10 MHz)
5000 kHz (5 MHz)
2000 kHz (2 MHz)
1000 kHz (1 MHz)
160 kHz (0.16 MHz)
It is possible to force the LCD-step to equal the receive tuning step using a similar process. Multiply the receive tuning step size in
kHz by 320 (dots) to obtain the required total span width in kHz.
For example, for a 5 kHz tuning and LCD step, 5 x 320 = 1600 kHz span
The following table presents commonly used step sizes:
0.5 kHz (minimum step size)
5 kHz
6.25 kHz
9 kHz
10 kHz
12.5 kHz
20 kHz
25 kHz
31.25 kHz
6
32.250 kHz
15.625 kHz
6.250 kHz
3.250 kHz
0.500 kHz
160 kHz (0.160 MHz)
1600 kHz (1.600 MHz)
2000 kHz (2.00 MHz)
2880 kHz (2.880 MHz)
3200 kHz (3.200 MHz)
4000 kHz (4.000 MHz)
6400 kHz (6.400 MHz)
8000 kHz (8.000 MHz)
represents maximum span of 10000 kHz (10 MHz)
Advertisement
Table of Contents
