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Fairchild AN-7511 Application Note

Insulated-gate transistors simplify ac-motor speed control

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An IGT's few input requirements and low On-state resistance
simplify drive circuitry and increase power efficiency in motor-
/Title
control applications. The voltage-controlled, MOSFET-like
AN75
input and transfer characteristics of the insulated-gate transis-
1)
tor (IGT) (see EDN, September 29, 1983, pg 153 for IGT
Sub-
details) simplify power-control circuitry when compared with
bipolar devices. Moreover, the IGT has an input capacitance
ect
mirroring that of a MOSFET that has only one-third the power-
In
handling capability. These attributes allow you to design sim-
ulated
ple, low-power gate-drive circuits using isolated or level-shift-
Gate
ing techniques. What's more, the drive circuit can control the
IGT's switching times to suppress EMI, reduce oscillation and
ran
noise, and eliminate the need for snubber networks.
istors
Use Optoisolation To Avoid Ground Loops
im-
The gate-drive techniques described in the following sections
lify
illustrate the economy and flexibility the IGT brings to power
C-
control: economy, because you can drive the device's gate
otor
directly from a preceding collector, via a resistor network, for
peed
example; flexibility, because you can choose the drive circuit's
impedance to yield a desired turn-off time, or you can use a
on-
switchable impedance that causes the IGT to act as a charge-
rol)
controlled device requiring less than 10 nanocoulombs of
Autho
drive charge for full turn-on.
()
Take Some Driving Lessons
Key-
Note the IGT's straightforward drive compatibility with CMOS,
ords
NMOS and open-collector TTL/HTL logic circuits in the
Inter-
common-emitter configuration Figure 1A. R
il
off time, and the sum of R
and R
sets the turn-on time. Drive-circuit requirements,
orpo-
2
however, are more complex in the common-collector
ation,
configuration Figure 1B.
emi-
In this floating-gate-supply floating-control drive scheme, R
on-
controls the gate supply's power loss, R
uctor,
time, and the sum of R
1C shows another common-collector configuration employing
va-
a bootstrapped gate supply. In this configuration, R
anche
the turn-off time, while the sum of R
nergy
on time. Note that the gate's very low leakage allows the use
ated,
of low-consumption bootstrap supplies using very low-value
capacitors. Figure 1 shows two of an IGT's strong points. In
witch
the common-emitter Figure 1A, TTL or MOS-logic circuits can
ng
drive the device directly. In the common-collector mode, you'll
ower
need level shifting, using either a second power supply Figure
up-
1B or a bootstrapping scheme Figure 1C.
lie
,
ower
©2002 Fairchild Semiconductor Corporation
Insulated-Gate Transistors Simplify AC-Motor
Application Note
controls the turn-
3
and the parallel combination of R
3
governs the turn-off
2
and R
sets the turn-on time. Figure
1
2
and R
controls the turn-
2
3
September 1993
ON
OFF
FIGURE 1A
R
CONTROLS GATE
1
SUPPLY POWER LOSS
R
CONTROLS t
2
R
+ R
CONTROLS t
1
2
1
1
defines
3
OFF
ON
In the common-collector circuits, power-switch current flowing
through the logic circuit's ground can create problems.
Optoisolation can solve this problem (Figure 2A.) Because of
the high common-mode dV/dt possible in this configuration,
you should use an optoisolator with very low isolation capaci-
tance; the H11AV specs 0.5pF maximum.
Speed Control
V
CC
R
1
LOAD
R
3
R
2
.
SIMPLE DRIVING AND TRANSITION-TIME
CONTROL
V
CC
CONTROL
INPUT
R
1
ON
OFF
15V
OFF
ON
FIGURE 1B. A SECOND POWER SUPPLY
R
1
R
R
2
3
LOAD
FIGURE 1C. BOOTSTRAPPING SCHEME
AN-7511
V
R
CC
2
------------------- -
15
25V
R
+
R
1
2
R
CONTROLS t
3
OFF
R
2
LOAD
V
R
CC
2
------------------- -
15
25V
R
+
R
1
2
R
CONTROLS t
3
OFF
R
+ R
CONTROLS t
2
3
ON
τ
5C
«
------------------------------------------------ -
+
+
I
I
2I R
CEO
GES
Application Note 7511 Rev. A1

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Summary of Contents for Fairchild AN-7511

  • Page 1 Figure 1A, TTL or MOS-logic circuits can drive the device directly. In the common-collector mode, you’ll need level shifting, using either a second power supply Figure 1B or a bootstrapping scheme Figure 1C. ©2002 Fairchild Semiconductor Corporation Insulated-Gate Transistors Simplify AC-Motor September 1993 FIGURE 1A...
  • Page 2 The photovoltaic coupler provides an isolated, controlled, remote dc supply without the need for oscillators, rectifiers or filters. What’s more, you can drive it ©2002 Fairchild Semiconductor Corporation directly from TTL levels, thanks to its 1.2V, 20mA input parameters.
  • Page 3 FIGURE 5A. YIELDING 4-kV ISOLATION, A PIEZOELECTRIC COUPLER PROVIDES TRANSFORMER-LIKE PERFORMANCE AND AN ISOLATED POWER SUPPLY. 2.5k 3.3k 2.7k 0.001 µF FIGURE 5B. THIS CIRCUIT PROVIDES THE DRIVE FOR THIS ARTICLE’S MOTOR-CONTROL CIRCUIT. ©2002 Fairchild Semiconductor Corporation 1N914 CONTROL INPUT 2N5354 GFOE1A1 10M (30FT) QSF2000C...
  • Page 4 JUSTS THE OUTPUT DEVICES’ INPUT LEVELS; THE VOLTAGE-CONTROLLED OSCILLATOR VARIES THE SWITCHING FREQUENCY AND ALSO PROVIDES THE CLOCK FOR THE 3-PHASE TIMING LOGIC. THE V/F RATIO STAYS CONSTANT TO MAINTAIN CONSTANT TORQUE REGARDLESS OF SPEED. ©2002 Fairchild Semiconductor Corporation FIGURE 6A. PROVIDING HIGH ISOLATION AT LOW COST, PULSE CONTROL INPUT FIGURE 6B.
  • Page 5 CONDUCTS FOR 165 THE DELAY IS NECESSARY TO AVOID CROSS CONDUCTION. ©2002 Fairchild Semiconductor Corporation age-doubler circuitry improves the turn-on time and also pro- vides long on-time capability. Although this design uses only a 5V supply on the primary side of a standard trigger trans- former, it provides 15V gate-to-emitter voltage.
  • Page 6 PARALLEL DIODES HAVE A SIMILAR CURRENT RATING. FIGURE 10B. SELECT R TO YIELD THE DESIRED TURN-OFF TIME. FINALLY, L1’S VALUE DETERMINES THE FAULT-CONDITION ACTION TIME. ©2002 Fairchild Semiconductor Corporation (simultaneous conduction) conditions. If a fault continues to exist for an appreciable period, inhibiting the switching regu- lator causes the inverter to shut off.
  • Page 7 FIGURE 11B. THE TIMING DIAGRAM SHOWS THE 555’S 108-KHz DRIVE TO THE PIEZO DEVICE AND THE LATTER’S SLOW RESPONSE. ©2002 Fairchild Semiconductor Corporation RMS. For the peak current of 8.766A, you can select IGT type D94FR4. This device has a reverse-breakdown SOA...
  • Page 8 The corresponding collector current is shown in Figure 12B. and its associated circuitry provide the remaining delay as follows: ©2002 Fairchild Semiconductor Corporation FIGURE 12A. THE PIEZO COUPLER’S SLOW RESPONSE IS NOT × and Q...
  • Page 9 FIGURE 14. THE LOWEST COST SENSOR IMAGINABLE, A PIECE OF COPPER WIRE SERVES AS THE CURRENT MONITOR IN THIS SYS- TEM. THE CHOPPED AND AMPLIFIED VOLTAGE DROP ACROSS THE WIRE TRIGGERS A GATE-DRIVE SHUT-OFF CIRCUIT UNDER FAULT CONDITIONS. ©2002 Fairchild Semiconductor Corporation FIGURE 13B. MOTOR CURRENT AND VOLTAGE ARE SHOWN HORIZONTAL...
  • Page 10 ONE EACH FOR THE UPPER AND LOWER IGTS AND THE HIGH-VOLTAGE SUPPLY. CHOPPER DRIVE TIMER 10µF H11AV2 ALL OPTOCOUPLERS GO TO PROTECTION CIRCUIT FIGURE 15B. THIS CIRCUIT PROVIDES CHOPPER DRIVE FOR THE COPPER-WIRE SENSOR IN FIGURE 15A. ©2002 Fairchild Semiconductor Corporation A139M 50µH 2N5355 2.7k 180k 0.001 µF 0.01µF...
  • Page 11 Q ’s storage time and the value of V turn-off. Device characteristics fix both the delay time and the fall time. ©2002 Fairchild Semiconductor Corporation Forward-Bias Latch-Up Within the IGT’s current and junction-temperature ratings, current does not flow through Q conditions.
  • Page 12 = DUT D94FQ4 FIGURE 17. USE THIS LATCHING-CURRENT TESTER TO TEST IGTS NONDESTRUCTIVELY. Q ER THAN THAT OF THE IGT’S GATE DRIVE, SO THE IGT UNDER TEST IS SWITCHED THROUGH Q LATCH-UP OCCURS. ©2002 Fairchild Semiconductor Corporation 1N914 PE-63385 A114A...
  • Page 13 â â â â CROSSVOLT â Rev. H5...