Advanced Chipset Settings
Configure DRAM Timing by SPD
DRAM ECC Mode
Hyper Path 3
Booting Graphic Adapter Priori
PEG Buffer Length
Link Latency
PEG Root Control
PEG Link Mode
Slot Power
High Priority Port Select
Second PCI-E slot mode
4-28
[Enabled]
[Auto]
[Auto]
[PCI Express/PCI]
[Auto]
[Auto]
[Auto]
[Auto]
[Auto]
[Disabled]
[Auto]