Hitachi SJ-EN Ethernet Communications Instruction Manual page 29

B113 1225
B120 1239
B121 1241
B122 1243
B123 1245
B124 1247
B125 1249
B126 1251
C – Intelligent Terminal Functions
C001 2001
C002 2003
C003 2005
C004 2007
C005 2009
C006 2011
C007 2013
C008 2015
C011 2021
C012 2023
C013 2025
C014 2027
C015 2029
C016 2031
C017 2033
C018 2035
C019 2037
C021 2041
C022 2043
C023 2045
C024 2047
C025 2049
C026 2051
C027 2053
C028 2055
C029 2057
C031 2061
C032 2063
C033 2065
1226 Free V/F control voltage 7
1240 Brake control enable
1242 Brake wait time for release
1244 Brake wait time for acceleration
1246 Brake wait time for stopping
1248 Brake wait time for confirmation
1250 Brake release frequency setting
1252 Brake release current setting
2002 Intelligent input 1 function
2004 Intelligent input 2 function
2006 Intelligent input 3 function
2008 Intelligent input 4 function
2010 Intelligent input 5 function
2012 Intelligent input 6 function
2014 Intelligent input 7 function
2016 Intelligent input 8 function
2022 Intelligent input 1 active state
2024 Intelligent input 2 active state
2026 Intelligent input 3 active state
2028 Intelligent input 4 active state
2030 Intelligent input 5 active state
2032 Intelligent input 6 active state
2034 Intelligent input 7 active state
2036 Intelligent input 8 active state
2038 FW input active state
2042 Intelligent output 11 function
2044 Intelligent output 12 function
2046 Intelligent output 13 function
2048 Intelligent output 14 function
2050 Intelligent output 15 function
2052 Alarm relay output function
2054 [FM] signal function
2056 [AM] signal function
2058 [AMI] signal function
2062 Intelligent output 11 active state
2064 Intelligent output 12 active state
2066 Intelligent output 13 active state
Page 29 of 38
Appendix
X10 R/W 0 – 8000
X1 R/W
X100 R/W 0 – 500
X100 R/W 0 – 500
X100 R/W 0 – 500
X100 R/W 0 – 500
X100 R/W 0 – 40000
X10 R/W 0 – 2000
X1 R/W 1 – 255 *
X1 R/W 1 – 255 *
X1 R/W 1 – 255 *
X1 R/W 1 – 255 *
X1 R/W 1 – 255 *
X1 R/W 1 – 255 *
X1 R/W 1 – 255 *
X1 R/W 1 – 255 *
X1 R/W
X1 R/W
X1 R/W
X1 R/W
X1 R/W
X1 R/W
X1 R/W
X1 R/W
X1 R/W
X1 R/W 0 – 26 *
X1 R/W 0 – 26 *
X1 R/W 0 – 26 *
X1 R/W 0 – 26 *
X1 R/W 0 – 26 *
X1 R/W 0 – 26 *
X1 R/W
X1 R/W
X1 R/W
X1 R/W
X1 R/W
X1 R/W
0 – 1
0 – 1
0 – 1
0 – 1
0 – 1
0 – 1
0 – 1
0 – 1
0 – 1
0 – 1
0 – 7
0 – 7
0 – 7
0 – 1
0 – 1
0 – 1