Mitel NWK954 Manual page 11

LED Drivers
Signal Pin no.
COLLED_N
P0_RXLED_N
P1_RXLED_N
P2_RXLED_N
P3_RXLED_N
P0_ERLED_N
P1_ERLED_N
P2_ERLED_N
P3_ERLED_N
ACTLED_N4
ACTLED_N3
ACTLED_N2
ACTLED_N1
ACTLED_N0
Clocks and Controls
Signal Pin no.
TXCLKIN
RESET_N
PSEN0
PSEN1
TA4
TA3
TA2
Type
109 Standard
digital output
124 Standard
digital output
122 Standard
digital output
120 Standard
digital output
118 Standard
digital output
123 Standard
digital output
121 Standard
digital output
119 Standard
digital output
117 Standard
digital output
116 Standard
115 digital outputs
114
113
112
Type
86 Digital input
no pull-up
5 Open drain
digital output and
digital input,
no pull-up
87 Digital inputs
88 with pull-ups
13 Digital inputs,
14 no pull-ups
15
Description
Collision LED. Drives an LED to indicate that a collision
has occurred either locally or elsewhere in the stack.
Port 0 activity LED. Drives an LED to indicate link/activity
on port 0. The LED is turned on when a link is established
and flashes off when a packet is being received.
Port 1 activity LED. Drives an LED to indicate link/activity on
port 1. The LED is turned on when a link is established and
flashes off when a packet is being received.
Port 2 actlvlty LED. Drives an LED to indicate link/activity on
port 2. The LED is turned on when a link is established and
flashes off when a packet is being received.
Port 3 activlty LED. Drives an LED to indicate link/activity on
port 3. The LED is turned on when a link is established and
flashes off when a packet is being received.
Port 0 error LED. Drives an LED to indicate an error on
port 0. See the text for a full description.
Port 1 error LED. Drives an LED to indicate an error on
port 1. See the text for a full description.
Port 2 error LED. Drives an LED to indicate an error on
port 2. See the text for a full description.
Port 3 error LED. Drives an LED to indicate an error on
port 3. See the text for a full description.
Utilization LEDs. Drives 5 LEDs to indicate utilization of the
network segment. See the text for a full description.
Table 6
Description
25MHz reference clock. Supplied from an external source
to all NWK954s on the local expansion bus.
Asynchronous reset. This signal is driven low by the on-
chip power-on reset circuit, but may also be driven low
externally for manual reset. Must be pulled high by an
external 5k resistor.
Power-savlng enables. 11 enables power-saving on all
ports. 01 suppresses power saving on port 0, 10
suppresses power saving on port 3, 00 suppresses power-
saving on all ports.
Scrambler seed. Each ot the four PHY modules in the
NWK954 is provided with a unique scrambler seed derived
from TA[4:2]. To ensure that all ot the local PHYs have
unique scrambler seeds, each NWK954 connected to the
local expansion bus should have its TA[4:2] input set to a
unique value by connecting to DIGVDD or DIGGND.
Table 7
NWK954
11