Dma Channels; System Interrupts; Input/Output Addresses - Epson Powerspan Product Information Manual

EPSON PowerSpan
CPU card connector pin assignments (continued)
37 Status 2
39 Ground
41 CAS Latch Even
43 CAS Latch Odd
45 Ground
47 Byte Enable 1
49 Byte Enable 3
69
73 Address Bit 19
Address Bit 21
75
Address Bit 23
77
79
61 Address Bit 25
83
85 I Ground
91 I Ground
CPU Card Power Supply and Ground Connectors
Pin 1
Pin 2
Epson PowerSpan-6
Ground
40
Ground
42
44
Odd Memory Bank Select
Even Memory Bank Select
46
Ground
48
50 Byte Enable 0
Address Bit 16
74
76 Address Bit 16
76
60 Address Bit 20
62 Address Bit 22
Pin 5
Pin 6
CPU cd power supply and
Pin Signal
1
2 Ground

DMA Channels

1
DMA channels

System Interrupts

System interrupts
NMI Parity error
0 Reserved, interval timer
1
Reserved, keyboard buffer full
2
Reserved, cascade interrupt from stave PIC
3
4
5
LPT2, if enabled
6
7
8 Real-time dock (RTC)
9
User definable; can be set for EISA option cards using the ECU
10
COM3, if enabled; can be set for E ISA option cards using the ECU
11
12
13 Resewed, math coprocessor
14
IDE hard drive controller, if enabled
15 User definable; can be set for EISA option cards using the ECU

Input/output Addresses

Input/output adddrt3st3
Pin Signal Pin Signal
3 5
4 Ground 6 Ground