Table of Contents
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Clock Generators, Jitter Cleaners, and Network Synchronizers
Contents
1
Introduction ........................................................................................................................... 3
2
Document applicability .......................................................................................................... 4
3
Cascade GUI installation ........................................................................................................ 5
4
Starting the GUI ................................................................................................................... 10
5
Functional descriptions of SiT9514x device variants ........................................................... 11
6
GUI usage ............................................................................................................................. 17
Sections in the GUI .................................................................................................................. 17
6.1.1
GUI Sections overview ............................................................................................................... 17
Chip Communication and Interrupt ........................................................................................ 18
6.2.1
Input Clock Reference section ................................................................................................... 19
6.2.2
Input section .............................................................................................................................. 20
6.2.3
PLL section ................................................................................................................................. 21
6.2.4
Output section ........................................................................................................................... 22
6.2.5
Bird's Eye section ....................................................................................................................... 23
7
SiT9514x device configuration tasks .................................................................................... 24
TASK 1: Select inputs ............................................................................................................... 24
SiT95141, SiT95145 input configuration ................................................................................. 26
7.2.1
SiT95147, SiT95148 input configuration .................................................................................... 27
7.2.2
SiT95148 clock loss configuration .............................................................................................. 28
TASK 2: Set up PLL parameters ................................................................................................ 29
TASK 3: Save or load UI configuration and program the SiT9514x device .............................. 31
7.4.1
Saving and loading the UI configuration file .............................................................................. 31
7.4.2
Using the dump function ........................................................................................................... 34
7.4.3
Saving efuse.NVM.py (I2C/SPI) files........................................................................................... 37
7.4.4
Saving the Cascade SiTime GUI state ......................................................................................... 39
7.4.5
Using the load NVM function .................................................................................................... 41
SiT9514x GUI-UM Rev 1.04
Cascade Platform of SiT9514x
ClockSoC Products
GUI User Manual
19 February 2021
www.sitime.com
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Table of Contents
Related Manuals for SiTime ClockSoC SiT95141
Summarization of Contents
6 GUI usage
6.1 Sections in the GUI
Overview of the GUI layout divided into distinct configuration sections.
6.2 Chip Communication and Interrupt
Configure chip connection and interrupt settings, covering input clock reference, input, PLL, output, and bird's eye views.
7 SiT9514x device configuration tasks
7.1 TASK 1: Select inputs
Procedure for selecting input clocks for PLLs, including division and priority settings.
7.2 SiT95141, SiT95145 input configuration
Assigning selected inputs to PLLs and configuring clock loss conditions.
7.3 TASK 2: Set up PLL parameters
Configure PLL parameters including bandwidth, lock loss, and clock switching.
7.4 TASK 3: Save or load UI configuration and program the SiT9514x
Save, load, or dump UI configuration files and program the SiT9514x device.
7.5 TASK 4: Use Realtime to set output frequency with DCO or view clock monitor status
Use the Realtime view to adjust output frequency via DCO or check clock monitor status.
8 Snapshots of specific use case scenarios
8.1 Free running DCO
Configure the GUI for free-running DCO mode using the Realtime button.
8.2 Zero-delay buffer mode
Configure zero-delay buffer mode for minimum delay between input and output clocks.
10 Usage guidelines for jitter performance optimization
10.1 Output placement and frequency planning
Guidelines for output placement and frequency planning to minimize spurs and improve jitter.
10.2 CMOS output type selection
Recommendations for selecting complimentary CMOS outputs to minimize coupling.
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