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Realtek
8051 Embedded Micro-Controller for Monitor
confidential
RTD2120-series
RTD2120-series
Fully Technology
Revision
Version 1.06
Last updated: 2007/4/3
1

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Summary of Contents for Realtek RTD2120L

  • Page 1 Realtek RTD2120-series RTD2120-series 8051 Embedded Micro-Controller for Monitor Fully Technology Revision Version 1.06 Last updated: 2007/4/3 confidential...
  • Page 2 2006/8/1 add PWM description add power supply current add description “All NC pin must be left unconnected or be connected to GND.” 1.04 added RTD2120K, QFP44 pin config. 2007/1/16 added RTD2120K, QFP44 pin description. 1.05 added 2007/2/9 reset pulse minimum length is 16 MCU clk cycle (page-10) 1.06...
  • Page 3 Realtek RTD2120-series Overview This chip is the micro-processor of LCD monitor. It uses the Designware DW8051 of Synopsys as the 8051 core of this chip and is compatible with other industry 8051 series. Also, 96Kbyte FLASH with 8 bit bus is embedded in this chip which is licensed from TSMC 0.18um e-FLASH process.
  • Page 4 Realtek RTD2120-series Pin Configurations P5.5/PWM5 P1.4 DSCL/P5.6 P1.5 DSDA/P5.7 P1.6 P1.7 ASCL/P3.0/RXD RTD2120S 44-PIN PLCC ASDA/P3.1/TXD P3.2/INT0 VSYNC P3.3/INT1 P6.7 P3.4/T0 P6.6/CLKO1 P3.5/T1 P6.5 P5.5/PWM5 P1.4 P1.5 DSCL/P5.6 P1.6 DSDA/P5.7 P1.7 ASCL/P3.0/RXD RTD2120L 48-PIN LQFP ASDA/P3.1/TXD P3.2/INT0 VSYNC P3.3/INT1 P6.7 P3.4/T0...
  • Page 5 Realtek RTD2120-series P5.5/PWM5 P1.4 DSCL/P5.6 P1.5 DSDA/P5.7 P1.6 P1.7 ASCL/P3.0/RXD RTD2120K 44-PIN ASDA/P3.1/TXD P3.2/INT0 VSYNC P3.3/INT1 P6.7 P3.4/T0 P6.6/CLKO1 P3.5/T1 P6.5 confidential...
  • Page 6 Realtek RTD2120-series Block Diagram DDC_RAM1 DDC_RAM2 TSMC FLASH Internal RAM 128 byte 128 byte 96K byte 256 byt`e F900-F97F F980-F9FF 00-FF Routing FLASH/ISP IRAM_bus interface Watch dog I2C slave 1 Timer 2 timer I2C slave 2 Interrupt Timer 0 MEM_bus...
  • Page 7: P5.5/Pwm5

    Realtek RTD2120-series Pin Description Pin No. Name Internal Default Pin Type Description Pull output PLCC LQFP Up/Down value P5.0/PWM0 1(P5.0) Open General purpose I/O / Drain PWM0 output P5.1/PWM1 1(P5.1) Open General purpose I/O / Drain PWM1 output P5.2/PWM2 1(P5.2)
  • Page 8 Realtek RTD2120-series Pin No. Name Internal Default Pin Type Description Pull output PLCC LQFP QFP Up/Down value P6.0/ADC0 1(P6.0) Push-Pull General purpose I/O / ADC 0 input P6.1/ADC1 1(P6.1) Push-Pull General purpose I/O / ADC 1 input P6.2/ADC2 1(P6.2) Push-Pull General purpose I/O / ADC 2 input P6.3/ADC3...
  • Page 9 Realtek RTD2120-series DW8051 micro-processor The DW8051 contained in RTD2120 is compatible with industry standard 803x/805x and provides the following design features and enhancements to the standard 8051 microcontroller: 1. High speed architecture Compared to standard 8051, the DW8051 processor core provides increased performance by executing instructions in a 4-clock bus cycle, as opposed to the 12-clock bus cycle in the standard 8051.
  • Page 10 Realtek RTD2120-series The Clock Control register (CKCON – 8Eh) determines these timer speeds. When the relevant CKCON bit is a logic 1, the device uses 4 clocks per cycle to generate timer speeds. When the control bit is set to a zero, the device uses 12 clocks for timer speeds. The reset condition is a 0. CKCON.5 selects the speed of Timer 2.
  • Page 11 Realtek RTD2120-series To activate software reset, set FF39[1](SOF_RST). When software reset is triggered, it will reset all modules except debug mode. Watchdog timer(WDT) The watchdog timer generates reset when it is overflowed. The watchdog timer resets almost the same modules as software reset except itself(watchdog timer module).
  • Page 12 Realtek RTD2120-series RCAP2H 1. 16-bit timer/counter with capture The Timer 2 capture mode is the same as the 16-bit timer/counter with the addition of the capture registers and control signals. If EXEN2 = 0, Timer2 is a 16-bit timer/counter . The C/T2 bit determines whether the 16-bit counter counts osc cycles (divided by 4 or 12), or high-to-low transitions on the P1.0 pin.
  • Page 13: Confidential

    Realtek RTD2120-series Reset Addr Register Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value (Hex) (Hex) CKCON SPC_FNC 0 P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 MPAGE P1_R P1.7 P1.6 P1.5 P1.4...
  • Page 14: Asda/P3.1/Txd

    Realtek RTD2120-series 0: Pin “P5.1/PWM1“ is P5.1 PWM1E 1: Pin “P5.1/PWM1“ is PWM1 0: Pin “P5.0/PWM0“ is P5.0 PWM0E 1: Pin “P5.0/PWM0“ is PWM0 Register::Pin_share1 0xFF01 Name Bits Read/Write Reset State Comments A_DDC_PIN_ 0: ADC DDC ports are connected to...
  • Page 15: Confidential

    Realtek RTD2120-series All pins have 5V tolerance except four ADC pins: “P6.0/ADC0”, “P6.1/ADC1”, “P6.2/ADC2” and ”P6.3/ADC3”. Register::Port5_output_enable 0xFF03 Name Bits Read/Write Reset State Comments P57OE 0: P5.7 is input pin 1: P5.7 is output pin P56OE 0: P5.6 is input pin 1: P5.6 is output pin...
  • Page 16: Confidential

    Realtek RTD2120-series P76OE 0: P7.6 is input pin 1: P7.6 is output pin Reserved Reserved Register::Port1_pad_type 0xFF09 Name Bits Read/Write Reset State Comments P17_PPO 0:P1.7 is standar 8051 I/O 1:P1.7 is Push-Pull output P16_PPO 0:P1.6 is standar 8051 I/O 1:P1.6 is Push-Pull output P15_PPO 0:P1.5 is standar 8051 I/O...
  • Page 17: Confidential

    Realtek RTD2120-series Register::Port53_pin_reg 0xFF53 Name Bits Read/Write Reset State Comments Reserved Reserved Input/output value of P5.3 Register::Port54_pin_reg 0xFF54 Name Bits Read/Write Reset State Comments Reserved Reserved Input/output value of P5.4 Register::Port55_pin_reg 0xFF55 Name Bits Read/Write Reset State Comments Reserved Reserved Input/output value of P5.5...
  • Page 18: Confidential

    Realtek RTD2120-series Register::Port61_pin_reg 0xFF59 Name Bits Read/Write Reset State Comments Reserved Reserved Input/output value of P6.1 Register::Port62_pin_reg 0xFF5A Name Bits Read/Write Reset State Comments Reserved Reserved Input/output value of P6.2 Register::Port63_pin_reg 0xFF5B Name Bits Read/Write Reset State Comments Reserved Reserved Input/output value of P6.3...
  • Page 19: Confidential

    Realtek RTD2120-series Register::Port67_pin_reg 0xFF5F Name Bits Read/Write Reset State Comments Reserved Reserved Input/output value of P6.7 Register::Port76_pin_reg 0xFF60 Name Bits Read/Write Reset State Comments Reserved Reserved Input/output value of P7.6 Register::Port77_pin_reg 0xFF61 Name Bits Read/Write Reset State Comments Reserved Reserved Input/output value of P7.7...
  • Page 20: Confidential

    Realtek RTD2120-series low_threshold_voltage 00:1.8V 01:2.0V 10:2.2V 11:2.4V reserved reserved A/D Converter RTD2120 has embedded 4 channels of analog-to-digital converter. The ADCs convert analog input voltage on the four A/D input pins to four 6-bit digital data stored in XFRs (FF0C~FF0F) sequentially.
  • Page 21: Confidential

    Realtek RTD2120-series Name Bits Read/Write Reset State Comments ADC1_CONV Converted data of ADC1 _DATA reserved Register::ADC2_convert_result 0xFF0E Name Bits Read/Write Reset State Comments ADC2_CONV Converted data of ADC2 _DATA reserved Register::ADC3_convert_result 0xFF0F Name Bits Read/Write Reset State Comments ADC3_CONV Converted data of ADC3...
  • Page 22: Confidential

    Realtek RTD2120-series Register::PLL_control 0xFF10 Name Bits Read/Write Reset State Comments PLL_STA PLL status 0: normal operation 1: PLL abnormal or PLL power down DVSET Test mode vctrl set 11(0.8v) 10(1.0v) 01(1.2v) 00(1.4v) reserved WD_RST 0: No effect 1: Watchdog reset...
  • Page 23: Rtd2120S

    Realtek RTD2120-series Register::regulator_control 0xFF13 Name Bits Read/Write Reset State Comments reserved bandgap voltage select 00: 1.14v 01: 1.20v 10: 1.27v 11: 1.34v V_SEL Regulator 1.8v voltage select 000: 2.22 001: 2.12 010: 2.0 011: 1.9 100: 1.8 101: 1.7 110: 1.6 111: 1.5...
  • Page 24: Rtd2120K

    Realtek RTD2120-series 0: Disable 1: Enable A_DBN_EN ADC DDC De-bounce Enable 0: Disable 1: Enable (with crystal/4) A_DDC_EN ADC DDC Channel Enable Bit 0: MCU access Enable 1: DDC channel Enable Register::ADC_DDC_control 0xFF21 Name Bits Read/Write Reset State Comments A_DBN_CLK...
  • Page 25: Confidential

    Realtek RTD2120-series D_DDC_EN DVI DDC Channel Enable Switch 0: MCU access Enable 1: External DDC access Enable Register::DVI_DDC_control 0xFF24 Name Bits Read/Write Reset State Comments D_DBN_CLK De-bounce clock divider _SEL 00: 1/1 reference clock 01: 1/2 reference clock 1X: 1/4 reference clock...
  • Page 26: Confidential

    Realtek RTD2120-series Name Bits Read/Write Reset State Comments IIC_ADDR IIC Slave Address to decode CH_SEL Channel Select 0: from ADC DDC 1: from DVI DDC Register::IIC_sub_in 0xFF28 Name Bits Read/Write Reset State Comments IIC_SUB_AD IIC Sub-Address Received Register::IIC_data_in 0xFF29 Name...
  • Page 27: Confidential

    Realtek RTD2120-series If IIC_SLAVE latched, this bit is set to “1” SLV_I Write 0 to clear. Register::IIC_IRQ_control 0xFF2C Name Bits Read/Write Reset State Comments AWI_EN 0: Disable the A_WR_I signal as an interrupt source 1: Enable the A_WR_I signal as an interrupt...
  • Page 28: Confidential

    Realtek RTD2120-series PWM clock generator first stage output second stage 1/(N+1) output Register::PWM_clock_control 0xFF30 Name Bits Read/Write Reset State Comments PWM_EN 0: Disable PWM output 1: Enable PWM output PWM0_CK 0: Select first stage output 1: Select second stage output...
  • Page 29: Confidential

    Realtek RTD2120-series Register::PWM2_duty_width 0xFF34 Name Bits Read/Write Reset State Comments PWM2_ DUT PWM2 duty width Register::PWM_source_select 0xFF35 Name Bits Read/Write Reset State Comments reserved Reserved PWM5_SEL 00: PWM5 is the same as PWM0 01: PWM5 is the same as PWM1...
  • Page 30: Confidential

    Realtek RTD2120-series 1: bypass reserved Reserved CNT1 The number N of counter1 000~111: 1~8 When ISP mode is enabled, watchdog will be disabled by hardware. *When BY_CNT2 and BY_CNT3 are all assigned one (bypass), watchdog will be counted by CNT2...
  • Page 31: Confidential

    Realtek RTD2120-series PAGE_ADDR Flash page address from 64K to 96K reserved Reserved SOF_RST Software reset for debug mode 0: No effect 1: reset RTD2120 STR_P_ERS Start page erase 0: page erase complete 1: write 1 to start page erase Register::RAM_test...
  • Page 32: Confidential

    Realtek RTD2120-series Memory map of XFR Register name Addr Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 Pin_share0 FF00 IIC2E PWM5E PWM4E PWM3E PWM2E PWM1E PWM0E A_DDC_P D_DDC_P PIN_INT1 Pin_share1 FF01 CLKO2E IIC1E IN_SEL IN_SEL Pin_share2 FF02 CLKO1E ADC3E ADC2E...
  • Page 33: Confidential

    Realtek RTD2120-series Register name Addr Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0 IIC_status FF2B A_WR_I D_WR_I 128VS_I STOP_I D_OUT_I D_IN_I SUB_I SLV_I 128VSI_E STOPI_E IIC_IRQ_control FF2C AWI_EN DWI_EN DOI_EN DII_EN SUBI_EN SLVI_EN PWM_clock_contr PWM0_C PWM1_C PWM2_C PWM_CK FF30 PWM_EN...
  • Page 34: Confidential

    Realtek RTD2120-series Electric Specification DC Characteristics Table 1 Absolute Maximum Ratings PARAMETER SYMBOL UNITS Voltage on VDD Voltage on Input (5V tolerant) Voltage on Output or I/O or NC ±3.5 Electrostatic Discharge ±100 Latch-Up ºC Ambient Operating Temperature ºC Storage temperature (plastic) Table 2 DC Characteristics/Operating Condition (0℃<TA<70℃;...
  • Page 35: Confidential

    0.20 0.004 0.008 VERSION 9.00 BSC 0.354 BSC CHECK DWG NO PKGC-065 7.00 BSC 0.276 BSC DATE 5.50 0.217 REALTEK SEMICONDUCTOR CORP. 9.00 BSC 0.354 BSC 7.00BSC 0.276 BSC 5.50 0.217 0.17 0.20 0.27 0.007 0.008 0.011 0.50 BSC 0.0196 BSC 3.5o...
  • Page 36: Confidential

    18.16 PAGE 17 OF 22 0.085 0.100 0.115 2.16 2.54 2.92 CHECK DWG NO. L044 - 1 Albert Chang 0.004 0.10 DATE MAR. 08.2005 - - - - REALTEK SEMI-CONDUCTOR CO., LTD 0° 10° 0° 10° θ - - confidential...
  • Page 37 Realtek RTD2120-series Ordering Information: The available RTD2120 related products are listed below: Part No. Flash Size Package Type RTD2120K 96K byte 44 QFP RTD2120L 96K byte 48 LQFP RTD2120S 96K byte 44 PLCC RTD2120L-LF 96K byte 48 LQFP (lead free)

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