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Aideepen B09Y1YXLQP Manual

Logic analyzer

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Aideepen Logic Analyzer
1. What is a logic analyzer:
A logic analyzer is a waveform test device similar to an oscilloscope. It collects specified signals and displays
them to developers in a graphical or statistical way. Developers use these graphical timing signals to analyze
hardware or software errors according to the protocol. A logic analyzer is an indispensable device in design. It
can quickly locate errors, discover and solve problems, and achieve twice the result with half the effort.
Especially when analyzing timing, such as 1wire, I2C, UART, SPI, CAN and other data, using a logic analyzer
to solve problems is very fast.
The following is a typical example of Saleae analyzing a UART communication sequence and an IIC sequence:
From the figure, we can clearly see that the UART communication clearly displays the hexadecimal number
0xA9 at a baud rate of 9600, and the IIC signal below is a sequence process of reading data. Channel 1 is SDA,
and channel 2 is SCL. It is clearly displayed in channel 1. The green dot indicates the start bit and the red dot
indicates the end bit. The first one is to write data to the device address 0x90 (w means write), the second one
indicates that the address to be read is 0x40, and the third one is to resend the device address and read data.
The fourth byte is the read data 0xA9. Doesn't it feel very convenient and fast?
2. Software installation and basic software applications
First install the logic software. The software is included in the CD and can also be downloaded from the official
website. Download address: http://www.saleae.com/downloads. There are various system versions supported
here. Please download the system support version you need:

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Summary of Contents for Aideepen B09Y1YXLQP

  • Page 1 Aideepen Logic Analyzer 1. What is a logic analyzer: A logic analyzer is a waveform test device similar to an oscilloscope. It collects specified signals and displays them to developers in a graphical or statistical way. Developers use these graphical timing signals to analyze hardware or software errors according to the protocol.
  • Page 2 After downloading, double-click to install. After installation, a shortcut will appear on the desktop: Double-click the shortcut and the following interface will appear after entering: When the logic analyzer software is not plugged in, the top will show Disconnected, and you can start simulation.
  • Page 3: Functional Operation

    3. Sampling Depth and Sampling Rate There are two very important parameters in the logic analyzer, namely sampling depth and sampling frequency. You can see that in this software, there are two places where you can choose the size of the number, the first is sampling depth, and the second is sampling frequency.
  • Page 4 The trigger setting is for your convenience. You can start collecting when the useful signal starts to be sent, so as to avoid collecting a large number of useless signals at the beginning. Here, you can set the channel you use as the trigger. You can set the rising edge to start collecting data, the falling edge to start collecting data, or the high and low levels to start collecting data.
  • Page 5 Width: is the length of time in the graph. Period: is the period in the diagram. That is to say, if we analyze this level separately, what is its cycle? And the following DUTY Cycle is naturally to analyze this level as a cycle, what is its duty cycle? Frequency is the reciprocal of the cycle, that is, the frequency.
  • Page 6 following protocol types. Click the small plus signs at the position in the lower right corner to get the following protocols: For these types of waveforms, not only the waveform can be displayed, but also the protocol value can be directly displayed in binary, decimal, hexadecimal, ASCII code, etc.
  • Page 7 Then set the logic analyzer to start collecting, open the logic analyzer operating software, and select ASYNC SERIAL in the lower right corner. Then enter the ASYNC SERIAL (asynchronous serial port) interface, which is actually called UART. Why do we only see the setting of one line? This is because our common UARTs are basically full-duplex, one send and one receive, and the protocol used by each line is the UART protocol, to be more specific, it is ASYN SERIAL.
  • Page 8 Next, we analyze the collected data. First, we right-click on the graph, and zoom out to see the waveforms from a higher altitude. In the process of zooming out, we see the following graph: This means that the intervals between two consecutive transmissions of "abcdefg" are different and the difference is quite large.
  • Page 9 Let's try again and increase the sampling rate to 24M. The calculated baud rate is 9609, which is a bit unexpected. Generally speaking, the allowable error of UART is 10%. Isn't it a bit surprising that the transmitter sends at such an accurate rate? Why can the UART baud rate tolerate an error within 10%? Generally speaking, 1 start bit + 8 data bits + 1 stop bit is a common setting, with a total of 10 BITs.
  • Page 10 11111111 10100010 01011101, then we sort them into hexadecimal, which are 0x00, 0xff, 0x45, 0xBA, and the infrared decoding is complete. The meaning of these 4 bytes is that the first two bytes are the device code, that is, all the home appliance remote controls of this model have this code.