Revision History Revision History The revision history describes the changes that were implemented in the document. The changes are listed by revision, starting with the most current publication. Revision 5.0 Following is a list of changes that are made in this revision. •...
Getting Started Getting Started ® The Microchip PolarFire FPGA Splash Kit (MPF300-SPLASH-KIT) is an RoHS-compliant, cost- optimized kit with general-purpose interfaces that enables you to evaluate the basic features of the PolarFire family of FPGAs. The PolarFire Splash Kit supports the following interfaces: •...
Getting Started Block Diagram The following block diagram shows all the components of the PolarFire Splash Board. Figure 1 • PolarFire Splash Board Block Diagram CON1 On-Board PCIe Edge FMC LPC Connector Oscillator Connector 125 MHz XCVR Lane LPC[0:33] Lane 4 REFCLK0 XCVR1_Lane3 XCVR1 Lane 0 GPIO Bank2...
Getting Started • Low power transceivers • High-performance communication interfaces The PolarFire Splash Board supports several standard interfaces, including: • VSC8541 with an RJ45 connector for 10/100/1000 Mbps Ethernet • One full-duplex transceiver lane connected through FMC LPC connector • FMC LPC connector •...
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Getting Started Table 2 • PolarFire Splash Board Components (continued) Component Label on Board Description ® Power-monitoring Microchip SmartFusion FPGA (A2F200M3F-1FGG256I) FPGA used for power sequence and monitoring the voltage rails on the PolarFire Splash Board. Clocks On-board 50-MHz 50-MHz clock oscillator with single-ended output. clock oscillator 125-MHz oscillator (differential LVDS output) which is the input to the DS08MB200TSQ clock MUX buffer.
Getting Started Handling the Board Pay attention to the following points while handling or operating the board to avoid possible damage or malfunction: • Handle the board with electrostatic discharge (ESD) precautions to avoid damage. For information about using the board with ESD precautions, see https://www.microchip.com/document- portal/doc_view/126483-esd-appnote.
Installation and Settings Installation and Settings This section provides information about the software and hardware settings required to run the pre-programmed demo design on the PolarFire Splash Board. Software Settings Download and install the latest release of Libero® SoC from the Microchip website, and register for a free Silver License from microchipDIRECT.
Installation and Settings For the locations of various jumpers and test points on the PolarFire Splash Board, see Figure 17, page 23. 3.2.2 Power Supply LEDs The following table lists the power supply LEDs on the PolarFire Splash Board. Table 4 • Power Supply LEDs Description DS1 - Green...
Installation and Settings The following figure shows voltage rails (12 V, 5 V, 3.3 V, 2.5 V, 1.8 V, 1.2 V, and 1.0 V) available on the PolarFire Splash Board. Figure 3 • Voltage Rails on PolarFire Splash Board 12V DC - JACK 12VO_IN IRF_12V VDD25/VDDA25...
Board Components and Operations Board Components and Operations This section describes the key components of the PolarFire Splash Board and provides information about important board operations. For device datasheets, visit the PolarFire Kits webpage. DDR4 Memory Interface Two 4-Gb DDR4 SDRAM chips are provided to serve as flexible volatile memory for user applications. The DDR4 interface is implemented in HSIO bank0 and bank1.
Board Components and Operations The following figure shows the SPI Flash interface of the PolarFire Splash Board. Figure 5 • SPI Flash Interface PolarFire FPGA SC-SPI BANK3 Flash (1 Gb) For more information, see the Board Level Schematics document (provided separately). Transceivers The PolarFire MPF300TS-1FCG484EES device has eight transceiver lanes, which can be accessed through the PCIe Edge connectors and FMC LPC connectors on the board.
Board Components and Operations Figure 6 • XCVR0 Interface PolarFire FPGA Lane0/ RXD Lane1/ RXD Lane2/ RXD Lane3/ RXD PCIe Edge connector Lane0/ TXD Lane1/ TXD Lane2/ TXD Lane3/ TXD REFCLK0 4.3.2 XCVR1 Interface The XCVR1 interface has one lane that is connected to FMC LPC connector. The signals are routed in the PCB as follows: •...
Board Components and Operations Microchip PHY (VSC8541) The VSC8541 device, offered in a small (8 mm × 8 mm), single-row, quad-flat no-leads (QFN) package is designed for space-constrained 10/100/1000BASE-T applications. It features integrated line-side termination to conserve board space, lower electromagnetic induction (EMI), and improve system performance.
Board Components and Operations The following figure shows the power management system on the PolarFire Splash Board. Figure 10 • Power Management PolarFire Power Management Schematic VDD25/VDDA25_MON_SIG 12V_MON_SIG 12V Input PMOS PMOS VDD_IN Jack 12V to 5V/16A IR3895MTRPBF 12V Enable VDD_IN Power VDD25/5A...
Board Components and Operations The following figure shows the FTDI interface of the PolarFire Splash Board. Figure 11 • FTDI Interface Bank4 UART SIGNALS JTAG Header Bank3 JTAG SIGNALS PolarFire FPGA Port C J5, 6, 7, 8, 9 USB mini B Port A FT4232 connector...
Board Components and Operations User Interface The PolarFire Splash Board has user LEDs and push-button switches. 4.9.1 User LEDs The board has eight active-high LEDs that are connected to the PolarFire device. The following table lists the on-board user LEDs. Table 7 •...
Board Components and Operations The following figure shows the switches interface of the PolarFire Splash Board. Figure 15 • Switches Interface 3.3 V PolarFire FPGA 4.9.3 Slide Switches (DPDT) The SW3 slide switch powers the device ON or OFF using a +12 V external DC jack. 4.9.4 DIP Switches (SPST) The SW8 DIP switch has four connections to the PolarFire device.
Board Components and Operations The following figure shows the SPST interface on the PolarFire Splash Board. Figure 16 • SPST Interface 3.3 V DIP1 DIP2 PolarFire FPGA DIP3 DIP4 For more information, see the Board-Level Schematics document (provided separately). 4.9.5 FMC LPC Connector The PolarFire Splash Board has an FMC LPC connector (J17) for the daughter cards for future expansion of interfaces.
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Board Components and Operations Table 10 • J17 FMC Connector Pinout (continued) FMC Pin PolarFire Pin Number-J17 FMC Net Name Number PolarFire Pin Name LPC_SCL_B4 GPIO244PB2/CCC_SW_CLKIN_S_0 LPC_SDA_B4 GPIO244NB2 FMC_LPC_SERDES1_REFCLK0_P XCVR_1A_REFCLK_P FMC_LPC_SERDES1_REFCLK0_N G20 XCVR_1A_REFCLK_N LPC_LA01_CC_P GPIO34PB2/CCC_SE_PLL1_OUT1 LPC_LA01_CC_N GPIO34NB2 LPC_LA05_P GPIO32PB2/DQS/CCC_SE_PLL1_OUT0 LPC_LA05_N GPIO32NB2/DQS LPC_LA09_P GPIO5PB2...
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Board Components and Operations Table 10 • J17 FMC Connector Pinout (continued) FMC Pin PolarFire Pin Number-J17 FMC Net Name Number PolarFire Pin Name LPC_LA29_P GPIO2PB2/DQS LPC_LA29_N GPIO2NB2/DQS LPC_LA31_P GPIO1PB2 LPC_LA31_N GPIO1NB2 LPC_LA33_P GPIO253PB2 LPC_LA33_N GPIO253NB2 LPC_PRSNT_M2C_L GPIO22PB2 LPC_CLK0_M2C_P GPIO28PB2/CCC_SE_PLL0_OUT1 LPC_CLK0_M2C_N GPIO28NB2 LPC_LA02_P...
Board Component Placement Board Component Placement The following figure shows the placement of various components on the PolarFire Splash Board silkscreen. Figure 17 • Silkscreen Top View Microchip UG0786 Revision 5...
Demo Design Demo Design For information about how to run the JESD204B standalone demo design, see DG0796: PolarFire FPGA Splash Kit JESD204B Standalone Interface Demo Guide. Microchip UG0786 Revision 5...
Appendix: Programming PolarFire FPGA Using the On-Board FlashPro5 Appendix: Programming PolarFire FPGA Using the On-Board FlashPro5 The PolarFire Splash Board includes an on-board FlashPro5 programmer. An external programmer hardware is, therefore, not required to program the PolarFire device. The device can be programmed using the FlashPro software installed on the host PC.
Appendix: Power Monitoring Appendix: Power Monitoring The SmartFusion A2F200 device on the PolarFire Splash Board has an in-built power monitoring program that monitors the voltage and current on different PolarFire power rails, as well as the total device power, eliminating the need for any manual measurements. The power measurements for various components are displayed in the Microchip PowerMonitor GUI installed on the host PC.
Appendix: Power Monitoring Installing PowerMonitor To install PowerMonitor: Extract the contents of the Polarfire_Splash_Kit_Power_Monitor.zip file. In the Polarfire_Splash_Kit_Power_Monitor\Installer folder, double-click the setup.exe file. Follow the instructions displayed in the installation wizard. After successful installation, PowerMonitor appears in the Start menu of the host PC. Click Start, and then click PowerMonitor.
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Appendix: Power Monitoring The PowerMonitor GUI has the following panes: • CurrentMonitor—This pane displays the current and power measured on the VDD_REG, VDDA_REG, VDDA25, and VDD25_DUT rails. It also displays total device power. The I/Os are excluded. • VoltageMonitor—This pane displays the present voltage on each voltage rail. It also displays the maximum and minimum voltage measured on each voltage rail over the time period of the PowerMonitor application.The Voltage Rail plot in the pane displays the voltage plot of the selected rail as a blue line.
Appendix: Errata Appendix: Errata This section contains information about known issues specific to the PolarFire Splash Board. 10.1 Hot swapping not supported on programming headers and PCIe connector Hot swapping is not supported on the programming headers (J15 and 16) and on the PCIe Connector (CON1).
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