Table of Contents
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Pin Out Table
Pin Name
RX_LOS
RGND
RGND
MOD_DEF(0)
MOD_DEF(1)
MOD_DEF(2)
TX_DISABLE
TGND
TGND
TX_FAULT
Overview of internal interface signal Definition
Pin Name
Pin #
Receiver Signals
RGND
2,3,11,14 Receiver Ground (may be connected with TGND in GBIC)
VDDR
15
Receiver +5 volt (may be connected with VDDT in GBIC)
-RX_DAT
12
Receive Data, Differential PECL
+RX_DAT
13
Receive Data, Differential PECL
Receiver Loss of Signal, logic high, open collector
RX_LOS
1
compat-ible,4.7 K to 10 K Ohm pullup to VDDT on host
Transmitter Signals
TGND
8,9,17,20 Transmitter Ground (may be connected with RGND internally) Ground, to GBIC
VDDT
16
Transmitter +5 volt (may be connected with VDDR in GBIC)
+TX_DAT
18
Transmit Data, Differential PECL
-TX_DAT
19
Transmit Data, Differential PECL
Transmitter Disable, logic high, open collector compatible,4.7
TX_DISABLE
7
K to 10 K Ohm pullup to VDDT on GBIC
Transmitter Fault, logic high, open collector compatible,4.7 K
TX_FAULT
10
to 10 K Ohm pullup to VDDT on host
Control Signals
GBIC module definition and presence, bit 0,4.7 K to 10 K Ohm
MOD_DEF(0)
4
pullup to VDDT on host
GBIC module definition and presence, bit 1,4.7 K to 10 K Ohm
MOD_DEF(1)
5
pullup to VDDT on host
GBIC module definition and presence, bit 2,4.7 K to 10 K Ohm
MOD_DEF(2)
6
pullup to VDDT on host
DELTA ELECTRONICS, INC.
Pin#
Sequence
1
2
2
2
3
2
4
2
5
2
6
2
7
2
8
2
9
2
10
2
Name/Function
4
Sequence
Pin#
1
11
1
12
1
13
1
14
2
15
2
16
1
17
1
18
1
19
1
20
GBIC-1250B5QR
Pin Name
RGND
-RX_DAT
+RX_DAT
RGND
VDDR
VDDT
TGND
+TX_DAT
-TX_DAT
TGND
Signal Specification
Ground, to GBIC
Power, to GBIC
High speed serial, from
GBIC
High speed serial, from
GBIC
Low speed, from GBIC
Power, to GBIC
High speed serial, to GBIC
High speed serial, to GBIC
Low speed, to GBIC
Low speed, from GBIC
Low speed, from GBIC
Low speed, from GBIC
Low speed, from GBIC
2008/01
Rev. 0A
www.deltaww.com
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