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Summary of Contents for Nations N32G430 Series
- Page 1 Design guide N32G430 series hardware design guide Introduction This document details the hardware design checklist for N32G430 series MCUs to provide users with hardware design guidance. Nations Technologies ALL Rights Reserved...
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Page 2: Table Of Contents
CONTENS N32G430 Series MCU Hardware Design Checklist ................. 1 Introduction to Power Supply ....................1 VDD power supply scheme ...................... 1 External pin reset circuit ......................1 External clock circuit ........................ 1 Boot Pin Connection ......................... 2 Independent ADC Converter ....................2 IO power-on pulse processing.................... -
Page 3: N32G430 Series Mcu Hardware Design Checklist
1. N32G430 Series MCU Hardware Design Checklist 1.1 Introduction to Power Supply The operating voltage (VDD) of N32G430 series chips is 2.4V~3.6V. Mainly: VDD, VDDA pins. For details, please refer to the relevant datasheet. 1.2 VDD power supply scheme VDD is the main power supply of MCU, which must be powered by a stable external power supply, the voltage range is 2.4V~3.6V, all VDD pins need to place a 0.1uF decoupling capacitor nearby, and one VDD pin needs to add a... -
Page 4: Boot Pin Connection
For details, please refer to the description of the external clock characteristics in the relevant datasheet. 1.5 Boot Pin Connection The figure below shows the external connections required for the N32G430 series chip to select the boot memory. Please refer to the relevant section of the datasheet for the startup mode. - Page 5 6） When using ADC, the maximum value of RAIN cannot be too large, and it needs to comply with the following formula: 1-3 Influence of series resistance of ADC input port Figure 3/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China...
- Page 6 6-bit slow channel 6-bit 62.1 71.9 461.4 471.1 905.0 914.7 2235.8 2245.6 4453.9 4463.6 Figure ADC sampling schedule 4/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China...
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Page 7: Io Power-On Pulse Processing
The following figure shows the waveform of the development board N32G430C8L7-STB 1.0 after the IO (PA9) is added with a 10K pull-down resistor during the power-on process: 5/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China... -
Page 8: Io Withstand Voltage
In a multi-layer PCB, the ground plane acts as an important charge source, which can offset the charge on the electrostatic discharge source, which is conducive to reducing the electrostatic field band. The ground 6/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China... -
Page 9: Esd Protection Devices
1.9.2 ESD Protection Devices In the actual product design, the chip itself has a certain anti-static ability. The static level of N32G430 series MCU ESD (HBM) mode is +/-4KV, but if there is a higher ESD protection level requirement, and the pins of the chip need Direct external connection is used as the output or input port of the product. -
Page 10: Pa13/Pa14 Note Of Use
All power pins need to be properly connected to power. These connections, including pads, wires, and vias, should have as low impedance as possible. The method of increasing the wiring width is usually adopted, and decoupling 8/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China... -
Page 11: Minimum System Reference Design Schematic
Figure Typical layout of VDD/VSS pins 3. Minimum System Reference Design Schematic 3.1 LQFP48 Figure N32G430 Series LQFP48 Package Minimum System Reference Design Schematic 9/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. -
Page 12: Lqfp32
3.2 LQFP32 Figure N32G430 Series LQFP32 Package Minimum System Reference Design Schematic 10/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China... -
Page 13: Qfn20
3.3 QFN20 Figure N32G430 Series QFN20 Package Minimum System Reference Design Schematic 11/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China... -
Page 14: Qfn28
3.4 QFN28 Figure N32G430 Series QFN28 Package Minimum System Reference Design Schematic 12/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China... -
Page 15: Qfn32
3.5 QFN32 Figure N32G430 Series QFN32 Package Minimum System Reference Design Schematic 13/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China... -
Page 16: Qfn48
3.6 QFN48 Figure N32G430 Series QFN48 Package Minimum System Reference Design Schematic 14/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China... -
Page 17: Tssop20
Figure Figure N32G430 series, which mainly reflect the design of power supply decoupling capacitors, clocks, reset circuits, etc. The clock circuit depends on the user's design, and the chip supports internal high-speed and low-speed clocks available to the user for selection. -
Page 18: Pcb Layout Reference
The VDD pin of the chip is short-circuited with the GND test, and the chip is abnormally hot after power-on. Problem check: Whether the VDD decoupling capacitor has insufficient withstand voltage to cause the capacitor to break 16/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China... -
Page 19: Gpio Damage
Problem check: Refer to Section 1.6 to confirm whether the hardware and software settings meet the requirements of ADC considerations. 17/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China... -
Page 20: Version History
1. 1.12 chapter add PA13 and PA14 pin configuration in V1.1 2022-8-23 STANDBY mode 1. Add section 1.13 Precautions for using GPIO V1.2.0 2022-11-1 18/ 19 Nations Technologies Inc. Tel：+86-755-86309900 Email：info@nationstech.com Address: Nations Tower, #109 Baoshen Road, Hi-tech Park North. Nanshan District, Shenzhen, 518057, P.R.China... -
Page 21: Notice
It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. In no event shall NATIONS be liable for any direct, indirect, incidental, special, exemplary, or consequential damages arising in any way out of the use of this document or the Product.
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