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VersaLogic VL-EPM-35 Leopard Reference Manual

Intel dual core based dual board computer with dual gigabit ethernet, sata, pc/104-plus, video, audio, and spx
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Reference
Manual
DOC. REV. 10/17/2013
VL-EPM-35
(Leopard)
Intel Dual Core Based Dual
Board Computer with Dual
Gigabit Ethernet, SATA,
PC/104-Plus, Video, Audio, and
SPX

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Summary of Contents for VersaLogic VL-EPM-35 Leopard

  • Page 1 Reference Manual DOC. REV. 10/17/2013 VL-EPM-35 (Leopard) Intel Dual Core Based Dual Board Computer with Dual Gigabit Ethernet, SATA, PC/104-Plus, Video, Audio, and...
  • Page 2 Copyright © 2013 VersaLogic Corp. All rights reserved. Notice: Although every effort has been made to ensure this document is error-free, VersaLogic makes no representations or warranties with respect to this product and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose.
  • Page 3 Note: This is a private page for VL-EPM-35 users that can be accessed only be entering this address directly. It cannot be reached from the VersaLogic homepage. The VersaTech KnowledgeBase is an invaluable resource for resolving technical issues with your VersaLogic product.
  • Page 4 Contents Introduction ........................1 Description .......................... 1 Features and Construction ..................1 Technical Specifications ..................... 2 VL-EPM-35 Block Diagram ....................3 Thermal Considerations ...................... 4 CPU Die Temperature ................... 4 Model Differences ....................4 RoHS Compliance ......................4 About RoHS ......................4 Warnings ..........................
  • Page 5 Audio (JN3, JS6) ......................36 Digital Audio (JN3) ..................... 36 Audio Line In/Out (JS6) ..................36 SPX™ Expansion Bus (JN4) .................... 37 VersaLogic SPX Expansion Modules ..............37 SPI Registers ......................38 SATA Ports (JN5) ......................41 Ethernet Interface (JN6, JS3).................... 41 BIOS Configuration .....................
  • Page 6 Contents Product Code Register ...................... 50 Revision Level Register ....................51 Special Control Register ....................52 Watchdog Hold Register ....................53 Fan/Tachometer Control Register ..................53 Appendix A – References.................... 54 VL-EPM-35 Reference Manual...
  • Page 7 Introduction Description EATURES AND ONSTRUCTION The VL-EPM-35 is a feature-packed dual board computer (DBC) designed for OEM control projects requiring fast processing and designed-in reliability and longevity (product lifespan). Its features include: Intel Core 2 Duo processor, 2.26 Audio stereo line in, stereo line out ...
  • Page 8 Description Technical Specifications Specifications are typical at 25°C with 5.0V supply unless otherwise noted. Board Size: LPT Interface: 3.55” x 3.775” (PC/104 standard) with connector Bi-directional/EPP/ECP compatible overhangs in designated connector areas BIOS: Storage Temperature: Phoenix Embedded BIOS© with StrongFrame® -40°...
  • Page 9 Description VL-EPM-35 Block Diagram Intel Core 2 Duo Processor Clock DDR3 LVDS SVGA SO-DIMM BIOS Intel GS45 Chipset Gigabit RJ-45 Ethernet Serial ATA PCIe 82574IT Intel ICH9 I/O Controller Digital Audio Mini I/O FPGA LPC47N217 Mini- Blade PC/104-Plus Serial (PCI) Port 5 I/O Connector TOP BOARD...
  • Page 10 ODEL IFFERENCES VersaLogic offers both standard and extended temperature models of the VL-EPM-35. The basic operating temperature specification for both models is shown below. VL-EPM-35S: 0° C to +60° C free air, no airflow ...
  • Page 11 Description Warnings LECTROSTATIC ISCHARGE Electrostatic discharge (ESD) can damage circuit boards, disk drives and other Warning! components. The circuit board must only be handled at an ESD workstation. If an approved station is not available, some measure of protection can be provided by wearing a grounded antistatic wrist strap.
  • Page 12 BIOS and FPGA code updates. VL-EPM-35 Support Page The VersaTech KnowledgeBase also contains a wealth of technical information about VersaLogic products, along with product advisories. Click the link below to see all KnowledgeBase articles related to the VL-EPM-35. VersaTech KnowledgeBase If you have further questions, contact VersaLogic Technical Support at (503) 747-2261.
  • Page 13  USB mouse  SATA hard drive  USB CD-ROM drive  The following VersaLogic cables are recommended. CBR-1201 – Video adapter cable  CBR-3406 – Utility I/O cable and breakout board  CBR-0701 – SATA data cable  CBR-1008 – Power adapter cable ...
  • Page 14 Configuration and Setup OS Installation USB CD- CD-ROM ROM Drive USB Keyboard and USB Mouse CBR-3406 CBR-0701 SATA Hard Drive Analog SVGA CBR-1008 CBR-0401 VL-EPM-35 JN11 LEOPARD CBR-1201 Power Supply Figure 2. Typical Start-up Configuration 1. Install Memory Insert the DRAM module into SO-DIMM socket JN13 on the bottom of the board and ...
  • Page 15 CMOS Setup See VersaLogic KnowledgeBase article VT1638 – VL-EPM-35 Leopard CMOS Setup Reference for complete information on CMOS Setup parameters and variations for the VL-EPM-35E. Operating System Installation The standard PC architecture used on the VL-EPM-35 makes the installation and use of most of the standard x86 processor-based operating systems very simple.
  • Page 16 Physical Details Dimensions and Mounting The VL-EPM-35 complies with all PC/104-Plus standards. Dimensions are given below to help with pre-production planning and layout. 3.575 3.375 3.175 3.041 0.125 DIA x4 Use 3mm or #4 standoffs 0.471 0.195 0.000 -0.200 Figure 3. VL-EPM-35 Top Board Dimensions and Mounting Holes (Top View) (Not to scale.
  • Page 17 Physical Details 3.575 3.375 3.175 0.125 0.000 -0.200 Figure 4. VL-EPM-35 Bottom Board Dimensions and Mounting Holes (Top View) (Not to scale. All dimensions in inches.) VL-EPM-35 Reference Manual...
  • Page 18 Physical Details 1.28 2.44 0.67 0.06 0.60 0.44 0.06 Figure 5. VL-EPM-35 Height Dimensions (Side View) (Not to scale. All dimensions in inches.) VL-EPM-35 Reference Manual...
  • Page 19 Physical Details CBR-3406 D IMENSIONS 5.50 5.10 1.57 1.17 1.95 1.38 0.06 Figure 6. VL-CBR-3406 Dimensions and Mounting Holes (Top and Side Views) (Not to scale. All dimensions in inches.) VL-EPM-35 Reference Manual...
  • Page 20 Physical Details ARDWARE SSEMBLY The VL-EPM-35 consists of two boards that are mounted together with four 5mm x 15.25mm M3 threaded hex male/female standoffs using the corner mounting holes. These standoffs are secured to the top circuit board using four pan head screws. Care must be taken not to damage components near the corner mounting holes Caution: when tightening standoffs with nut driver tools.
  • Page 21 Physical Details External Connectors VL-EPM-35 C ONNECTOR OCATIONS MiniBlade Digital Audio SATA Ethernet Power Input LVDS JN10 JN11 SVGA CPU – Heatsink – Fan Figure 8. Connector Locations –Top Board (Top View) VL-EPM-35 Reference Manual...
  • Page 22 Physical Details Inter-board PC-104-Plus (PCI) JN13 SO-DIMM JN14 Board-to-Board Figure 9. Connector Locations – Top Board (Bottom View) VL-EPM-35 Reference Manual...
  • Page 23 Physical Details PC/104-Plus (PCI) USB SSD Mounting Hole USB SSD Board-to-Board Serial Ports 3-4 Audio Row A Row B JS7, JS9 PC/104 (ISA) Power Figure 10. Connector Locations – Bottom Board (Top View) VL-EPM-35 Reference Manual...
  • Page 24 Physical Details VL-EPM-35 C ONNECTOR UNCTIONS AND NTERFACE ABLES Table 1 provides information about the function, mating connectors, and transition cables for VL-EPM-35 connectors. Page numbers indicate where a detailed pinout or further information is available. JN connectors are located on the north board; JS designators on the south board. Table 1: Connector Functions and Interface Cables Transition Pin 1 Location...
  • Page 25 Physical Details – VL-CBR-3406 ONNECTOR OCATIONS Battery Paddle Board Speaker Serial Port 5 USB1-4 SATA LED Reset (top) PLED (bottom) USB1 USB2 USB3 USB4 = Pin 1 Figure 11. VL-CBR-3406 Connector Locations (Top and Side Views) CBR-3406 C ONNECTOR UNCTIONS AND ATING ONNECTORS Table 2: VL-CBR-3406 Connector Functions and Interface Cables...
  • Page 26 Physical Details Jumper Blocks UMPERS HIPPED ONFIGURATION Figure 12. Jumpers As-Shipped – Top Board VL-EPM-35 Reference Manual...
  • Page 27 Physical Details Figure 13. Jumpers As-Shipped – Bottom Board VL-EPM-35 Reference Manual...
  • Page 28 In – Backup system BIOS selected Out – Primary system BIOS selected The Primary system BIOS is field upgradeable using the BIOS upgrade utility. See http://www.VersaLogic.com/private/wildcatsupport.asp more information. VN1[3-4] Serial Port 5 RS-422 Termination In – Port terminated with 120 Ohms Out –...
  • Page 29 +5VDC Power Input Ground +5VDC Power Input Figure 14 shows the VersaLogic standard pin numbering for this type of 10-pin power connector and the corresponding mating connector. Some manufacturers include a pin-1 indicator that corresponds to pin-10 of the JN8/JS8...
  • Page 30 A good power delivery method eliminates such problems as voltage drop and lead inductance. Using the VersaLogic approved power supply and power cable will ensure high quality power delivery to the board. Customers who design their own power delivery methods should take into consideration the guidelines below to ensure good power connections.
  • Page 31 Physical Details ITHIUM ATTERY A lithium battery is mounted on the bottom board of the VL-EPM-35. The I/O connector at JN2 provides a second battery interface. Installing the VL-CBR-3406 breakout board adds a secondary battery, effectively doubling the battery life of the VL-EPM-35. Both batteries are diode protected, so if one is damaged or drained, the other will not be affected.
  • Page 32 Physical Details System RAM The VL-EPM-35 has one DDR3 SO-DIMM socket with the following characteristics: Storage Capacity Up to 4GB  Voltage 1.5V  Type 800 MHz PC3-6400 or 1067 MHz PC3-8500  CMOS RAM CMOS RAM LEARING You can install a jumper at VN1 pins 5-6 for a minimum of three seconds to erase the contents of the CMOS RAM and the real-time clock.
  • Page 33 Physical Details Real Time Clock The VL-EPM-35 features a year 2000-compliant, battery-backed 146818-compatible real-time clock/calendar chip. Under normal battery conditions, the clock maintains accurate timekeeping functions when the board is powered off. ETTING THE LOCK The CMOS Setup utility (accessed by pressing the Delete key during the early boot cycle) can be used to set the time and date of the real time clock.
  • Page 34 Physical Details //Main void main() char keypressed = 0; irq_count = 0; _clearscreen( _GCLEARSCREEN _settextposition(2,1); printf( "FANTACH IRQ DEMO -- Stop the spinning fan to perform test...\n" _settextposition(4,1); printf( "Setting new ISR for IRQ 7...\n" outp( 0x20, 0x20 //Clear any pending IRQs old_isr = _dos_getvect( 0x0F...
  • Page 35 Physical Details int_hit = TRUE; //clear slow fan status bit...(this will trigger a new IRQ, //if the fan is still stalled.) outp ( FANREG1, FANREG1 SLOWFAN outp ( FANREG2, FANREG2 SLOWFAN outp( 0x20, 0x20 //EOI (*old_isr)(); //call old isr VL-EPM-35 Reference Manual...
  • Page 36 Interfaces and Connectors 34-Pin I/O Connector (JN2) The JN2 34-pin I/O connector incorporates one serial port, USB ports, LEDs, speaker, and the reset button. Table 5 illustrates the function of each pin and the pinout assignments to connectors on the VL-CBR-3406 breakout board. Table 5: JN2 I/O Connector Pinout CBR-3406 CBR-3406...
  • Page 37 Interfaces and Connectors Serial Ports (JN2, JS3, JS5) The VL-EPM-35 features five 16550-based serial ports, as described below. Table 6: VL-EPM-35 Serial Ports Port Type Connector Serial Port 1 RS-232,16C550 compatible, all JS3 to VL-CBR-8006 handshake lines implemented DB-9 (labeled COM1) Serial Port 2 RS-232/422/485,16C550 compatible, JS3 to VL-CBR-8006...
  • Page 38 Interfaces and Connectors ERIAL ONNECTORS Serial Ports 1 and 2 The interface to Serial Ports 1 and 2 are provided by connector JS3 on the bottom board. (See "80-Pin I/O Connector (JS3)" for a pinout of connector JS3.) VL-CBR-8006 provides two DB-9 connectors labeled COM1 and COM2.
  • Page 39 Interfaces and Connectors Serial Ports 3 and 4 The interface to Serial Ports 3 and 4 are provided by connector JS5 on the bottom board. VL-CBR-1012 provides two DB-9 connectors. The pinouts of the JS5 connector and the DB-9 connectors on the VL-CBR-1012 cable are shown below. Table 9: Serial Port 3 and 4 Pinout JS5 Serial VL-CBR-1012...
  • Page 40 Interfaces and Connectors Serial Port 5 The interface to Serial Port 5 is provided by connector JN2 on the top board. (See "34-Pin I/O Connector (JN2)" for a pinout of the JN2 connector.) VL-CBR-3406 provides a DB-9 connector at J3. The pinout of this connector is shown below. Table 10: Serial Port 5 Pinout VL-CBR-3406 JN2 Pin RS-232...
  • Page 41 Interfaces and Connectors BIOS C ONFIGURATION The USB channels use a number of PCI interrupts (see “Interrupt Configuration”). CMOS Setup is used to select the IRQ line routed to each PCI interrupt line. Programmable LED (JN2, JS3) Connectors JN2 and JS3 include a output signals for a software controlled LED. For connector JN2, connect the cathode of the LED to JN2 pin 24;...
  • Page 42 IGITAL UDIO The digital audio interface on the VL-EPMp-34 allows you to connect an external audio codec to the system. Contact VersaLogic Sales for available external codecs. This interface is protected against ESD damage. Table 11: JN3 Audio Connector Signal Name...
  • Page 43 XPANSION ODULES VersaLogic offers a number of SPX modules that provide a variety of standard functions, such as analog input, digital I/O, CANbus controller, and others. These are small boards (1.2” x 3.775”) that can mount on the PC/104 stack, using standard PC/104 stand-offs, or up to two feet away info@VersaLogic.com...
  • Page 44 Interfaces and Connectors SPI R EGISTERS A set of control and data registers are available for SPI transactions. The following tables describe the SPI control registers (SPICONTROL and SPISTATUS) and data registers (SPIDATA3-0). SPICONTROL (READ/WRITE) CA8h (or C98h) CPOL CPHA SPILEN1 SPILEN0 MAN_SS...
  • Page 45 Interfaces and Connectors SPISTATUS (READ/WRITE) CA9h (or C99h) IRQSEL1 IRQSEL0 SPICLK1 SPICLK0 HW_IRQ_EN LSBIT_1ST HW_INT BUSY Table 15: SPI Control Register 2 Bit assignments Mnemonic Description IRQ Select – These bits select which IRQ will be asserted when a hardware D7-D6 IRQSEL interrupt from a connected SPI device occurs.
  • Page 46 Interfaces and Connectors SPIDATA0 (READ/WRITE) CAAh (or C9Ah) MSbit LSbit SPIDATA1 (READ/WRITE) CABh (or C9Bh) MSbit LSbit SPIDATA2 (READ/WRITE) CACh (or C9Ch) MSbit LSbit SPIDATA3 (READ/WRITE) CADh (or C90h) MSbit LSbit SPIDATA3 contains the most significant byte (MSB) of the SPI data word. A write to this register will initiate the SPI clock and, if the MAN_SS bit = 0, will also assert a slave select to begin an SPI bus transaction.
  • Page 47 The VL-CBR-8006 breakout cable includes an RJ-45 connector. These interfaces are protected against ESD damage. While these controllers are not NE2000-compatible, it is widely supported. Drivers are readily available to support a variety of operating systems. See VersaLogic website for latest OS support. BIOS C ONFIGURATION Both Ethernet controllers use PCI interrupt INTA#.
  • Page 48 Connector JS2 on the bottom board provides an interface for an eUSB solid state drive (SSD). The VersaLogic VL-F15 series of eUSB SSDs come in sizes of 2 GB and 4 GB, as well as standard and extended temperature ratings. Contact VersaLogic Sales for information.
  • Page 49 Interfaces and Connectors Video Interface (JN9, JN11) An on-board video controller integrated into the chipset provides high performance video output for the VL-EPM-35. The VL-EPM-35 can also be operated without video attached. See “Console Redirection.” ONFIGURATION The VL-EPM-35 uses a shared-memory architecture. It supports two types of video output, SVGA and LVDS Flat Panel Display.
  • Page 50 Interfaces and Connectors Table 20: LVDS Flat Panel Display Pinout Pin Signal Name Function Ground No Connection LVDSA3 Diff. Data 3 (+) LVDSA3# Diff. Data 3 (–) Ground LVDSCLK0 Differential Clock (+) LVDSCLK0# Differential Clock (–) Ground LVDSA2 Diff. Data 2 (+) LVDSA2# Diff.
  • Page 51 Interfaces and Connectors ONSOLE EDIRECTION The VL-EPM-35 can be operated without using the on-board video output by redirecting the console to a serial communications port. CMOS Setup and some operating systems such as DOS can use this console for user interaction. Console redirection settings are configured on the Features tab of CMOS Setup.
  • Page 52 Interfaces and Connectors PC/104 – ISA (JS7/JS9) The VL-EPM-35 provides full support of the PC/104 (ISA) bus, including support of 16-bit I/O and memory transfers. PC/014 modules can be added to the stack below the VL-EPM-35. Most PC/104 cards will work, but be sure to check the requirements of your PC/104 card against the limitations listed below.
  • Page 53 Interfaces and Connectors Table 22: 80-Pin I/O Connector Pinout External External Connector Signal Connector Signal LPT1 Strobe USB CH0 +5V (Protected)* Auto feed USB CH1 Channel 0 Data + Channel 0 Data - DB-25F Data bit 1 Printer error 10-pin Ground Data bit 2 .1"...
  • Page 54 Interrupt Configuration The VL-EPM-35 has the standard complement of PC type interrupts. Up to six IRQ lines can be allocated as needed to PCI devices. There are no interrupt configuration jumpers. All configuration is handled through CMOS Setup. Table 23: VL-EPM-35 IRQ Settings ...
  • Page 55 Interfaces and Connectors Table 24: PCI Interrupt Settings  = default setting  = allowed setting PCI Interrupt Source INTA# INTB# INTC# INTD# INTE# INTF#  82541ER Ethernet  82574IT Ethernet  Audio  SATA  USB EHCI 1  USB EHCI 2 ...
  • Page 56 Special Registers Product Code Register PRODCODE (Read/Write) CA0h (or C90h) PLED Table 25: Product Code Register Bit Assignments Mnemonic Description Light Emitting Diode — Controls the programmable LED on connector JN2 and PLED JS3. 0 = Turns LED on 1 = Turns LED off Product Code —...
  • Page 57 Mnemonic Description FPGA Revision Level — These bits are hard-coded to represent the FPGA D7-D3 revision. Contact VersaLogic Support for further information. These bits are read-only. Extended Temperature — Indicates operating temperature range. 0 = Standard temperature range 1 = Extended temperature range This bit is read-only.
  • Page 58 Special Registers Special Control Register SCR (Read/Write) CA2h (or C92h) BIOS_JMP BIOS_OR BIOS_SEL CMOD1 CMOD0 WDOG_STAT WDOG_RST Reserved Table 27: Special Control Register Bit Assignments Mnemonic Description System BIOS Selector Jumper Status — Indicates the status of the system BIOS_JMP BIOS selector jumper at VN1[1-2].
  • Page 59 Special Registers Watchdog Hold Register WDHOLD (Write Only) CA3h (or C93h) If the watchdog timer is enabled, software must periodically refresh the watchdog timer at a rate faster than the timer is set to expire (1000 ms minimum). Writing 5Ah to WDHOLD resets the watchdog timeout period.
  • Page 60 Appendix A – References Intel Core 2 Duo Datasheet Intel Core 2 Duo Chipset Intel GS45 Datasheet Intel GS45 Intel ICH9 Datasheet Intel ICH9 Ethernet Controller Intel 82574IT Datasheet Intel 82574IT Ethernet Controller Intel 82541ER Datasheet Intel 82541ER Ethernet Controller Super I/O Chip LPCC47N217 Datasheet SMSC LPC47N217...