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Summary of Contents for Daheng Imaging POLS-C12-4T-G38
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China Daheng Group, Inc. Beijing Image Vision Technology Branch POLARIS Frame Grabber User Manual Version: V1.0.4 Date: 2025-04-03...
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All rights reserved. No parts of this manual may be used or reproduced, in any forms or by any means, without prior written permission of China Daheng Group, Inc. Beijing Image Vision Technology Branch. The right is also reserved to modify or change any parts of this manual in the future without prior notification. All other trademarks are the properties of their respective owners.
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Preface We really appreciate your choosing of the products of DAHENG IMAGING. POLARIS Frame Grabber is the newest product of DAHENG IMAGING. CoaXPress Frame Grabber is based on CoaXPress 2.0 protocol, simultaneously backward compatible with CoaXPress 1.0 protocol. GEV Frame Grabber is based on GigE Vision V1.2 protocol. Frame Grabber is easy to install and use, and well suitable for industrial testing, medical treatment, scientific research, education and other fields.
1. Introduction 1.1. Series Introduction The POLARIS Frame Grabber is a brand new product independently developed by DAHENG IMAGING, with optional CoaXPress interface and GEV interface. Based on the PCIe Gen3 interface bus and CoaXPress 2.0 protocol, CoaXPress frame grabber can achieve high speed image acquisition and data transmission.
2. Precautions 2.1. Safety Claim Before installing and using DAHENG IMAGING products, please carefully read this manual and strictly comply with the usage requirements. And ensure to use the product in specified conditions, otherwise it may cause equipment malfunction. Our company will not bear any legal responsibility for any damage or injury caused by improper use of this product and disregard of safety instructions.
2.Precautions Personal Safety It is strictly prohibited to perform device wiring, dismantling, maintenance and other operations while powered on, otherwise there may be a risk of electric shock. It is prohibited to touch the frame grabber directly during using, otherwise there may Warning be a risk of burns.
3.Installation Guidelines 3. Installation Guidelines 3.1. Hardware Installation Before installing POLARIS Frame Grabber, Please follow operations below: Turn off the PC power. Release human static electricity. Check the available PCIe slots. CoaXPress frame grabber: Check the PoCXP power interface on the PC end. x16 PCIe x1 PCIe 32bit PCI Slot...
3.Installation Guidelines Figure 3-3 Schematic diagram of hardware connection for frame grabber Camera connection: Taking CXP frame grabber as example, the way of connecting the external camera and the frame grabber is shown as Figure 3-3, users can choose single, dual or quad channel according to the actual usage.
GenTL Interface This interface is developed according to the standard of general transport layer in Gen<i>Cam standard, DAHENG IMAGING follows the Gen<i>Cam standard and provides the GenTL interface to users, by which users can develop their own control program. In addition, users can use some third-party software that supports Gen<i>Cam standard to control the frame grabber or camera, such as HALCON.
3.Installation Guidelines Figure 3-4 GEN<i>CAM standard schematic diagram 3.3. Frame Grabber Power CXP Frame Grabber Power over PCIe Insert frame grabber’s PCIe interface into the PC’s corresponding PCIe slot, and then the frame grabber will take power from the power rail from +12V and +3.3V to ensure that the frame grabber can work normally.
3.Installation Guidelines 3.4.2. Driver Installation The steps of Galaxy SDK installation under windows are as follows: Download corresponding version installation package from www.daheng- imaging.com/en/Downloads. Please contact our technical support if not available. Run the installer. Follow the instructions of the installation wizard to complete the installation process. During the installation process, you can choose the camera interface you need (USB2.0, USB3 Vision, GigE Vision, CoaXPress, GEV etc.).
6.Electrical Interface 6.1.1.2. POLS-C12-2T-G34 Figure 6-3 CoaXPress frame grabber connectors and LED distribution Connector/LED descriptions: Symbol Description PoCXP (power over CXP connector) Onboard I/O connector (DH60-27P) C2C connector A, B CXP interface L1, L2 CXP indicator LEDs 6.1.1.3. POLS-C12-1T-G34 Figure 6-4 CoaXPress frame grabber connectors and LED distribution Connector/LED descriptions: Symbol Description...
6.Electrical Interface 6.1.2. GEV Frame Grabber Figure 6-5 GEV frame grabber connectors distribution Figure 6-6 GEV frame grabber LED distribution Connector/LED descriptions: Symbol Description Onboard I/O connector (430225026S11B0) A, B, C, D 10GigE interface AG, AY BG, BY Indicator LEDs CG, CY DG, DY 6.2.
6.Electrical Interface 4 LEDs simultaneously flashing red at a Internal fault of the frame grabber frequency of 12.5Hz Single LED flashing green and orange The PoCXP corresponding to Line has been turned on and alternately at a frequency of 12.5Hz no camera detected Single LED flashing orange at a frequency The PoCXP corresponding to Line has been turned off and...
6.Electrical Interface The CXP interface is used to transmit image data captured by the camera, and provide power to external PoCXP supported cameras. Each copper shaft of CXP can provide a maximum power of 17W within the range of 24VDC ± 2V, exceeding which may cause damage or abnormal operation of the external CXP camera.
6.Electrical Interface Diagram Definition Description +12VIN Auxiliary +12V input +12VIN Auxiliary +12V input +12VIN Auxiliary +12V input Ground Ground Ground Table 6-3 PoCXP power supply connector definition The polarity of the power supply should not be reversed, otherwise it may burn out the frame grabber.
6.Electrical Interface Rising time delay (TRIGIN_R_DELAY): The time from LINE0+ rising to half of the amplitude to INPUT0 rising to 90% Falling time delay (TRIGIN_F_DELAY): The time from LINE0+ dropping to half of the amplitude to INPUT0 dropping to 10% 6.7.1.4.
6.Electrical Interface Falling time (tf) ~1.6 Rising time delay = td+tf ~3.0 Falling time delay = ts+tr ~2.537 Table 6-8 Delay time of opto-isolated output circuit in typical application environment OUTPUT6 LINE6+ Figure 6-17 Parameter of opto-isolated output circuit Delay time (td): the response time from OUTPUT6 rises to 50% of amplitude to LINE6+ decreases to 90% of amplitude ...
6.Electrical Interface Maximum output current: ≤ 5mA Input pulse frequency: ≤ 5MHz The input common mode voltage is unstable state between -0.2V ~ 0.2V, please avoid inputting voltage values within this range 6.7.1.6. Line4 (TTL Input/Output) Circuit TTL input/output circuit is shown in Figure 6-19: 3.3V Quad bus buffer (Three state output)
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6.Electrical Interface When configuring Line4 as output pin, the FPGA_OUTPUT signal needs to be configured as high level, the equivalent circuit inside the frame grabber is shown in Figure 6-22: 3.3V Quad bus buffer (Three state output) OE_1 FPGA_OUTPUT FPGA_INPUT/OUTPUT OE_3 Line4 connector...
6.Electrical Interface 6.7.2. GEV Frame Grabber 6.7.2.1. Onboard I/O port The connector uses 26 pin dual row, 0.050" pin space with cover. The specific model is: 430225026S11B0. Figure 6-23 Connector Onboard I/O module include 2 differential inputs, 4 opto-isolated outputs and 4 TTL inputs/outputs. The signal definition of connector pins are shown in Table 6-10.
6.Electrical Interface 6.7.2.2. Line0/1 (Differential Input) Circuit Differential input circuit is shown as follow: 3.3V 3.3V Line0/1+ F_INPUT0 connector Line0/1- Figure 6-24 Differential input circuit Input common mode voltage: -7.0V ~ +7.0V Input high level of differential voltage (VIDH): > 0.2V ...
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6.Electrical Interface Transistor voltage Test Condition Output current (mA) drop (turn on, unit V) EXVCC: 5V, Rexternal: 1kΩ 0.90 4.16 EXVCC: 12V, Rexternal: 1kΩ 0.97 11.11 EXVCC: 24V, Rexternal: 1kΩ 1.04 23.08 Table 6-11 Transistor voltage drop and output current of Line2/3/4/5 in typical conditions ...
6.Electrical Interface 6.7.2.4. Line6/7/8/9 (Bi-directional TTL) Circuit Bi-directional TTL circuit is shown as follow: 3.3V Quad bus buffer (Tri-state output) OE_1 FPGA_OUTPUT FPGA_INPUT/OUTPUT OE_3 Line6/7/8/9 connector Figure 6-27 Bi-directional TTL circuit When configuring Line6/7/8/9 as input, the FPGA_OUTPUT signal needs to be configured as low level, and the equivalent circuit inside the frame grabber is shown in Figure 6-28: Quad bus buffer (Tri-state output) OE_1...
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6.Electrical Interface When configuring Line6/7/8/9 as output pin, the FPGA_OUTPUT signal needs to be configured as high level, the equivalent circuit inside the frame grabber is shown in Figure 6-30: 3.3V Quad bus buffer (Tri-state output) OE_1 FPGA_OUTPUT FPGA_INPUT/OUTPUT OE_3 Line6/7/8/9 connector Figure 6-30 TTL output circuit...
7.Features 7. Features 7.1. I/O Control 7.1.1. I/O Type 7.1.1.1. CXP Frame Grabber The frame grabber provides 20 I/O pins for accessing onboard I/O control signals. The I/O numbers and their types are shown in the table below: Level Level Position Direction Position...
7.Features For unidirectional I/O, "LineMode" is a read-only item that displays the current direction of the I/O After configuring bi-directional I/O to input, it can be used and configured according to normal input I/O After configuring bidirectional I/O to output, it can be used and configured according to normal output I/O 7.1.2.
7.Features The frame grabber’s default output source for power on is Timer0. The high or low level of the output signal is the same as the corresponding state of the selected signal source. UserOutput In this mode, users can set frame grabber’s output level by themselves. For example: selecting Line4 as output, output source as UserOutput4, and controlling the UserOutputValue by users.
7.Features Read the logic status of all Lines The frame grabber can obtain the signal status of all Lines, the signal state level can reflect the I/O level. The frame grabber’s all Line level status are shown in the following table, the default power on value is 0xC0300.
7.Features 7.2. Basic Property Settings 7.2.1. ImageFormatControl Users can query the frame grabber’s original image information, as shown in follows: Image Info Meaning Width The width of the camera output image Height The height of the camera output image PixelSize Pixel bit depth of the output image Bayer format of the output image, when the camera outputs non Bayer images, PixelFormat...
7.Features RGB10/12/14 RGB10/12/14/16 Disable RGB10/12/14/16 Enable 10/12/14/16 RGB10/12/14/16 Disable RGB16 RGB10/12/14/16 Enable BGR16 7.2.2.2. GEV Frame Grabber The frame grabber will process the acquired images, and users can query the frame grabber output images through OutPixelFormat. The OutPixelFormat is affected by the functions of "ReverseY", "BayerConversion", and "RedBlueSwap".
7.Features Pixel Format Alignment When using the reverse function of the frame grabbers, the alignment of the Bayer format will change. The mapping relationship is shown in the table below: Input Pixel Format Output Pixel Format BayerRG8/10/12/14/16 BayerGB8/10/12/14/16 BayerGR8/10/12/14/16 BayerBG8/10/12/14/16 BayerGB8/10/12/14/16 BayerRG8/10/12/14/16...
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7.Features Centered around R To interpolate the R, G and B values of point R marked above, take 3×3 regions from that center point (R), interpolation method as follows: Centered around B To interpolate the R, G and B values of point B marked above, take 3×3 regions from that center point (B), interpolation method as follows: ...
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7.Features When n is even, take the average of sorted numbers and ( +1) as the output. The interpolation method and calculation method are as follows: f ( x ) = median ( x ,…,x Centered around G To interpolate the R, G and B values of point G marked above, take 3×3 regions from that center point (G), interpolation method as follows: =median(R =median(B...
7.Features Centered around B To interpolate the R, G and B values of point B marked above, take 3×3 regions from that center point (B), interpolation method as follows: =median(G =median(R 7.3.2. RedBlueSwap When the frame grabber’s output format is RGB or BGR, users can switch the positions of the red and blue components in pixels for Enable through RedBlueSwap.
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7.Features Start sending trigger packet Trigger packet sending end Line0 LinkTrigger0 CXPTrigger Packet Time Figure 7-4 Timing diagram of CXPTrigger package output by frame grabber Example 2: Trigger the camera on any edge of UserOutput8 by sending CXPTrigger. See setting process as follows: ...
7.Features CameraTriggerACKMissCnt The frame grabber can count the number of times of the unreceived response packets after sending the CXPTtrigger packet, which can be queried through CameraTriggerACKMissCnt. Users can reset the CameraTriggerACKMissCnt by CameraTriggerACKMissCntReset function. 7.5. CoaXPress Power Supply Each CoaXPress host connector can provide power to the camera through the CoaXPress cable. 7.5.1.
7.Features Power supply unit is responsible for safe power supply, meeting the requirements of the CoaXPress host for the CoaXPress standard, which means: Can provide 24VDC power supply with a maximum power of 17W for each connector of the device. Equipped with overcurrent protection device.
7.Features Users can view the frame grabber’s PoCXP configuration status through CxpPocxpConfigurationStatus: Option Description Auto Automatically execute PoCXP, connect CXP supported cameras and supply power Turn off PoCXP, no power supply Compound state (read only), when some Lines are configured as Auto while others are Compound configured as Off, LineSelector’s value is All, and CxpPocxpConfigurationStatus is Compound...
7.Features disconnect the PoCXP power supply and do not execute the PoCXP detection process. If users execute CxpPocxpAuto before executing CxpPocxpTripReset, and the value of CxpPocxpConfigurationStatus is Auto, then the frame grabber does not perform the PoCXP detection process, and the frame grabber will restore the PoCXP detection process and PoCXP power supply until users execute CxpPocxpTripReset successfully.
7.Features 7.6. EncoderControl Encoders are used to trigger cameras for acquisition at specific positions or movements. Frame grabber can be connected to an AB type incremental encoder. After decoding, the frame grabber can generate pulses at fixed positions, intervals, or specific directions of motion to trigger the internal timer of the frame grabber.
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7.Features EncoderOutputMode StepForwardWhilePositive EncoderMultiplier EncoderPositionTrigger 2147483600 Prevent encoder counter overflow and EncoderResetSource PositionTrigger reset counter near maximum value Connect I/O according to the actual EncoderSourceA ----- situation Connect I/O according to the actual EncoderSourceB ----- situation Ensure initial state by writing any EncoderValue numerical value to zero TimerSelector...
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7.Features Scenario2: Forward motion for scanning and imaging Scenario description: Under normal circumstances, the conveyor belt moves forward and completes the scanning and imaging of A and B. At this time, the conveyor belt moves in the opposite direction due to interference and reaches the starting point of B.
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7.Features Forward Forward Forward Scenario3: Scanning and imaging occurs when moving in any direction Scenario description: Under normal circumstances, the conveyor belt moves forward and completes the scanning imaging of A and B. At this time, due to interference with the conveyor belt, it moves in the opposite direction and reaches the starting point of B.
7.Features Backward Backward Backward Forward Forward Forward Forward Forward 7.6.1. EncoderSelector The CXP frame grabber provides independent AB type incremental encoder decoding module. The decoding module selection is completed through the EncoderSelector function. After completing the selection, the relevant properties of the currently selected decoding module can be obtained, and the properties can be modified.
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7.Features EncoderSourceA EncoderSourceB Counter Time Figure 7-7 The encoder moves forward when in Forward mode EncoderSourceA EncoderSourceB Counter Time Figure 7-8 The encoder moves in reverse when in Forward mode When the phase of EncoderSourceA lags behind EncoderSourceB under Backward mode, the counter auto-increment, and when EncoderSourceA leads before EncoderSourceB, the counter auto-decrement.
7.Features 7.6.4. EncoderValueSource The counter generated by the frame grabber parsing encoder signal supports forcing the counter to be set to "-1" when the rising edge of the selected signal arrives. Users can configure EncoderValueSource in the application to achieve the above operations. EncoderValueSource options and it’s corresponding trigger timing are shown as following: CXP Frame Grabber Options GEV Frame Grabber Options...
7.Features 7.6.6. EncoderMultiplier The frame grabber supports to multiply the encoder’s increment or decrement. Users can achieve this function by setting EncoderMultiplier. EncoderMultiplier function is achieved by adjusting the counter step interval, and do not perform multiply operation for EncoderSourceA and EncoderSourceB. For example: Set EncoderDirection to Forward, EncoderMultiplier to 5, then the increment or decrement of the encoder each time is 5.
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7.Features EncoderSourceA EncoderSourceB Counter Output sig nal Time Figure 7-12 Schematic diagram of output pulse timing The encoder can generate a pulse signal when moving to a same value of position as the EncoderPositionTrigger. When the encoder keep staying in a position without moving, it will not generate repeated pulse signals.
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7.Features The encoder can generate a pulse signal from any direction to a position that with an integer multiple of the EncoderPositionStartTrigger’s setting value. After the encoder reaches the position that meets the conditions, the decoding module lags 0.144µs to generate a trigger pulse When the encoder keep staying in a position without moving, it will not generate repeated pulse signals.
7.Features Usage instruction Example: Set the EncoderOutputMode to STEP_ANY and the EncoderDirection to Forward, then the time of the output pulse is generated as follows: EncoderSourceA EncoderSourceB Counter Output sig nal Time Figure 7-15 Schematic diagram of output pulse timing When the encoder position is greater than 0, any direction of motion can generate a pulse signal.
7.Features 7.6.11. EncoderResetSource The counter generated by the frame grabber analysis encoder signal supports forcibly clearing the counter to zero when the rising edge of the selected signal arrives. Users can configure the EncoderResetSource function to achieve the above operations. The operation of EncoderResetSource and its corresponding trigger timing are shown in the table below: CXP Frame Grabber GEV Frame Grabber...
7.Features T0: Delay time, set through TimerDelay, with precision of 1µs. T1: Duration time, set through TimerDuration, with precision of 1µs. T2: Delay time1, set through TimerDelay2, with precision of 1µs. T3: Duration time1, set through TimerDuration2, with precision of 1µs. The frame grabber supports a total of 4 Timers.
7.Features The frame grabber supports a total of 4 Timers. When setting up, you should first select the Timer to be configured through TimerSelector, with a range of Timer0 ~ Timer3. During the timer output disabled period, the timer output remains at a low level and is not controlled by the timer output invert.
7.Features Only rising edge serve as effective triggering signals Set the TimerTriggerActivation to RisingEdge mode, and when the rising edge of the trigger signal arrives, the Timer generates an output. The timing is shown in the following figure: Trigger Si gnal Timer Output Delay Time Duration Time Delay Time1...
7.Features Configuration Method Choose the appropriate trigger source from TimerTriggerSource, set the TimerTriggerActivation to one of the three options of AnyEdge, FallingEdge, or RisingEdge, and then set the TimerTriggerDivider’s value as your need. Usage Instruction Eg: Expect Line0 to generate a Timer output after receiving 5 edges. Set TimerTriggerSource to Line0, TimerTriggerActivation to AnyEdge, and TimerTriggerDivider to 5, and then refer to 7.7.1.Timer Output Format for Timer output waveform’s configuration.
7.Features In this mode, all overlapping trigger signals are discarded and have no impact on the Timer output. Latch The first overlapped trigger signal in this mode will be saved, and any subsequent overlapped signals generated by the Timer during the output process will be discarded. A new Timer output will immediately initiate at the end of the Timer output.
7.Features 7.7.10. TimerTriggerSource Timers can be triggered through various triggering sources, and users can specify the triggering source of the current Timer through TimerTriggerSource. Currently, it supports different Line options, Continuous, RotaryEncoder0, RotaryEncoder1, Software, Timer1~Timer3. Among them, different Line options indicates support triggering through I/O’s input signals, Timer1~Timer3 indicates support triggering through Timer’s output signals, Continuous indicates Timer continuous free output, RotaryEncoder0 and RotaryEncoder1 indicates support triggering through pulse signals output by the encoder decoding module.
7.Features 7.9. FanEnable A fan is installed on GEV frame grabber, and user can set the "FanEnable" to turn on/off the fan. GEV Frame Grabber Options Descriptions Control the fan. Set the parameter to "true", turn on the fan. Set the FanEnable parameter to "false", turn off the fan.
7.Features PCIeMaximumLinkWidth The maximum link width supported by the host PCIeNegotiatedLinkWidth The negotiated link width of the PCI high speed link PCIeLinkSpeed2500MTpsSupported Whether it supports a link speed of 2500MTps PCIeLinkSpeed5000MTpsSupported Whether it supports a link speed of 5000MTps PCIeLinkSpeed8000MTpsSupported Whether it supports a link speed of 8000MTps PCIBus Current device PCI bus index value...
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7.Features CxpControlDataPacketlengthErrorCountReset CxpControlDataPacketlengthErrorCount zeroing CxpControlPacketCrcErrorCountReset CxpControlPacketCrcErrorCount zeroing CxpEventPacketlengthErrorCountReset CxpEventPacketlengthErrorCount zeroing CxpEventPacketCrcErrorCountReset CxpEventPacketCrcErrorCount zeroing CxpStreamDataPacketlengthErrorCountReset CxpStreamDataPacketlengthErrorCount zeroing CxpStreamDataPacketCrcErrorCountReset CxpStreamDataPacketCrcErrorCount zeroing PcieGevErrorCounters displays the information statistics of format errors found after parsing protocol packets received by the frame grabber from the camera. The functional description is shown in the table below: Function Description...
7.Features StreamPacketTotalCountReset StreamPacketTotalCount zeroing SendResendCmd1CountReset SendResendCmd1CountReset zeroing SendResendCmd2CountReset SendResendCmd2CountReset zeroing PauseTimeCountReset PauseTimeCountReset zeroing ReceiveResendGVSPCountReset ReceiveResendGVSPCountReset zeroing ReceiveResendUnvaildGVSPCountReset ReceiveResendUnvaildGVSPCountReset zeroing DeliverResendUnvaildCountReset DeliverResendUnvaildCountReset zeroing BufOverflowCountReset BufOverflowCountReset zeroing ResendTimeoutCountReset ResendTimeoutCountReset zeroing FBWriteFIFOFullCountReset FBWriteFIFOFullCountReset zeroing 7.14. CoaXPress Test whether the connection between the CXP frame grabber and the camera is stable, and whether the signal quality is normal.
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7.Features Count the image frame number received by the CxpStreamRecImageFrameCount frame grabber Count the number of image lines received by the CxpStreamRecImageLineCount frame grabber CxpStreamPacketImageHeaderErrorCountReset Clear CxpStreamPacketImageHeaderErrorCount CxpStreamDataLostTagErrorCountReset Clear CxpStreamDataLostTagErrorCount CxpStreamRecImageFrameCountReset Clear CxpStreamRecImageFrameCount CxpStreamRecImageLineCountReset Clear CxpStreamRecImageLineCount Status of the frame grabber, False indicates that the current device is in AcquisitionStop state.
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7.Features OldestFirstOverwrite Also follow the principle of FIFO (First in, First out). The difference from OldestFirst mode is that when all buffers are filled, the SDK will actively discard the oldest timestamp image buffer for receiving new image data. NewestOnly In this mode, users always receives the latest image received by the SDK.
8.FAQ 8. FAQ General Question Answer Hardware environment issue: It is necessary to confirm whether the PCIe slot connected to the frame grabber supports the speed of PCIe Gen3 × 8. Check whether the value of PCIeLinkSpeed8000MTpsSupported is " true ", and whether the PCIeNegotiatedLinkWidth is "...
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8.FAQ Check the length of the network cable, which should within 30m. frame grabber connected to the camera Check the network cable connection, use the RJ45 jack to through the network cable connect the camera. Observe the network port indicator, and find that the camera the yellow and green LED solid at the same time when the cannot be enumerated.
If you need to order products or inquire product information, please contact our sales: Tel: +86 10 8282 8878-8081 Email: isupport@daheng-imaging.com 10.2. Contact Support If you have any questions in using DAHENG IMAGING products, please contact the experts on our support team: Tel: +86 10 8282 8878 Email: isupport@daheng-imaging.com...
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