Compaq 108164-003 - ProLiant - 800 Integration Notes page 4

ECG045/1097
I N
NTEGRATION OTE
(cont.)
. .
To obtain this benefit in an application serving environment, your network applications must be
. .
. .
designed to take advantage of intraNetWare/NetWare 4.11 SMP. Contact your application vendor
. .
to find out about current support for NetWare SMP. Novell is also updating applications, such as
. .
. .
GroupWise and MultiProtocol Router v3.0, to support the SMP architecture.
. .
. .
NetWare SMP also offers some opportunities for organizations using NetWare to provide basic
. .
. .
network file and print services. Large file serving environments that stress the processor capacity
. .
of existing NetWare servers may see significant benefit from NetWare SMP. In
. .
intraNetWare/NetWare 4.11 SMP, the LAN driver interrupts are moved to the secondary
. .
. .
processors, reducing the load on the boot processor and making more capacity available for other
. .
functions. Server environments that support multiple LAN segments and maintain high
. .
. .
processor utilization are most likely to benefit from this capability.
. .
. .
NOTE: The Compaq Advanced Network Fault Detection and
. .
. .
Correction feature (i.e. controller pairing) for NetFlex-3
. .
. .
and Netelligent controllers is not currently supported
. .
under SMP. Compaq is actively working with Novell to
. .
. .
provide this feature under SMP, and it will be available
. .
. .
in the near future.
. .
. .
. .
H SMP
. .
I S T O R Y O F
. .
. .
Multiprocessing (MP) in the PC industry began with the Compaq Systempro. While this design
. .
enhanced performance and supported up to two processors, the support was asymmetrical: only
. .
. .
one processor could service interrupts. In the case of the Systempro, all interrupts were processed
. .
by the boot processor. The second processor could run applications but could not service
. .
. .
interrupts from peripheral boards, timers, or other components.
. .
. .
The Systempro/XL and ProLiant family were the first Compaq SMP servers and used the 8259
. .
programmable interrupt controller. This architecture is symmetric: any processor can service any
. .
. .
interrupt and there are separate Direct Memory Access (DMA) channels, timers and
. .
Programmable Interrupt Controllers (PIC) for each processor. Because of expanding customer
. .
. .
needs, Intel has introduced the Multiprocessor Specification (MPS) which is becoming a standard
. .
for MP.
. .
. .
Intel' s MPS assumes that an Advanced Programmable Interrupt Controllers (APIC) are available
. .
. .
in the system. The APIC was developed for multiprocessing environments. Later versions of
. .
Pentium and Pentium Pro chips have the APIC embedded in the processor to simplify design
. .
. .
requirements and to guarantee that the APIC functionality will be available for use by operating
. .
systems. The APIC design provides better interrupt handling than previous designs in SMP
. .
. .
environments. The largest benefit is that the APIC system dispatches interrupts to the processor
. .
executing the least important task.
. .
. .
. . An additional performance increase is realized through the operating system scheduler. The
. .
scheduler recognizes high priority tasks and avoids interrupting these tasks when possible, thus
. .
. . increasing the overall efficiency of the system. The scheduler also attempts to schedule a task to
. .
use the same processor that was last used by the task, which is called thread affinity. Because
. .
each processor has its own cache, if a processor is using information that has already been called
. .
. .
from system memory and placed in its cache, performance is improved.
. .
. .
. .
N W
ET A R E A N D
. .
. .
. .
NetWare versions prior to 4.10 are neither symmetric multiprocessing capable nor preemptive.
. .
Novell' s first multiprocessing development was the NetWare SFT III architecture which uses
. .
. .
. .
4
C
A T O M P A Q
M
U L T I P R O C E S S I N G